From: Alex Deucher Date: Mon, 10 Apr 2017 16:48:02 +0000 (-0400) Subject: drm/amdgpu/gfx8: set doorbell range for polaris as well X-Git-Tag: v4.13-rc1~45^2~24^2~341 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a576fe51512050d0005a7be40e59ae7c8b9b49d7;p=platform%2Fkernel%2Flinux-exynos.git drm/amdgpu/gfx8: set doorbell range for polaris as well Add missing chips to the doorbell range setup. These were missed in the KIQ code. Fixes power and performance regressions with KIQ. Spotted by Rex. Tested-and-Reviewed-by: Rex Zhu Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 089bd49..6ea8631c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -4893,8 +4893,11 @@ static int gfx_v8_0_kiq_init_register(struct amdgpu_ring *ring) /* enable the doorbell if requested */ if (ring->use_doorbell) { if ((adev->asic_type == CHIP_CARRIZO) || - (adev->asic_type == CHIP_FIJI) || - (adev->asic_type == CHIP_STONEY)) { + (adev->asic_type == CHIP_FIJI) || + (adev->asic_type == CHIP_STONEY) || + (adev->asic_type == CHIP_POLARIS10) || + (adev->asic_type == CHIP_POLARIS11) || + (adev->asic_type == CHIP_POLARIS12)) { WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,