From: Oliver Stannard <oliver.stannard@arm.com>
Date: Thu, 27 Sep 2018 16:09:05 +0000 (+0000)
Subject: [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB
X-Git-Tag: llvmorg-8.0.0-rc1~7766
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a4f68bf4adcd2cc3457a4028e7f0bf7eb89dc002;p=platform%2Fupstream%2Fllvm.git

[AArch64][v8.5A] Add speculation barriers SSBB and PSSBB

This adds two new barrier instructions which can be used to restrict
speculative execution of load instructions.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52483

llvm-svn: 343229
---

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index f6b7987..f424fa2 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -650,6 +650,8 @@ def SB : SimpleSystemI<0, (ins), "sb", "">, Sched<[]> {
 
 def : InstAlias<"clrex", (CLREX 0xf)>;
 def : InstAlias<"isb", (ISB 0xf)>;
+def : InstAlias<"ssbb", (DSB 0)>;
+def : InstAlias<"pssbb", (DSB 4)>;
 
 def MRS    : MRSI;
 def MSR    : MSRI;
diff --git a/llvm/test/MC/AArch64/basic-a64-instructions.s b/llvm/test/MC/AArch64/basic-a64-instructions.s
index 46b2397..07afdba 100644
--- a/llvm/test/MC/AArch64/basic-a64-instructions.s
+++ b/llvm/test/MC/AArch64/basic-a64-instructions.s
@@ -3482,6 +3482,7 @@ _func:
 // CHECK: clrex                           // encoding: [0x5f,0x3f,0x03,0xd5]
 
         dsb #0
+        dsb #4
         dsb #12
         dsb #15
         dsb oshld
@@ -3496,7 +3497,8 @@ _func:
         dsb ld
         dsb st
         dsb sy
-// CHECK: dsb     #0                      // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: ssbb                            // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: pssbb                           // encoding: [0x9f,0x34,0x03,0xd5]
 // CHECK: dsb     #12                     // encoding: [0x9f,0x3c,0x03,0xd5]
 // CHECK: dsb     sy                      // encoding: [0x9f,0x3f,0x03,0xd5]
 // CHECK: dsb     oshld                   // encoding: [0x9f,0x31,0x03,0xd5]
diff --git a/llvm/test/MC/AArch64/csdb.s b/llvm/test/MC/AArch64/speculation-barriers.s
similarity index 52%
rename from llvm/test/MC/AArch64/csdb.s
rename to llvm/test/MC/AArch64/speculation-barriers.s
index bc52280..0ab3fe7 100644
--- a/llvm/test/MC/AArch64/csdb.s
+++ b/llvm/test/MC/AArch64/speculation-barriers.s
@@ -1,4 +1,9 @@
 // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s
 
-  csdb
+csdb
+ssbb
+pssbb
+
 // CHECK: csdb   // encoding: [0x9f,0x22,0x03,0xd5]
+// CHECK: ssbb   // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: pssbb  // encoding: [0x9f,0x34,0x03,0xd5]
diff --git a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
index 33b8d6b..74edc4c 100644
--- a/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
+++ b/llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
@@ -3048,7 +3048,6 @@
 0x5f 0x37 0x3 0xd5
 0x5f 0x3f 0x3 0xd5
 
-# CHECK: dsb      #0
 # CHECK: dsb      #12
 # CHECK: dsb      sy
 # CHECK: dsb      oshld
@@ -3063,7 +3062,6 @@
 # CHECK: dsb      ld
 # CHECK: dsb      st
 # CHECK: dsb      sy
-0x9f 0x30 0x3 0xd5
 0x9f 0x3c 0x3 0xd5
 0x9f 0x3f 0x3 0xd5
 0x9f 0x31 0x3 0xd5
diff --git a/llvm/test/MC/Disassembler/AArch64/csdb.txt b/llvm/test/MC/Disassembler/AArch64/speculation-barriers.txt
similarity index 50%
rename from llvm/test/MC/Disassembler/AArch64/csdb.txt
rename to llvm/test/MC/Disassembler/AArch64/speculation-barriers.txt
index ca78f76..19070a0 100644
--- a/llvm/test/MC/Disassembler/AArch64/csdb.txt
+++ b/llvm/test/MC/Disassembler/AArch64/speculation-barriers.txt
@@ -1,4 +1,9 @@
 # RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck %s
 
 [0x9f,0x22,0x03,0xd5]
-# CHECK: csdb
+[0x9f,0x30,0x03,0xd5]
+[0x9f,0x34,0x03,0xd5]
+
+# CHECK:      csdb
+# CHECK-NEXT: ssbb
+# CHECK-NEXT: pssbb