From: Craig Topper Date: Sun, 6 Nov 2016 02:03:58 +0000 (+0000) Subject: [AVX-512] Add -show-mc-encoding to legacy vector intrinsic tests so we can see when... X-Git-Tag: llvmorg-4.0.0-rc1~5411 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a4a51f1afef55bcb028e2d1fd6ebf3c20d53a068;p=platform%2Fupstream%2Fllvm.git [AVX-512] Add -show-mc-encoding to legacy vector intrinsic tests so we can see when VEX or EVEX encoded instructions are being emitted. Make sure the tests all have an avx2 command line and an skx command line. llvm-svn: 286055 --- diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll index cf906c83fe16..466abf146fa3 100644 --- a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1,17 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx,aes,pclmul | FileCheck %s --check-prefix=AVX -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx512vl,aes,pclmul | FileCheck %s --check-prefix=AVX512VL +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx,aes,pclmul -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX +; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_aesni_aesdec: -; AVX: ## BB#0: -; AVX-NEXT: vaesdec %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_aesni_aesdec: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaesdec %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_aesni_aesdec: +; CHECK: ## BB#0: +; CHECK-NEXT: vaesdec %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0xde,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -19,15 +14,10 @@ declare <2 x i64> @llvm.x86.aesni.aesdec(<2 x i64>, <2 x i64>) nounwind readnone define <2 x i64> @test_x86_aesni_aesdeclast(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_aesni_aesdeclast: -; AVX: ## BB#0: -; AVX-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_aesni_aesdeclast: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_aesni_aesdeclast: +; CHECK: ## BB#0: +; CHECK-NEXT: vaesdeclast %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0xdf,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -35,15 +25,10 @@ declare <2 x i64> @llvm.x86.aesni.aesdeclast(<2 x i64>, <2 x i64>) nounwind read define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_aesni_aesenc: -; AVX: ## BB#0: -; AVX-NEXT: vaesenc %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_aesni_aesenc: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaesenc %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_aesni_aesenc: +; CHECK: ## BB#0: +; CHECK-NEXT: vaesenc %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0xdc,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -51,15 +36,10 @@ declare <2 x i64> @llvm.x86.aesni.aesenc(<2 x i64>, <2 x i64>) nounwind readnone define <2 x i64> @test_x86_aesni_aesenclast(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_aesni_aesenclast: -; AVX: ## BB#0: -; AVX-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_aesni_aesenclast: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_aesni_aesenclast: +; CHECK: ## BB#0: +; CHECK-NEXT: vaesenclast %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0xdd,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -67,15 +47,10 @@ declare <2 x i64> @llvm.x86.aesni.aesenclast(<2 x i64>, <2 x i64>) nounwind read define <2 x i64> @test_x86_aesni_aesimc(<2 x i64> %a0) { -; AVX-LABEL: test_x86_aesni_aesimc: -; AVX: ## BB#0: -; AVX-NEXT: vaesimc %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_aesni_aesimc: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaesimc %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_aesni_aesimc: +; CHECK: ## BB#0: +; CHECK-NEXT: vaesimc %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0xdb,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64> %a0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -83,15 +58,10 @@ declare <2 x i64> @llvm.x86.aesni.aesimc(<2 x i64>) nounwind readnone define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) { -; AVX-LABEL: test_x86_aesni_aeskeygenassist: -; AVX: ## BB#0: -; AVX-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_aesni_aeskeygenassist: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_aesni_aeskeygenassist: +; CHECK: ## BB#0: +; CHECK-NEXT: vaeskeygenassist $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0xdf,0xc0,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64> %a0, i8 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -99,15 +69,10 @@ declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) nounwind readno define <2 x double> @test_x86_sse2_add_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_add_sd: -; AVX: ## BB#0: -; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_add_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_add_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x58,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -115,15 +80,10 @@ declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_cmp_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_cmp_pd: -; AVX: ## BB#0: -; AVX-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cmp_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cmp_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc2,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -131,15 +91,10 @@ declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounw define <2 x double> @test_x86_sse2_cmp_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_cmp_sd: -; AVX: ## BB#0: -; AVX-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cmp_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cmp_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xc2,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -149,21 +104,21 @@ declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounw define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_comieq_sd: ; AVX: ## BB#0: -; AVX-NEXT: vcomisd %xmm1, %xmm0 -; AVX-NEXT: setnp %al -; AVX-NEXT: sete %cl -; AVX-NEXT: andb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_comieq_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 -; AVX512VL-NEXT: setnp %al -; AVX512VL-NEXT: sete %cl -; AVX512VL-NEXT: andb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; AVX512VL-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX512VL-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX512VL-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -173,17 +128,17 @@ declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_comige_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomisd %xmm1, %xmm0 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_comige_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -193,17 +148,17 @@ declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_comigt_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomisd %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_comigt_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -213,17 +168,17 @@ declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_comile_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomisd %xmm0, %xmm1 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2f,0xc8] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_comile_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc8] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -233,17 +188,17 @@ declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_comilt_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomisd %xmm0, %xmm1 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2f,0xc8] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_comilt_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc8] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -253,21 +208,21 @@ declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comineq_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_comineq_sd: ; AVX: ## BB#0: -; AVX-NEXT: vcomisd %xmm1, %xmm0 -; AVX-NEXT: setp %al -; AVX-NEXT: setne %cl -; AVX-NEXT: orb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_comineq_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 -; AVX512VL-NEXT: setp %al -; AVX512VL-NEXT: setne %cl -; AVX512VL-NEXT: orb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; AVX512VL-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX512VL-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX512VL-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -275,15 +230,10 @@ declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>) nounwind readn define <4 x float> @test_x86_sse2_cvtdq2ps(<4 x i32> %a0) { -; AVX-LABEL: test_x86_sse2_cvtdq2ps: -; AVX: ## BB#0: -; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvtdq2ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtdq2ps %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvtdq2ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtdq2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5b,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -291,15 +241,10 @@ declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse2_cvtpd2dq(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvtpd2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvtpd2dq %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvtpd2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtpd2dq %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvtpd2dq: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xe6,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -309,13 +254,13 @@ declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone define <4 x float> @test_x86_sse2_cvtpd2ps(<2 x double> %a0) { ; AVX-LABEL: test_x86_sse2_cvtpd2ps: ; AVX: ## BB#0: -; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5a,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_cvtpd2ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtpd2ps %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5a,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -323,15 +268,10 @@ declare <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double>) nounwind readnone define <4 x i32> @test_x86_sse2_cvtps2dq(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse2_cvtps2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvtps2dq %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvtps2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtps2dq %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvtps2dq: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtps2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5b,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -341,13 +281,13 @@ declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvtsd2si(<2 x double> %a0) { ; AVX-LABEL: test_x86_sse2_cvtsd2si: ; AVX: ## BB#0: -; AVX-NEXT: vcvtsd2si %xmm0, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcvtsd2si %xmm0, %eax ## encoding: [0xc5,0xfb,0x2d,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_cvtsd2si: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtsd2si %xmm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvtsd2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7f,0x08,0x2d,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -355,15 +295,10 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_cvtsd2ss: -; AVX: ## BB#0: -; AVX-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvtsd2ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvtsd2ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5a,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -373,13 +308,13 @@ declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) { ; AVX-LABEL: test_x86_sse2_cvtsi2sd: ; AVX: ## BB#0: -; AVX-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x2a,0x44,0x24,0x04] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_cvtsi2sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x2a,0x44,0x24,0x01] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -387,15 +322,10 @@ declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnon define <2 x double> @test_x86_sse2_cvtss2sd(<2 x double> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse2_cvtss2sd: -; AVX: ## BB#0: -; AVX-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvtss2sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvtss2sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5a,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -403,15 +333,10 @@ declare <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double>, <4 x float>) nounwind define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvttpd2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvttpd2dq %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvttpd2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttpd2dq %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvttpd2dq: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvttpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe6,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -419,15 +344,10 @@ declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone define <4 x i32> @test_x86_sse2_cvttps2dq(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse2_cvttps2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvttps2dq %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_cvttps2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttps2dq %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_cvttps2dq: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvttps2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5b,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -437,13 +357,13 @@ declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvttsd2si(<2 x double> %a0) { ; AVX-LABEL: test_x86_sse2_cvttsd2si: ; AVX: ## BB#0: -; AVX-NEXT: vcvttsd2si %xmm0, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcvttsd2si %xmm0, %eax ## encoding: [0xc5,0xfb,0x2c,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_cvttsd2si: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttsd2si %xmm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvttsd2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7f,0x08,0x2c,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -451,15 +371,10 @@ declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_div_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_div_sd: -; AVX: ## BB#0: -; AVX-NEXT: vdivsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_div_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vdivsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_div_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vdivsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5e,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -470,13 +385,13 @@ declare <2 x double> @llvm.x86.sse2.div.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_max_pd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_max_pd: ; AVX: ## BB#0: -; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5f,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_max_pd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5f,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -484,15 +399,10 @@ declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_max_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_max_sd: -; AVX: ## BB#0: -; AVX-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_max_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_max_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5f,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -502,13 +412,13 @@ declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_min_pd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_min_pd: ; AVX: ## BB#0: -; AVX-NEXT: vminpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vminpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_min_pd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vminpd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -516,15 +426,10 @@ declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_min_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_min_sd: -; AVX: ## BB#0: -; AVX-NEXT: vminsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_min_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_min_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vminsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5d,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -532,15 +437,10 @@ declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind define i32 @test_x86_sse2_movmsk_pd(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_movmsk_pd: -; AVX: ## BB#0: -; AVX-NEXT: vmovmskpd %xmm0, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_movmsk_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmovmskpd %xmm0, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_movmsk_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vmovmskpd %xmm0, %eax ## encoding: [0xc5,0xf9,0x50,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -550,15 +450,10 @@ declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_mul_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_mul_sd: -; AVX: ## BB#0: -; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_mul_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmulsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_mul_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vmulsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x59,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -568,13 +463,13 @@ declare <2 x double> @llvm.x86.sse2.mul.sd(<2 x double>, <2 x double>) nounwind define <8 x i16> @test_x86_sse2_packssdw_128(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse2_packssdw_128: ; AVX: ## BB#0: -; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x6b,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_packssdw_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x6b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -584,13 +479,13 @@ declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind rea define <16 x i8> @test_x86_sse2_packsswb_128(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_packsswb_128: ; AVX: ## BB#0: -; AVX-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x63,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_packsswb_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x63,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -600,13 +495,13 @@ declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>) nounwind rea define <16 x i8> @test_x86_sse2_packuswb_128(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_packuswb_128: ; AVX: ## BB#0: -; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x67,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_packuswb_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x67,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -616,13 +511,13 @@ declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind rea define <16 x i8> @test_x86_sse2_padds_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_padds_b: ; AVX: ## BB#0: -; AVX-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xec,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_padds_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xec,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -632,13 +527,13 @@ declare <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_padds_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_padds_w: ; AVX: ## BB#0: -; AVX-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xed,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_padds_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xed,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -648,13 +543,13 @@ declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_paddus_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_paddus_b: ; AVX: ## BB#0: -; AVX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdc,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_paddus_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xdc,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -664,13 +559,13 @@ declare <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8>, <16 x i8>) nounwind readnon define <8 x i16> @test_x86_sse2_paddus_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_paddus_w: ; AVX: ## BB#0: -; AVX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_paddus_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xdd,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -680,13 +575,13 @@ declare <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16>, <8 x i16>) nounwind readnon define <16 x i8> @test_x86_sse2_pavg_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_pavg_b: ; AVX: ## BB#0: -; AVX-NEXT: vpavgb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpavgb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe0,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pavg_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpavgb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpavgb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe0,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -696,13 +591,13 @@ declare <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pavg_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_pavg_w: ; AVX: ## BB#0: -; AVX-NEXT: vpavgw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpavgw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe3,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pavg_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpavgw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpavgw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe3,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -712,13 +607,13 @@ declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_pmadd_wd(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_pmadd_wd: ; AVX: ## BB#0: -; AVX-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf5,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmadd_wd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf5,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a0, <8 x i16> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -728,13 +623,13 @@ declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnon define <8 x i16> @test_x86_sse2_pmaxs_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_pmaxs_w: ; AVX: ## BB#0: -; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xee,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmaxs_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xee,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -744,13 +639,13 @@ declare <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_pmaxu_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_pmaxu_b: ; AVX: ## BB#0: -; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xde,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmaxu_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xde,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -760,13 +655,13 @@ declare <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pmins_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_pmins_w: ; AVX: ## BB#0: -; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xea,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmins_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xea,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -776,13 +671,13 @@ declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_pminu_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_pminu_b: ; AVX: ## BB#0: -; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xda,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pminu_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminub %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminub %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xda,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -790,15 +685,10 @@ declare <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8>, <16 x i8>) nounwind readnone define i32 @test_x86_sse2_pmovmskb_128(<16 x i8> %a0) { -; AVX-LABEL: test_x86_sse2_pmovmskb_128: -; AVX: ## BB#0: -; AVX-NEXT: vpmovmskb %xmm0, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_pmovmskb_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmovmskb %xmm0, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_pmovmskb_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpmovmskb %xmm0, %eax ## encoding: [0xc5,0xf9,0xd7,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0) ; [#uses=1] ret i32 %res } @@ -808,13 +698,13 @@ declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pmulh_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_pmulh_w: ; AVX: ## BB#0: -; AVX-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe5,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmulh_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe5,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -824,13 +714,13 @@ declare <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16>, <8 x i16>) nounwind readnone define <8 x i16> @test_x86_sse2_pmulhu_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_pmulhu_w: ; AVX: ## BB#0: -; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe4,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmulhu_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe4,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -840,13 +730,13 @@ declare <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16>, <8 x i16>) nounwind readnon define <2 x i64> @test_x86_sse2_pmulu_dq(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse2_pmulu_dq: ; AVX: ## BB#0: -; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf4,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pmulu_dq: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xf4,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -856,13 +746,13 @@ declare <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32>, <4 x i32>) nounwind readnon define <2 x i64> @test_x86_sse2_psad_bw(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_psad_bw: ; AVX: ## BB#0: -; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psad_bw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a0, <16 x i8> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -872,13 +762,13 @@ declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse2_psll_d(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse2_psll_d: ; AVX: ## BB#0: -; AVX-NEXT: vpslld %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpslld %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf2,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psll_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpslld %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpslld %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf2,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -888,13 +778,13 @@ declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone define <2 x i64> @test_x86_sse2_psll_q(<2 x i64> %a0, <2 x i64> %a1) { ; AVX-LABEL: test_x86_sse2_psll_q: ; AVX: ## BB#0: -; AVX-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsllq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf3,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psll_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xf3,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -904,13 +794,13 @@ declare <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i16> @test_x86_sse2_psll_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_psll_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsllw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsllw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf1,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psll_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf1,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -920,13 +810,13 @@ declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_pslli_d(<4 x i32> %a0) { ; AVX-LABEL: test_x86_sse2_pslli_d: ; AVX: ## BB#0: -; AVX-NEXT: vpslld $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpslld $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xf0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pslli_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpslld $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpslld $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x72,0xf0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -936,13 +826,13 @@ declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32) nounwind readnone define <2 x i64> @test_x86_sse2_pslli_q(<2 x i64> %a0) { ; AVX-LABEL: test_x86_sse2_pslli_q: ; AVX: ## BB#0: -; AVX-NEXT: vpsllq $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsllq $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x73,0xf0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pslli_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllq $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllq $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x73,0xf0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -952,13 +842,13 @@ declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_pslli_w(<8 x i16> %a0) { ; AVX-LABEL: test_x86_sse2_pslli_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsllw $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsllw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xf0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_pslli_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllw $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllw $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x71,0xf0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -968,13 +858,13 @@ declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) nounwind readnone define <4 x i32> @test_x86_sse2_psra_d(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse2_psra_d: ; AVX: ## BB#0: -; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe2,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psra_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrad %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrad %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe2,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -984,13 +874,13 @@ declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse2_psra_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_psra_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe1,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psra_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsraw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsraw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe1,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1000,13 +890,13 @@ declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_psrai_d(<4 x i32> %a0) { ; AVX-LABEL: test_x86_sse2_psrai_d: ; AVX: ## BB#0: -; AVX-NEXT: vpsrad $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrad $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xe0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrai_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrad $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrad $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x72,0xe0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1016,13 +906,13 @@ declare <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_psrai_w(<8 x i16> %a0) { ; AVX-LABEL: test_x86_sse2_psrai_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsraw $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsraw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xe0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrai_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsraw $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsraw $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x71,0xe0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1032,13 +922,13 @@ declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone define <4 x i32> @test_x86_sse2_psrl_d(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse2_psrl_d: ; AVX: ## BB#0: -; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd2,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrl_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrld %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd2,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1048,13 +938,13 @@ declare <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32>, <4 x i32>) nounwind readnone define <2 x i64> @test_x86_sse2_psrl_q(<2 x i64> %a0, <2 x i64> %a1) { ; AVX-LABEL: test_x86_sse2_psrl_q: ; AVX: ## BB#0: -; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd3,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrl_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xd3,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1064,13 +954,13 @@ declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i16> @test_x86_sse2_psrl_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_psrl_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd1,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrl_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd1,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1080,13 +970,13 @@ declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_psrli_d(<4 x i32> %a0) { ; AVX-LABEL: test_x86_sse2_psrli_d: ; AVX: ## BB#0: -; AVX-NEXT: vpsrld $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrld $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xd0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrli_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrld $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrld $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x72,0xd0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1096,13 +986,13 @@ declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32) nounwind readnone define <2 x i64> @test_x86_sse2_psrli_q(<2 x i64> %a0) { ; AVX-LABEL: test_x86_sse2_psrli_q: ; AVX: ## BB#0: -; AVX-NEXT: vpsrlq $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrlq $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x73,0xd0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrli_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlq $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlq $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x73,0xd0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1112,13 +1002,13 @@ declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_psrli_w(<8 x i16> %a0) { ; AVX-LABEL: test_x86_sse2_psrli_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsrlw $7, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsrlw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xd0,0x07] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psrli_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlw $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlw $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x71,0xd0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1128,13 +1018,13 @@ declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) nounwind readnone define <16 x i8> @test_x86_sse2_psubs_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_psubs_b: ; AVX: ## BB#0: -; AVX-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe8,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psubs_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe8,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1144,13 +1034,13 @@ declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_psubs_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_psubs_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe9,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psubs_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe9,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1160,13 +1050,13 @@ declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_psubus_b(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse2_psubus_b: ; AVX: ## BB#0: -; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd8,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psubus_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd8,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1176,13 +1066,13 @@ declare <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8>, <16 x i8>) nounwind readnon define <8 x i16> @test_x86_sse2_psubus_w(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse2_psubus_w: ; AVX: ## BB#0: -; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd9,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_psubus_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd9,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1190,15 +1080,10 @@ declare <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16>, <8 x i16>) nounwind readnon define <2 x double> @test_x86_sse2_sqrt_pd(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_sqrt_pd: -; AVX: ## BB#0: -; AVX-NEXT: vsqrtpd %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_sqrt_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsqrtpd %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_sqrt_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vsqrtpd %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x51,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1206,15 +1091,10 @@ declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_sqrt_sd(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_sqrt_sd: -; AVX: ## BB#0: -; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_sqrt_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_sqrt_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x51,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1222,15 +1102,10 @@ declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_sub_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_sub_sd: -; AVX: ## BB#0: -; AVX-NEXT: vsubsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse2_sub_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsubsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse2_sub_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vsubsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5c,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1240,21 +1115,21 @@ declare <2 x double> @llvm.x86.sse2.sub.sd(<2 x double>, <2 x double>) nounwind define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_ucomieq_sd: ; AVX: ## BB#0: -; AVX-NEXT: vucomisd %xmm1, %xmm0 -; AVX-NEXT: setnp %al -; AVX-NEXT: sete %cl -; AVX-NEXT: andb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_ucomieq_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 -; AVX512VL-NEXT: setnp %al -; AVX512VL-NEXT: sete %cl -; AVX512VL-NEXT: andb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; AVX512VL-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX512VL-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX512VL-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1264,17 +1139,17 @@ declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_ucomige_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomisd %xmm1, %xmm0 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_ucomige_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1284,17 +1159,17 @@ declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_ucomigt_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomisd %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_ucomigt_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1304,17 +1179,17 @@ declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_ucomile_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomisd %xmm0, %xmm1 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2e,0xc8] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_ucomile_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc8] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1324,17 +1199,17 @@ declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_ucomilt_sd: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomisd %xmm0, %xmm1 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2e,0xc8] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_ucomilt_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc8] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1344,21 +1219,21 @@ declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1) { ; AVX-LABEL: test_x86_sse2_ucomineq_sd: ; AVX: ## BB#0: -; AVX-NEXT: vucomisd %xmm1, %xmm0 -; AVX-NEXT: setp %al -; AVX-NEXT: setne %cl -; AVX-NEXT: orb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse2_ucomineq_sd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 -; AVX512VL-NEXT: setp %al -; AVX512VL-NEXT: setne %cl -; AVX512VL-NEXT: orb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; AVX512VL-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX512VL-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX512VL-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1366,15 +1241,10 @@ declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>) nounwind read define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse3_addsub_pd: -; AVX: ## BB#0: -; AVX-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_addsub_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_addsub_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd0,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1382,15 +1252,10 @@ declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwi define <4 x float> @test_x86_sse3_addsub_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse3_addsub_ps: -; AVX: ## BB#0: -; AVX-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_addsub_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_addsub_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xd0,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1398,15 +1263,10 @@ declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind define <2 x double> @test_x86_sse3_hadd_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse3_hadd_pd: -; AVX: ## BB#0: -; AVX-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_hadd_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_hadd_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7c,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1414,15 +1274,10 @@ declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind define <4 x float> @test_x86_sse3_hadd_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse3_hadd_ps: -; AVX: ## BB#0: -; AVX-NEXT: vhaddps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_hadd_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhaddps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_hadd_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vhaddps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7c,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1430,15 +1285,10 @@ declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind re define <2 x double> @test_x86_sse3_hsub_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse3_hsub_pd: -; AVX: ## BB#0: -; AVX-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_hsub_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_hsub_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7d,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1446,15 +1296,10 @@ declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind define <4 x float> @test_x86_sse3_hsub_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse3_hsub_ps: -; AVX: ## BB#0: -; AVX-NEXT: vhsubps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_hsub_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhsubps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_hsub_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vhsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7d,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1462,17 +1307,11 @@ declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind re define <16 x i8> @test_x86_sse3_ldu_dq(i8* %a0) { -; AVX-LABEL: test_x86_sse3_ldu_dq: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vlddqu (%eax), %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse3_ldu_dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vlddqu (%eax), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse3_ldu_dq: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vlddqu (%eax), %xmm0 ## encoding: [0xc5,0xfb,0xf0,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1480,15 +1319,10 @@ declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { -; AVX-LABEL: test_x86_sse41_blendvpd: -; AVX: ## BB#0: -; AVX-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_blendvpd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_blendvpd: +; CHECK: ## BB#0: +; CHECK-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4b,0xc1,0x20] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1496,15 +1330,10 @@ declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x d define <4 x float> @test_x86_sse41_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { -; AVX-LABEL: test_x86_sse41_blendvps: -; AVX: ## BB#0: -; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_blendvps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_blendvps: +; CHECK: ## BB#0: +; CHECK-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4a,0xc1,0x20] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1512,15 +1341,10 @@ declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x floa define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse41_dppd: -; AVX: ## BB#0: -; AVX-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_dppd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_dppd: +; CHECK: ## BB#0: +; CHECK-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x41,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1528,15 +1352,10 @@ declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwi define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse41_dpps: -; AVX: ## BB#0: -; AVX-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_dpps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_dpps: +; CHECK: ## BB#0: +; CHECK-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x40,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1546,13 +1365,15 @@ declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse41_insertps: ; AVX: ## BB#0: -; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] -; AVX-NEXT: retl +; AVX-NEXT: vinsertps $21, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0xc1,0x15] +; AVX-NEXT: ## xmm0 = zero,xmm1[0],zero,xmm0[3] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_insertps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],zero,xmm0[3] -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vinsertps $21, %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf3,0x7d,0x08,0x21,0xc1,0x15] +; AVX512VL-NEXT: ## xmm0 = zero,xmm1[0],zero,xmm0[3] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 21) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1561,15 +1382,10 @@ declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounw define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse41_mpsadbw: -; AVX: ## BB#0: -; AVX-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_mpsadbw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_mpsadbw: +; CHECK: ## BB#0: +; CHECK-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x42,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1579,13 +1395,13 @@ declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i8) nounwind rea define <8 x i16> @test_x86_sse41_packusdw(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse41_packusdw: ; AVX: ## BB#0: -; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x2b,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_packusdw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x2b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1593,15 +1409,10 @@ declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readno define <16 x i8> @test_x86_sse41_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) { -; AVX-LABEL: test_x86_sse41_pblendvb: -; AVX: ## BB#0: -; AVX-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_pblendvb: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_pblendvb: +; CHECK: ## BB#0: +; CHECK-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4c,0xc1,0x20] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1609,15 +1420,10 @@ declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>) noun define <8 x i16> @test_x86_sse41_phminposuw(<8 x i16> %a0) { -; AVX-LABEL: test_x86_sse41_phminposuw: -; AVX: ## BB#0: -; AVX-NEXT: vphminposuw %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_phminposuw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphminposuw %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_phminposuw: +; CHECK: ## BB#0: +; CHECK-NEXT: vphminposuw %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x41,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1627,13 +1433,13 @@ declare <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse41_pmaxsb(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse41_pmaxsb: ; AVX: ## BB#0: -; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3c,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pmaxsb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3c,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1643,13 +1449,13 @@ declare <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse41_pmaxsd(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse41_pmaxsd: ; AVX: ## BB#0: -; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pmaxsd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1659,13 +1465,13 @@ declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pmaxud(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse41_pmaxud: ; AVX: ## BB#0: -; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3f,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pmaxud: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3f,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1675,13 +1481,13 @@ declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse41_pmaxuw(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse41_pmaxuw: ; AVX: ## BB#0: -; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3e,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pmaxuw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3e,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1691,13 +1497,13 @@ declare <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse41_pminsb(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_sse41_pminsb: ; AVX: ## BB#0: -; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x38,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pminsb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x38,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1707,13 +1513,13 @@ declare <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse41_pminsd(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse41_pminsd: ; AVX: ## BB#0: -; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x39,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pminsd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x39,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1723,13 +1529,13 @@ declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pminud(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse41_pminud: ; AVX: ## BB#0: -; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpminud %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3b,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pminud: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminud %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminud %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1739,13 +1545,13 @@ declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse41_pminuw(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_sse41_pminuw: ; AVX: ## BB#0: -; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3a,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pminuw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminuw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3a,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1755,13 +1561,13 @@ declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_sse41_pmuldq: ; AVX: ## BB#0: -; AVX-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x28,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse41_pmuldq: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0xfd,0x08,0x28,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1769,19 +1575,12 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_sse41_ptestc: -; AVX: ## BB#0: -; AVX-NEXT: vptest %xmm1, %xmm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_ptestc: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vptest %xmm1, %xmm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_ptestc: +; CHECK: ## BB#0: +; CHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1] +; CHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; CHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -1789,19 +1588,12 @@ declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_sse41_ptestnzc: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vptest %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_ptestnzc: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vptest %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_ptestnzc: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1] +; CHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -1809,19 +1601,12 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_sse41_ptestz: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vptest %xmm1, %xmm0 -; AVX-NEXT: sete %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_ptestz: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vptest %xmm1, %xmm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_ptestz: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1] +; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -1829,15 +1614,10 @@ declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse41_round_pd: -; AVX: ## BB#0: -; AVX-NEXT: vroundpd $7, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_round_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vroundpd $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_round_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vroundpd $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x09,0xc0,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1845,15 +1625,10 @@ declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readno define <4 x float> @test_x86_sse41_round_ps(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse41_round_ps: -; AVX: ## BB#0: -; AVX-NEXT: vroundps $7, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_round_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vroundps $7, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_round_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vroundps $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x08,0xc0,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1861,15 +1636,10 @@ declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone define <2 x double> @test_x86_sse41_round_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse41_round_sd: -; AVX: ## BB#0: -; AVX-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_round_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_round_sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0b,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1877,15 +1647,10 @@ declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) n define <4 x float> @test_x86_sse41_round_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse41_round_ss: -; AVX: ## BB#0: -; AVX-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse41_round_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse41_round_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0a,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -1893,21 +1658,13 @@ declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) noun define i32 @test_x86_sse42_pcmpestri128(<16 x i8> %a0, <16 x i8> %a2) { -; AVX-LABEL: test_x86_sse42_pcmpestri128: -; AVX: ## BB#0: -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX-NEXT: movl %ecx, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestri128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: movl %ecx, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestri128: +; CHECK: ## BB#0: +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; CHECK-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1917,25 +1674,25 @@ declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nou define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) { ; AVX-LABEL: test_x86_sse42_pcmpestri128_load: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmovdqa (%eax), %xmm0 -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: vpcmpestri $7, (%ecx), %xmm0 -; AVX-NEXT: movl %ecx, %eax -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vmovdqa (%eax), %xmm0 ## encoding: [0xc5,0xf9,0x6f,0x00] +; AVX-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; AVX-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; AVX-NEXT: vpcmpestri $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0x01,0x07] +; AVX-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse42_pcmpestri128_load: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmovdqa64 (%eax), %xmm0 -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: vpcmpestri $7, (%ecx), %xmm0 -; AVX512VL-NEXT: movl %ecx, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vmovdqu8 (%eax), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x00] +; AVX512VL-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; AVX512VL-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; AVX512VL-NEXT: vpcmpestri $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0x01,0x07] +; AVX512VL-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a0 %2 = load <16 x i8>, <16 x i8>* %a2 %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; [#uses=1] @@ -1944,29 +1701,17 @@ define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) { define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; AVX-LABEL: test_x86_sse42_pcmpestria128: -; AVX: ## BB#0: -; AVX-NEXT: pushl %ebx -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: xorl %ebx, %ebx -; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX-NEXT: seta %bl -; AVX-NEXT: movl %ebx, %eax -; AVX-NEXT: popl %ebx -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestria128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: pushl %ebx -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: xorl %ebx, %ebx -; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: seta %bl -; AVX512VL-NEXT: movl %ebx, %eax -; AVX512VL-NEXT: popl %ebx -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestria128: +; CHECK: ## BB#0: +; CHECK-NEXT: pushl %ebx ## encoding: [0x53] +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; CHECK-NEXT: seta %bl ## encoding: [0x0f,0x97,0xc3] +; CHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; CHECK-NEXT: popl %ebx ## encoding: [0x5b] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1974,23 +1719,14 @@ declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestric128(<16 x i8> %a0, <16 x i8> %a2) { -; AVX-LABEL: test_x86_sse42_pcmpestric128: -; AVX: ## BB#0: -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestric128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestric128: +; CHECK: ## BB#0: +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; CHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; CHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -1998,29 +1734,17 @@ declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; AVX-LABEL: test_x86_sse42_pcmpestrio128: -; AVX: ## BB#0: -; AVX-NEXT: pushl %ebx -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: xorl %ebx, %ebx -; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX-NEXT: seto %bl -; AVX-NEXT: movl %ebx, %eax -; AVX-NEXT: popl %ebx -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestrio128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: pushl %ebx -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: xorl %ebx, %ebx -; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: seto %bl -; AVX512VL-NEXT: movl %ebx, %eax -; AVX512VL-NEXT: popl %ebx -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestrio128: +; CHECK: ## BB#0: +; CHECK-NEXT: pushl %ebx ## encoding: [0x53] +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; CHECK-NEXT: seto %bl ## encoding: [0x0f,0x90,0xc3] +; CHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; CHECK-NEXT: popl %ebx ## encoding: [0x5b] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -2028,29 +1752,17 @@ declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; AVX-LABEL: test_x86_sse42_pcmpestris128: -; AVX: ## BB#0: -; AVX-NEXT: pushl %ebx -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: xorl %ebx, %ebx -; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX-NEXT: sets %bl -; AVX-NEXT: movl %ebx, %eax -; AVX-NEXT: popl %ebx -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestris128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: pushl %ebx -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: xorl %ebx, %ebx -; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: sets %bl -; AVX512VL-NEXT: movl %ebx, %eax -; AVX512VL-NEXT: popl %ebx -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestris128: +; CHECK: ## BB#0: +; CHECK-NEXT: pushl %ebx ## encoding: [0x53] +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; CHECK-NEXT: sets %bl ## encoding: [0x0f,0x98,0xc3] +; CHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; CHECK-NEXT: popl %ebx ## encoding: [0x5b] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -2058,29 +1770,17 @@ declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; AVX-LABEL: test_x86_sse42_pcmpestriz128: -; AVX: ## BB#0: -; AVX-NEXT: pushl %ebx -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: xorl %ebx, %ebx -; AVX-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX-NEXT: sete %bl -; AVX-NEXT: movl %ebx, %eax -; AVX-NEXT: popl %ebx -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestriz128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: pushl %ebx -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: xorl %ebx, %ebx -; AVX512VL-NEXT: vpcmpestri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: sete %bl -; AVX512VL-NEXT: movl %ebx, %eax -; AVX512VL-NEXT: popl %ebx -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestriz128: +; CHECK: ## BB#0: +; CHECK-NEXT: pushl %ebx ## encoding: [0x53] +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; CHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; CHECK-NEXT: sete %bl ## encoding: [0x0f,0x94,0xc3] +; CHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; CHECK-NEXT: popl %ebx ## encoding: [0x5b] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -2088,19 +1788,12 @@ declare i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8>, i32, <16 x i8>, i32, i8) no define <16 x i8> @test_x86_sse42_pcmpestrm128(<16 x i8> %a0, <16 x i8> %a2) { -; AVX-LABEL: test_x86_sse42_pcmpestrm128: -; AVX: ## BB#0: -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: vpcmpestrm $7, %xmm1, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestrm128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: vpcmpestrm $7, %xmm1, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestrm128: +; CHECK: ## BB#0: +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: vpcmpestrm $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x60,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -2108,21 +1801,13 @@ declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2) { -; AVX-LABEL: test_x86_sse42_pcmpestrm128_load: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: movl $7, %edx -; AVX-NEXT: vpcmpestrm $7, (%ecx), %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpestrm128_load: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: movl $7, %edx -; AVX512VL-NEXT: vpcmpestrm $7, (%ecx), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpestrm128_load: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; CHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; CHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; CHECK-NEXT: vpcmpestrm $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x60,0x01,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a2 %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %1, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res @@ -2130,17 +1815,11 @@ define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2 define i32 @test_x86_sse42_pcmpistri128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistri128: -; AVX: ## BB#0: -; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX-NEXT: movl %ecx, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistri128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: movl %ecx, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistri128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; CHECK-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -2150,21 +1829,21 @@ declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8>, <16 x i8>, i8) nounwind read define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) { ; AVX-LABEL: test_x86_sse42_pcmpistri128_load: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX-NEXT: vmovdqa (%ecx), %xmm0 -; AVX-NEXT: vpcmpistri $7, (%eax), %xmm0 -; AVX-NEXT: movl %ecx, %eax -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; AVX-NEXT: vmovdqa (%ecx), %xmm0 ## encoding: [0xc5,0xf9,0x6f,0x01] +; AVX-NEXT: vpcmpistri $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0x00,0x07] +; AVX-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse42_pcmpistri128_load: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX512VL-NEXT: vmovdqa64 (%ecx), %xmm0 -; AVX512VL-NEXT: vpcmpistri $7, (%eax), %xmm0 -; AVX512VL-NEXT: movl %ecx, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; AVX512VL-NEXT: vmovdqu8 (%ecx), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x01] +; AVX512VL-NEXT: vpcmpistri $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0x00,0x07] +; AVX512VL-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a0 %2 = load <16 x i8>, <16 x i8>* %a1 %res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %1, <16 x i8> %2, i8 7) ; [#uses=1] @@ -2173,19 +1852,12 @@ define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) { define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistria128: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistria128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistria128: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; CHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -2193,19 +1865,12 @@ declare i32 @llvm.x86.sse42.pcmpistria128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistric128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistric128: -; AVX: ## BB#0: -; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistric128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistric128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; CHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; CHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -2213,19 +1878,12 @@ declare i32 @llvm.x86.sse42.pcmpistric128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistrio128: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX-NEXT: seto %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistrio128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: seto %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistrio128: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; CHECK-NEXT: seto %al ## encoding: [0x0f,0x90,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -2233,19 +1891,12 @@ declare i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistris128: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX-NEXT: sets %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistris128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: sets %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistris128: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; CHECK-NEXT: sets %al ## encoding: [0x0f,0x98,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -2253,19 +1904,12 @@ declare i32 @llvm.x86.sse42.pcmpistris128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistriz128: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX-NEXT: sete %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistriz128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vpcmpistri $7, %xmm1, %xmm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistriz128: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -2273,15 +1917,10 @@ declare i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8>, <16 x i8>, i8) nounwind rea define <16 x i8> @test_x86_sse42_pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistrm128: -; AVX: ## BB#0: -; AVX-NEXT: vpcmpistrm $7, %xmm1, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistrm128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpcmpistrm $7, %xmm1, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistrm128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpcmpistrm $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x62,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -2289,17 +1928,11 @@ declare <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8>, <16 x i8>, i8) nounwin define <16 x i8> @test_x86_sse42_pcmpistrm128_load(<16 x i8> %a0, <16 x i8>* %a1) { -; AVX-LABEL: test_x86_sse42_pcmpistrm128_load: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vpcmpistrm $7, (%eax), %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse42_pcmpistrm128_load: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpcmpistrm $7, (%eax), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse42_pcmpistrm128_load: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpcmpistrm $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x62,0x00,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a1 %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res @@ -2307,15 +1940,10 @@ define <16 x i8> @test_x86_sse42_pcmpistrm128_load(<16 x i8> %a0, <16 x i8>* %a1 define <4 x float> @test_x86_sse_add_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_add_ss: -; AVX: ## BB#0: -; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_add_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaddss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_add_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vaddss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x58,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2323,15 +1951,10 @@ declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_cmp_ps: -; AVX: ## BB#0: -; AVX-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_cmp_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_cmp_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0xc2,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2339,15 +1962,10 @@ declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse_cmp_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_cmp_ss: -; AVX: ## BB#0: -; AVX-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_cmp_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_cmp_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0xc2,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2357,21 +1975,21 @@ declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_comieq_ss: ; AVX: ## BB#0: -; AVX-NEXT: vcomiss %xmm1, %xmm0 -; AVX-NEXT: setnp %al -; AVX-NEXT: sete %cl -; AVX-NEXT: andb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_comieq_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 -; AVX512VL-NEXT: setnp %al -; AVX512VL-NEXT: sete %cl -; AVX512VL-NEXT: andb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; AVX512VL-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX512VL-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX512VL-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2381,17 +1999,17 @@ declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_comige_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomiss %xmm1, %xmm0 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_comige_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2401,17 +2019,17 @@ declare i32 @llvm.x86.sse.comige.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_comigt_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomiss %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_comigt_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2421,17 +2039,17 @@ declare i32 @llvm.x86.sse.comigt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_comile_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomiss %xmm0, %xmm1 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2f,0xc8] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_comile_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomiss %xmm0, %xmm1 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc8] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2441,17 +2059,17 @@ declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_comilt_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vcomiss %xmm0, %xmm1 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2f,0xc8] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_comilt_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vcomiss %xmm0, %xmm1 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc8] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2461,21 +2079,21 @@ declare i32 @llvm.x86.sse.comilt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comineq_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_comineq_ss: ; AVX: ## BB#0: -; AVX-NEXT: vcomiss %xmm1, %xmm0 -; AVX-NEXT: setp %al -; AVX-NEXT: setne %cl -; AVX-NEXT: orb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_comineq_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 -; AVX512VL-NEXT: setp %al -; AVX512VL-NEXT: setne %cl -; AVX512VL-NEXT: orb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; AVX512VL-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX512VL-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX512VL-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2485,15 +2103,15 @@ declare i32 @llvm.x86.sse.comineq.ss(<4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_sse_cvtsi2ss(<4 x float> %a0) { ; AVX-LABEL: test_x86_sse_cvtsi2ss: ; AVX: ## BB#0: -; AVX-NEXT: movl $7, %eax -; AVX-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; AVX-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x2a,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_cvtsi2ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl $7, %eax -; AVX512VL-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; AVX512VL-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7e,0x08,0x2a,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2503,13 +2121,13 @@ declare <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float>, i32) nounwind readnone define i32 @test_x86_sse_cvtss2si(<4 x float> %a0) { ; AVX-LABEL: test_x86_sse_cvtss2si: ; AVX: ## BB#0: -; AVX-NEXT: vcvtss2si %xmm0, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcvtss2si %xmm0, %eax ## encoding: [0xc5,0xfa,0x2d,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_cvtss2si: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtss2si %xmm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvtss2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7e,0x08,0x2d,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -2519,13 +2137,13 @@ declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone define i32 @test_x86_sse_cvttss2si(<4 x float> %a0) { ; AVX-LABEL: test_x86_sse_cvttss2si: ; AVX: ## BB#0: -; AVX-NEXT: vcvttss2si %xmm0, %eax -; AVX-NEXT: retl +; AVX-NEXT: vcvttss2si %xmm0, %eax ## encoding: [0xc5,0xfa,0x2c,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_cvttss2si: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttss2si %xmm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvttss2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7e,0x08,0x2c,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -2533,15 +2151,10 @@ declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_div_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_div_ss: -; AVX: ## BB#0: -; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_div_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vdivss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_div_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vdivss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5e,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2549,17 +2162,11 @@ declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind read define void @test_x86_sse_ldmxcsr(i8* %a0) { -; AVX-LABEL: test_x86_sse_ldmxcsr: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vldmxcsr (%eax) -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_ldmxcsr: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vldmxcsr (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_ldmxcsr: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vldmxcsr (%eax) ## encoding: [0xc5,0xf8,0xae,0x10] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.sse.ldmxcsr(i8* %a0) ret void } @@ -2570,13 +2177,13 @@ declare void @llvm.x86.sse.ldmxcsr(i8*) nounwind define <4 x float> @test_x86_sse_max_ps(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_max_ps: ; AVX: ## BB#0: -; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vmaxps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5f,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_max_ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vmaxps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x5f,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2584,15 +2191,10 @@ declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_max_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_max_ss: -; AVX: ## BB#0: -; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_max_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_max_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vmaxss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5f,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2602,13 +2204,13 @@ declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_min_ps(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_min_ps: ; AVX: ## BB#0: -; AVX-NEXT: vminps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vminps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_min_ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vminps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x5d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2616,15 +2218,10 @@ declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_min_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_min_ss: -; AVX: ## BB#0: -; AVX-NEXT: vminss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_min_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_min_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vminss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5d,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2632,15 +2229,10 @@ declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind read define i32 @test_x86_sse_movmsk_ps(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse_movmsk_ps: -; AVX: ## BB#0: -; AVX-NEXT: vmovmskps %xmm0, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_movmsk_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmovmskps %xmm0, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_movmsk_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vmovmskps %xmm0, %eax ## encoding: [0xc5,0xf8,0x50,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -2649,15 +2241,10 @@ declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_mul_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_mul_ss: -; AVX: ## BB#0: -; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_mul_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmulss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_mul_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x59,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2667,13 +2254,13 @@ declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_rcp_ps(<4 x float> %a0) { ; AVX-LABEL: test_x86_sse_rcp_ps: ; AVX: ## BB#0: -; AVX-NEXT: vrcpps %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vrcpps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x53,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_rcp_ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vrcp14ps %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vrcp14ps %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x4c,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2681,15 +2268,10 @@ declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rcp_ss(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse_rcp_ss: -; AVX: ## BB#0: -; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_rcp_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vrcpss %xmm0, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_rcp_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vrcpss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x53,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2699,13 +2281,13 @@ declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rsqrt_ps(<4 x float> %a0) { ; AVX-LABEL: test_x86_sse_rsqrt_ps: ; AVX: ## BB#0: -; AVX-NEXT: vrsqrtps %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vrsqrtps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x52,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_rsqrt_ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vrsqrt14ps %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vrsqrt14ps %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x4e,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2713,15 +2295,10 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rsqrt_ss(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse_rsqrt_ss: -; AVX: ## BB#0: -; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_rsqrt_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_rsqrt_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x52,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2729,15 +2306,10 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_sqrt_ps(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse_sqrt_ps: -; AVX: ## BB#0: -; AVX-NEXT: vsqrtps %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_sqrt_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsqrtps %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_sqrt_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vsqrtps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x51,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2745,15 +2317,10 @@ declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_sqrt_ss(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse_sqrt_ss: -; AVX: ## BB#0: -; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_sqrt_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_sqrt_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x51,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2761,17 +2328,11 @@ declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone define void @test_x86_sse_stmxcsr(i8* %a0) { -; AVX-LABEL: test_x86_sse_stmxcsr: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vstmxcsr (%eax) -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_stmxcsr: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vstmxcsr (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_stmxcsr: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vstmxcsr (%eax) ## encoding: [0xc5,0xf8,0xae,0x18] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.sse.stmxcsr(i8* %a0) ret void } @@ -2779,15 +2340,10 @@ declare void @llvm.x86.sse.stmxcsr(i8*) nounwind define <4 x float> @test_x86_sse_sub_ss(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_sse_sub_ss: -; AVX: ## BB#0: -; AVX-NEXT: vsubss %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_sse_sub_ss: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsubss %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_sse_sub_ss: +; CHECK: ## BB#0: +; CHECK-NEXT: vsubss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5c,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -2797,21 +2353,21 @@ declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) nounwind read define i32 @test_x86_sse_ucomieq_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_ucomieq_ss: ; AVX: ## BB#0: -; AVX-NEXT: vucomiss %xmm1, %xmm0 -; AVX-NEXT: setnp %al -; AVX-NEXT: sete %cl -; AVX-NEXT: andb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_ucomieq_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 -; AVX512VL-NEXT: setnp %al -; AVX512VL-NEXT: sete %cl -; AVX512VL-NEXT: andb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; AVX512VL-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX512VL-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX512VL-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2821,17 +2377,17 @@ declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_ucomige_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomiss %xmm1, %xmm0 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_ucomige_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2841,17 +2397,17 @@ declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_ucomigt_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomiss %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_ucomigt_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2861,17 +2417,17 @@ declare i32 @llvm.x86.sse.ucomigt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_ucomile_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomiss %xmm0, %xmm1 -; AVX-NEXT: setae %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2e,0xc8] +; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_ucomile_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomiss %xmm0, %xmm1 -; AVX512VL-NEXT: setae %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc8] +; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2881,17 +2437,17 @@ declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_ucomilt_ss: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vucomiss %xmm0, %xmm1 -; AVX-NEXT: seta %al -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2e,0xc8] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_ucomilt_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vucomiss %xmm0, %xmm1 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc8] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2901,21 +2457,21 @@ declare i32 @llvm.x86.sse.ucomilt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1) { ; AVX-LABEL: test_x86_sse_ucomineq_ss: ; AVX: ## BB#0: -; AVX-NEXT: vucomiss %xmm1, %xmm0 -; AVX-NEXT: setp %al -; AVX-NEXT: setne %cl -; AVX-NEXT: orb %al, %cl -; AVX-NEXT: movzbl %cl, %eax -; AVX-NEXT: retl +; AVX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_sse_ucomineq_ss: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 -; AVX512VL-NEXT: setp %al -; AVX512VL-NEXT: setne %cl -; AVX512VL-NEXT: orb %al, %cl -; AVX512VL-NEXT: movzbl %cl, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; AVX512VL-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX512VL-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX512VL-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -2925,13 +2481,13 @@ declare i32 @llvm.x86.sse.ucomineq.ss(<4 x float>, <4 x float>) nounwind readnon define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) { ; AVX-LABEL: test_x86_ssse3_pabs_b_128: ; AVX: ## BB#0: -; AVX-NEXT: vpabsb %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpabsb %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1c,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_ssse3_pabs_b_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpabsb %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpabsb %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1c,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -2941,13 +2497,13 @@ declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone define <4 x i32> @test_x86_ssse3_pabs_d_128(<4 x i32> %a0) { ; AVX-LABEL: test_x86_ssse3_pabs_d_128: ; AVX: ## BB#0: -; AVX-NEXT: vpabsd %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpabsd %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1e,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_ssse3_pabs_d_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpabsd %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpabsd %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1e,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2957,13 +2513,13 @@ declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone define <8 x i16> @test_x86_ssse3_pabs_w_128(<8 x i16> %a0) { ; AVX-LABEL: test_x86_ssse3_pabs_w_128: ; AVX: ## BB#0: -; AVX-NEXT: vpabsw %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpabsw %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1d,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_ssse3_pabs_w_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpabsw %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpabsw %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1d,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -2971,15 +2527,10 @@ declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone define <4 x i32> @test_x86_ssse3_phadd_d_128(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_ssse3_phadd_d_128: -; AVX: ## BB#0: -; AVX-NEXT: vphaddd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_phadd_d_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphaddd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_phadd_d_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vphaddd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x02,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -2987,15 +2538,10 @@ declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_phadd_sw_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_ssse3_phadd_sw_128: -; AVX: ## BB#0: -; AVX-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_phadd_sw_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_phadd_sw_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x03,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3003,15 +2549,10 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind re define <8 x i16> @test_x86_ssse3_phadd_w_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_ssse3_phadd_w_128: -; AVX: ## BB#0: -; AVX-NEXT: vphaddw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_phadd_w_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphaddw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_phadd_w_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vphaddw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x01,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3019,15 +2560,10 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind rea define <4 x i32> @test_x86_ssse3_phsub_d_128(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_ssse3_phsub_d_128: -; AVX: ## BB#0: -; AVX-NEXT: vphsubd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_phsub_d_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphsubd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_phsub_d_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vphsubd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x06,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -3035,15 +2571,10 @@ declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_phsub_sw_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_ssse3_phsub_sw_128: -; AVX: ## BB#0: -; AVX-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_phsub_sw_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_phsub_sw_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x07,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3051,15 +2582,10 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind re define <8 x i16> @test_x86_ssse3_phsub_w_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_ssse3_phsub_w_128: -; AVX: ## BB#0: -; AVX-NEXT: vphsubw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_phsub_w_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphsubw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_phsub_w_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vphsubw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x05,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3069,13 +2595,13 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind rea define <8 x i16> @test_x86_ssse3_pmadd_ub_sw_128(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_ssse3_pmadd_ub_sw_128: ; AVX: ## BB#0: -; AVX-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x04,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_ssse3_pmadd_ub_sw_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x04,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a0, <16 x i8> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3085,13 +2611,13 @@ declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind define <8 x i16> @test_x86_ssse3_pmul_hr_sw_128(<8 x i16> %a0, <8 x i16> %a1) { ; AVX-LABEL: test_x86_ssse3_pmul_hr_sw_128: ; AVX: ## BB#0: -; AVX-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0b,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_ssse3_pmul_hr_sw_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x0b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3101,13 +2627,13 @@ declare <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16>, <8 x i16>) nounwind define <16 x i8> @test_x86_ssse3_pshuf_b_128(<16 x i8> %a0, <16 x i8> %a1) { ; AVX-LABEL: test_x86_ssse3_pshuf_b_128: ; AVX: ## BB#0: -; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x00,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_ssse3_pshuf_b_128: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x00,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -3115,15 +2641,10 @@ declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind rea define <16 x i8> @test_x86_ssse3_psign_b_128(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_ssse3_psign_b_128: -; AVX: ## BB#0: -; AVX-NEXT: vpsignb %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_psign_b_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsignb %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_psign_b_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpsignb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x08,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -3131,15 +2652,10 @@ declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind rea define <4 x i32> @test_x86_ssse3_psign_d_128(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_ssse3_psign_d_128: -; AVX: ## BB#0: -; AVX-NEXT: vpsignd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_psign_d_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsignd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_psign_d_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpsignd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0a,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -3147,15 +2663,10 @@ declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_psign_w_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_ssse3_psign_w_128: -; AVX: ## BB#0: -; AVX-NEXT: vpsignw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_ssse3_psign_w_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsignw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_ssse3_psign_w_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpsignw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x09,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -3163,15 +2674,10 @@ declare <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16>, <8 x i16>) nounwind rea define <4 x double> @test_x86_avx_addsub_pd_256(<4 x double> %a0, <4 x double> %a1) { -; AVX-LABEL: test_x86_avx_addsub_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_addsub_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_addsub_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vaddsubpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xd0,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3179,15 +2685,10 @@ declare <4 x double> @llvm.x86.avx.addsub.pd.256(<4 x double>, <4 x double>) nou define <8 x float> @test_x86_avx_addsub_ps_256(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_addsub_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_addsub_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_addsub_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vaddsubps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xff,0xd0,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3195,15 +2696,10 @@ declare <8 x float> @llvm.x86.avx.addsub.ps.256(<8 x float>, <8 x float>) nounwi define <4 x double> @test_x86_avx_blendv_pd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) { -; AVX-LABEL: test_x86_avx_blendv_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_blendv_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_blendv_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x4b,0xc1,0x20] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3211,15 +2707,10 @@ declare <4 x double> @llvm.x86.avx.blendv.pd.256(<4 x double>, <4 x double>, <4 define <8 x float> @test_x86_avx_blendv_ps_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { -; AVX-LABEL: test_x86_avx_blendv_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_blendv_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_blendv_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x4a,0xc1,0x20] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3227,15 +2718,10 @@ declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x f define <4 x double> @test_x86_avx_cmp_pd_256(<4 x double> %a0, <4 x double> %a1) { -; AVX-LABEL: test_x86_avx_cmp_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vcmpordpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_cmp_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpordpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_cmp_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpordpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xc2,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double> %a0, <4 x double> %a1, i8 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3243,91 +2729,50 @@ declare <4 x double> @llvm.x86.avx.cmp.pd.256(<4 x double>, <4 x double>, i8) no define <8 x float> @test_x86_avx_cmp_ps_256(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_cmp_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vcmpordps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_cmp_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpordps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_cmp_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpordps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0xc2,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } define <8 x float> @test_x86_avx_cmp_ps_256_pseudo_op(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_cmp_ps_256_pseudo_op: -; AVX: ## BB#0: -; AVX-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpltps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpleps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpunordps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpneqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpnltps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpnleps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpordps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpeq_uqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpngeps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpngtps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpfalseps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpneq_oqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpgeps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpgtps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmptrueps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpeq_osps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmplt_oqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmple_oqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpunord_sps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpneq_usps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpnlt_uqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpnle_uqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpord_sps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpeq_usps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpnge_uqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpngt_uqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpfalse_osps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpneq_osps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpge_oqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmpgt_oqps %ymm1, %ymm0, %ymm1 -; AVX-NEXT: vcmptrue_usps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_cmp_ps_256_pseudo_op: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpltps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpleps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpunordps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpneqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpnltps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpnleps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpordps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpeq_uqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpngeps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpngtps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpfalseps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpneq_oqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpgeps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpgtps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmptrueps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpeq_osps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmplt_oqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmple_oqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpunord_sps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpneq_usps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpnlt_uqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpnle_uqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpord_sps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpeq_usps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpnge_uqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpngt_uqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpfalse_osps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpneq_osps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpge_oqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmpgt_oqps %ymm1, %ymm0, %ymm1 -; AVX512VL-NEXT: vcmptrue_usps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_cmp_ps_256_pseudo_op: +; CHECK: ## BB#0: +; CHECK-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x00] +; CHECK-NEXT: vcmpltps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x01] +; CHECK-NEXT: vcmpleps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x02] +; CHECK-NEXT: vcmpunordps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x03] +; CHECK-NEXT: vcmpneqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x04] +; CHECK-NEXT: vcmpnltps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x05] +; CHECK-NEXT: vcmpnleps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x06] +; CHECK-NEXT: vcmpordps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x07] +; CHECK-NEXT: vcmpeq_uqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x08] +; CHECK-NEXT: vcmpngeps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x09] +; CHECK-NEXT: vcmpngtps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x0a] +; CHECK-NEXT: vcmpfalseps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x0b] +; CHECK-NEXT: vcmpneq_oqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x0c] +; CHECK-NEXT: vcmpgeps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x0d] +; CHECK-NEXT: vcmpgtps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x0e] +; CHECK-NEXT: vcmptrueps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x0f] +; CHECK-NEXT: vcmpeq_osps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x10] +; CHECK-NEXT: vcmplt_oqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x11] +; CHECK-NEXT: vcmple_oqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x12] +; CHECK-NEXT: vcmpunord_sps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x13] +; CHECK-NEXT: vcmpneq_usps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x14] +; CHECK-NEXT: vcmpnlt_uqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x15] +; CHECK-NEXT: vcmpnle_uqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x16] +; CHECK-NEXT: vcmpord_sps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x17] +; CHECK-NEXT: vcmpeq_usps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x18] +; CHECK-NEXT: vcmpnge_uqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x19] +; CHECK-NEXT: vcmpngt_uqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x1a] +; CHECK-NEXT: vcmpfalse_osps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x1b] +; CHECK-NEXT: vcmpneq_osps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x1c] +; CHECK-NEXT: vcmpge_oqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x1d] +; CHECK-NEXT: vcmpgt_oqps %ymm1, %ymm0, %ymm1 ## encoding: [0xc5,0xfc,0xc2,0xc9,0x1e] +; CHECK-NEXT: vcmptrue_usps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0xc2,0xc1,0x1f] +; CHECK-NEXT: retl ## encoding: [0xc3] %a2 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 0) ; <<8 x float>> [#uses=1] %a3 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a2, i8 1) ; <<8 x float>> [#uses=1] %a4 = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a3, i8 2) ; <<8 x float>> [#uses=1] @@ -3368,14 +2813,14 @@ declare <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float>, <8 x float>, i8) nounw define <4 x float> @test_x86_avx_cvt_pd2_ps_256(<4 x double> %a0) { ; AVX-LABEL: test_x86_avx_cvt_pd2_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0 -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vcvtpd2psy %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0x5a,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_cvt_pd2_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtpd2psy %ymm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvtpd2psy %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0x5a,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -3385,14 +2830,14 @@ declare <4 x float> @llvm.x86.avx.cvt.pd2.ps.256(<4 x double>) nounwind readnone define <4 x i32> @test_x86_avx_cvt_pd2dq_256(<4 x double> %a0) { ; AVX-LABEL: test_x86_avx_cvt_pd2dq_256: ; AVX: ## BB#0: -; AVX-NEXT: vcvtpd2dqy %ymm0, %xmm0 -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vcvtpd2dqy %ymm0, %xmm0 ## encoding: [0xc5,0xff,0xe6,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_cvt_pd2dq_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtpd2dqy %ymm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvtpd2dqy %ymm0, %xmm0 ## encoding: [0xc5,0xff,0xe6,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -3400,15 +2845,10 @@ declare <4 x i32> @llvm.x86.avx.cvt.pd2dq.256(<4 x double>) nounwind readnone define <8 x i32> @test_x86_avx_cvt_ps2dq_256(<8 x float> %a0) { -; AVX-LABEL: test_x86_avx_cvt_ps2dq_256: -; AVX: ## BB#0: -; AVX-NEXT: vcvtps2dq %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_cvt_ps2dq_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtps2dq %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_cvt_ps2dq_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtps2dq %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x5b,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -3416,15 +2856,10 @@ declare <8 x i32> @llvm.x86.avx.cvt.ps2dq.256(<8 x float>) nounwind readnone define <8 x float> @test_x86_avx_cvtdq2_ps_256(<8 x i32> %a0) { -; AVX-LABEL: test_x86_avx_cvtdq2_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vcvtdq2ps %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_cvtdq2_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtdq2ps %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_cvtdq2_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0x5b,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.cvtdq2.ps.256(<8 x i32> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3434,14 +2869,14 @@ declare <8 x float> @llvm.x86.avx.cvtdq2.ps.256(<8 x i32>) nounwind readnone define <4 x i32> @test_x86_avx_cvtt_pd2dq_256(<4 x double> %a0) { ; AVX-LABEL: test_x86_avx_cvtt_pd2dq_256: ; AVX: ## BB#0: -; AVX-NEXT: vcvttpd2dqy %ymm0, %xmm0 -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vcvttpd2dqy %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0xe6,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_cvtt_pd2dq_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttpd2dqy %ymm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vcvttpd2dqy %ymm0, %xmm0 ## encoding: [0xc5,0xfd,0xe6,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -3449,15 +2884,10 @@ declare <4 x i32> @llvm.x86.avx.cvtt.pd2dq.256(<4 x double>) nounwind readnone define <8 x i32> @test_x86_avx_cvtt_ps2dq_256(<8 x float> %a0) { -; AVX-LABEL: test_x86_avx_cvtt_ps2dq_256: -; AVX: ## BB#0: -; AVX-NEXT: vcvttps2dq %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_cvtt_ps2dq_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttps2dq %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_cvtt_ps2dq_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0 ## encoding: [0xc5,0xfe,0x5b,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -3465,15 +2895,10 @@ declare <8 x i32> @llvm.x86.avx.cvtt.ps2dq.256(<8 x float>) nounwind readnone define <8 x float> @test_x86_avx_dp_ps_256(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_dp_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_dp_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_dp_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x40,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3481,15 +2906,10 @@ declare <8 x float> @llvm.x86.avx.dp.ps.256(<8 x float>, <8 x float>, i8) nounwi define <4 x double> @test_x86_avx_hadd_pd_256(<4 x double> %a0, <4 x double> %a1) { -; AVX-LABEL: test_x86_avx_hadd_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_hadd_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_hadd_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vhaddpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x7c,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3497,15 +2917,10 @@ declare <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double>, <4 x double>) nounw define <8 x float> @test_x86_avx_hadd_ps_256(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_hadd_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vhaddps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_hadd_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhaddps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_hadd_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vhaddps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xff,0x7c,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3513,15 +2928,10 @@ declare <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float>, <8 x float>) nounwind define <4 x double> @test_x86_avx_hsub_pd_256(<4 x double> %a0, <4 x double> %a1) { -; AVX-LABEL: test_x86_avx_hsub_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_hsub_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_hsub_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vhsubpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x7d,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3529,15 +2939,10 @@ declare <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double>, <4 x double>) nounw define <8 x float> @test_x86_avx_hsub_ps_256(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_hsub_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vhsubps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_hsub_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vhsubps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_hsub_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vhsubps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xff,0x7d,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3545,17 +2950,11 @@ declare <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float>, <8 x float>) nounwind define <32 x i8> @test_x86_avx_ldu_dq_256(i8* %a0) { -; AVX-LABEL: test_x86_avx_ldu_dq_256: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vlddqu (%eax), %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_ldu_dq_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vlddqu (%eax), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_ldu_dq_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vlddqu (%eax), %ymm0 ## encoding: [0xc5,0xff,0xf0,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx.ldu.dq.256(i8* %a0) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -3563,17 +2962,11 @@ declare <32 x i8> @llvm.x86.avx.ldu.dq.256(i8*) nounwind readonly define <2 x double> @test_x86_avx_maskload_pd(i8* %a0, <2 x i64> %mask) { -; AVX-LABEL: test_x86_avx_maskload_pd: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_maskload_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_maskload_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vmaskmovpd (%eax), %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x2d,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.avx.maskload.pd(i8* %a0, <2 x i64> %mask) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -3581,17 +2974,11 @@ declare <2 x double> @llvm.x86.avx.maskload.pd(i8*, <2 x i64>) nounwind readonly define <4 x double> @test_x86_avx_maskload_pd_256(i8* %a0, <4 x i64> %mask) { -; AVX-LABEL: test_x86_avx_maskload_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_maskload_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_maskload_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vmaskmovpd (%eax), %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x2d,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.maskload.pd.256(i8* %a0, <4 x i64> %mask) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3599,17 +2986,11 @@ declare <4 x double> @llvm.x86.avx.maskload.pd.256(i8*, <4 x i64>) nounwind read define <4 x float> @test_x86_avx_maskload_ps(i8* %a0, <4 x i32> %mask) { -; AVX-LABEL: test_x86_avx_maskload_ps: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_maskload_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_maskload_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vmaskmovps (%eax), %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x2c,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.avx.maskload.ps(i8* %a0, <4 x i32> %mask) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -3617,17 +2998,11 @@ declare <4 x float> @llvm.x86.avx.maskload.ps(i8*, <4 x i32>) nounwind readonly define <8 x float> @test_x86_avx_maskload_ps_256(i8* %a0, <8 x i32> %mask) { -; AVX-LABEL: test_x86_avx_maskload_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_maskload_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_maskload_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vmaskmovps (%eax), %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x2c,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.maskload.ps.256(i8* %a0, <8 x i32> %mask) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3635,17 +3010,11 @@ declare <8 x float> @llvm.x86.avx.maskload.ps.256(i8*, <8 x i32>) nounwind reado define void @test_x86_avx_maskstore_pd(i8* %a0, <2 x i64> %mask, <2 x double> %a2) { -; AVX-LABEL: test_x86_avx_maskstore_pd: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_maskstore_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_maskstore_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vmaskmovpd %xmm1, %xmm0, (%eax) ## encoding: [0xc4,0xe2,0x79,0x2f,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx.maskstore.pd(i8* %a0, <2 x i64> %mask, <2 x double> %a2) ret void } @@ -3655,16 +3024,16 @@ declare void @llvm.x86.avx.maskstore.pd(i8*, <2 x i64>, <2 x double>) nounwind define void @test_x86_avx_maskstore_pd_256(i8* %a0, <4 x i64> %mask, <4 x double> %a2) { ; AVX-LABEL: test_x86_avx_maskstore_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0x7d,0x2f,0x08] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_maskstore_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vmaskmovpd %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0x7d,0x2f,0x08] +; AVX512VL-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx.maskstore.pd.256(i8* %a0, <4 x i64> %mask, <4 x double> %a2) ret void } @@ -3672,17 +3041,11 @@ declare void @llvm.x86.avx.maskstore.pd.256(i8*, <4 x i64>, <4 x double>) nounwi define void @test_x86_avx_maskstore_ps(i8* %a0, <4 x i32> %mask, <4 x float> %a2) { -; AVX-LABEL: test_x86_avx_maskstore_ps: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_maskstore_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_maskstore_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vmaskmovps %xmm1, %xmm0, (%eax) ## encoding: [0xc4,0xe2,0x79,0x2e,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx.maskstore.ps(i8* %a0, <4 x i32> %mask, <4 x float> %a2) ret void } @@ -3692,16 +3055,16 @@ declare void @llvm.x86.avx.maskstore.ps(i8*, <4 x i32>, <4 x float>) nounwind define void @test_x86_avx_maskstore_ps_256(i8* %a0, <8 x i32> %mask, <8 x float> %a2) { ; AVX-LABEL: test_x86_avx_maskstore_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0x7d,0x2e,0x08] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_maskstore_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vmaskmovps %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0x7d,0x2e,0x08] +; AVX512VL-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx.maskstore.ps.256(i8* %a0, <8 x i32> %mask, <8 x float> %a2) ret void } @@ -3711,13 +3074,13 @@ declare void @llvm.x86.avx.maskstore.ps.256(i8*, <8 x i32>, <8 x float>) nounwin define <4 x double> @test_x86_avx_max_pd_256(<4 x double> %a0, <4 x double> %a1) { ; AVX-LABEL: test_x86_avx_max_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x5f,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_max_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0x5f,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3727,13 +3090,13 @@ declare <4 x double> @llvm.x86.avx.max.pd.256(<4 x double>, <4 x double>) nounwi define <8 x float> @test_x86_avx_max_ps_256(<8 x float> %a0, <8 x float> %a1) { ; AVX-LABEL: test_x86_avx_max_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vmaxps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vmaxps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0x5f,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_max_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vmaxps %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7c,0x28,0x5f,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.max.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3743,13 +3106,13 @@ declare <8 x float> @llvm.x86.avx.max.ps.256(<8 x float>, <8 x float>) nounwind define <4 x double> @test_x86_avx_min_pd_256(<4 x double> %a0, <4 x double> %a1) { ; AVX-LABEL: test_x86_avx_min_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: vminpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vminpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x5d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_min_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vminpd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0x5d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %a0, <4 x double> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3759,13 +3122,13 @@ declare <4 x double> @llvm.x86.avx.min.pd.256(<4 x double>, <4 x double>) nounwi define <8 x float> @test_x86_avx_min_ps_256(<8 x float> %a0, <8 x float> %a1) { ; AVX-LABEL: test_x86_avx_min_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vminps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vminps %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0x5d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_min_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vminps %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7c,0x28,0x5d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.min.ps.256(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3775,14 +3138,14 @@ declare <8 x float> @llvm.x86.avx.min.ps.256(<8 x float>, <8 x float>) nounwind define i32 @test_x86_avx_movmsk_pd_256(<4 x double> %a0) { ; AVX-LABEL: test_x86_avx_movmsk_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: vmovmskpd %ymm0, %eax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vmovmskpd %ymm0, %eax ## encoding: [0xc5,0xfd,0x50,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_movmsk_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmovmskpd %ymm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vmovmskpd %ymm0, %eax ## encoding: [0xc5,0xfd,0x50,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.movmsk.pd.256(<4 x double> %a0) ; [#uses=1] ret i32 %res } @@ -3792,14 +3155,14 @@ declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>) nounwind readnone define i32 @test_x86_avx_movmsk_ps_256(<8 x float> %a0) { ; AVX-LABEL: test_x86_avx_movmsk_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vmovmskps %ymm0, %eax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vmovmskps %ymm0, %eax ## encoding: [0xc5,0xfc,0x50,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_movmsk_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmovmskps %ymm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vmovmskps %ymm0, %eax ## encoding: [0xc5,0xfc,0x50,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.movmsk.ps.256(<8 x float> %a0) ; [#uses=1] ret i32 %res } @@ -3814,18 +3177,18 @@ declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>) nounwind readnone define i32 @test_x86_avx_ptestc_256(<4 x i64> %a0, <4 x i64> %a1) { ; AVX-LABEL: test_x86_avx_ptestc_256: ; AVX: ## BB#0: -; AVX-NEXT: vptest %ymm1, %ymm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vptest %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x17,0xc1] +; AVX-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; AVX-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_ptestc_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vptest %ymm1, %ymm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vptest %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x17,0xc1] +; AVX512VL-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; AVX512VL-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -3835,18 +3198,18 @@ declare i32 @llvm.x86.avx.ptestc.256(<4 x i64>, <4 x i64>) nounwind readnone define i32 @test_x86_avx_ptestnzc_256(<4 x i64> %a0, <4 x i64> %a1) { ; AVX-LABEL: test_x86_avx_ptestnzc_256: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vptest %ymm1, %ymm0 -; AVX-NEXT: seta %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vptest %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x17,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_ptestnzc_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vptest %ymm1, %ymm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vptest %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x17,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.ptestnzc.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -3856,18 +3219,18 @@ declare i32 @llvm.x86.avx.ptestnzc.256(<4 x i64>, <4 x i64>) nounwind readnone define i32 @test_x86_avx_ptestz_256(<4 x i64> %a0, <4 x i64> %a1) { ; AVX-LABEL: test_x86_avx_ptestz_256: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vptest %ymm1, %ymm0 -; AVX-NEXT: sete %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vptest %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x17,0xc1] +; AVX-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_ptestz_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vptest %ymm1, %ymm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vptest %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x17,0xc1] +; AVX512VL-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a0, <4 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -3877,13 +3240,13 @@ declare i32 @llvm.x86.avx.ptestz.256(<4 x i64>, <4 x i64>) nounwind readnone define <8 x float> @test_x86_avx_rcp_ps_256(<8 x float> %a0) { ; AVX-LABEL: test_x86_avx_rcp_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vrcpps %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vrcpps %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0x53,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_rcp_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vrcp14ps %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vrcp14ps %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x4c,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3891,15 +3254,10 @@ declare <8 x float> @llvm.x86.avx.rcp.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_x86_avx_round_pd_256(<4 x double> %a0) { -; AVX-LABEL: test_x86_avx_round_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vroundpd $7, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_round_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vroundpd $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_round_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vroundpd $7, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x09,0xc0,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.round.pd.256(<4 x double> %a0, i32 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3907,15 +3265,10 @@ declare <4 x double> @llvm.x86.avx.round.pd.256(<4 x double>, i32) nounwind read define <8 x float> @test_x86_avx_round_ps_256(<8 x float> %a0) { -; AVX-LABEL: test_x86_avx_round_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vroundps $7, %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_round_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vroundps $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_round_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vroundps $7, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x08,0xc0,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.round.ps.256(<8 x float> %a0, i32 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3925,13 +3278,13 @@ declare <8 x float> @llvm.x86.avx.round.ps.256(<8 x float>, i32) nounwind readno define <8 x float> @test_x86_avx_rsqrt_ps_256(<8 x float> %a0) { ; AVX-LABEL: test_x86_avx_rsqrt_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vrsqrtps %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vrsqrtps %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0x52,0xc0] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_rsqrt_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vrsqrt14ps %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vrsqrt14ps %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x4e,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3939,15 +3292,10 @@ declare <8 x float> @llvm.x86.avx.rsqrt.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_x86_avx_sqrt_pd_256(<4 x double> %a0) { -; AVX-LABEL: test_x86_avx_sqrt_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vsqrtpd %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_sqrt_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsqrtpd %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_sqrt_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vsqrtpd %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x51,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.sqrt.pd.256(<4 x double> %a0) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3955,15 +3303,10 @@ declare <4 x double> @llvm.x86.avx.sqrt.pd.256(<4 x double>) nounwind readnone define <8 x float> @test_x86_avx_sqrt_ps_256(<8 x float> %a0) { -; AVX-LABEL: test_x86_avx_sqrt_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vsqrtps %ymm0, %ymm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_sqrt_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vsqrtps %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_sqrt_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vsqrtps %ymm0, %ymm0 ## encoding: [0xc5,0xfc,0x51,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.sqrt.ps.256(<8 x float> %a0) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -3971,15 +3314,11 @@ declare <8 x float> @llvm.x86.avx.sqrt.ps.256(<8 x float>) nounwind readnone define <4 x double> @test_x86_avx_vperm2f128_pd_256(<4 x double> %a0, <4 x double> %a1) { -; AVX-LABEL: test_x86_avx_vperm2f128_pd_256: -; AVX: ## BB#0: -; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vperm2f128_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vperm2f128_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vperm2f128 $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x06,0xc1,0x07] +; CHECK-NEXT: ## ymm0 = ymm1[2,3],ymm0[0,1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double> %a0, <4 x double> %a1, i8 7) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -3987,15 +3326,11 @@ declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, define <8 x float> @test_x86_avx_vperm2f128_ps_256(<8 x float> %a0, <8 x float> %a1) { -; AVX-LABEL: test_x86_avx_vperm2f128_ps_256: -; AVX: ## BB#0: -; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vperm2f128_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vperm2f128_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vperm2f128 $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x06,0xc1,0x07] +; CHECK-NEXT: ## ymm0 = ymm1[2,3],ymm0[0,1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float> %a0, <8 x float> %a1, i8 7) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -4003,15 +3338,11 @@ declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8 define <8 x i32> @test_x86_avx_vperm2f128_si_256(<8 x i32> %a0, <8 x i32> %a1) { -; AVX-LABEL: test_x86_avx_vperm2f128_si_256: -; AVX: ## BB#0: -; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vperm2f128_si_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm1[2,3],ymm0[0,1] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vperm2f128_si_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vperm2f128 $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x06,0xc1,0x07] +; CHECK-NEXT: ## ymm0 = ymm1[2,3],ymm0[0,1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32> %a0, <8 x i32> %a1, i8 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -4021,13 +3352,13 @@ declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8) noun define <2 x double> @test_x86_avx_vpermilvar_pd(<2 x double> %a0, <2 x i64> %a1) { ; AVX-LABEL: test_x86_avx_vpermilvar_pd: ; AVX: ## BB#0: -; AVX-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vpermilvar_pd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermilpd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0xfd,0x08,0x0d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -4037,13 +3368,13 @@ declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>) nounwi define <4 x double> @test_x86_avx_vpermilvar_pd_256(<4 x double> %a0, <4 x i64> %a1) { ; AVX-LABEL: test_x86_avx_vpermilvar_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0d,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vpermilvar_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermilpd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0xfd,0x28,0x0d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> %a1) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -4052,13 +3383,15 @@ declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>) no define <4 x double> @test_x86_avx_vpermilvar_pd_256_2(<4 x double> %a0) { ; AVX-LABEL: test_x86_avx_vpermilvar_pd_256_2: ; AVX: ## BB#0: -; AVX-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] -; AVX-NEXT: retl +; AVX-NEXT: vpermilpd $9, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x05,0xc0,0x09] +; AVX-NEXT: ## ymm0 = ymm0[1,0,2,3] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vpermilvar_pd_256_2: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermilpd {{.*#+}} ymm0 = ymm0[1,0,2,3] -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermilpd $9, %ymm0, %ymm0 ## encoding: [0x62,0xf3,0xfd,0x28,0x05,0xc0,0x09] +; AVX512VL-NEXT: ## ymm0 = ymm0[1,0,2,3] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> ) ; <<4 x double>> [#uses=1] ret <4 x double> %res } @@ -4066,28 +3399,28 @@ define <4 x double> @test_x86_avx_vpermilvar_pd_256_2(<4 x double> %a0) { define <4 x float> @test_x86_avx_vpermilvar_ps(<4 x float> %a0, <4 x i32> %a1) { ; AVX-LABEL: test_x86_avx_vpermilvar_ps: ; AVX: ## BB#0: -; AVX-NEXT: vpermilps %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: vpermilps %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0c,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vpermilvar_ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermilps %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermilps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x0c,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } define <4 x float> @test_x86_avx_vpermilvar_ps_load(<4 x float> %a0, <4 x i32>* %a1) { ; AVX-LABEL: test_x86_avx_vpermilvar_ps_load: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vpermilps (%eax), %xmm0, %xmm0 -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vpermilps (%eax), %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0c,0x00] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vpermilvar_ps_load: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpermilps (%eax), %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vpermilps (%eax), %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x0c,0x00] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %a2 = load <4 x i32>, <4 x i32>* %a1 %res = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> %a2) ; <<4 x float>> [#uses=1] ret <4 x float> %res @@ -4098,13 +3431,13 @@ declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>) nounwind define <8 x float> @test_x86_avx_vpermilvar_ps_256(<8 x float> %a0, <8 x i32> %a1) { ; AVX-LABEL: test_x86_avx_vpermilvar_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vpermilps %ymm1, %ymm0, %ymm0 -; AVX-NEXT: retl +; AVX-NEXT: vpermilps %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0c,0xc1] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vpermilvar_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermilps %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermilps %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x0c,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -4112,19 +3445,12 @@ declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>) noun define i32 @test_x86_avx_vtestc_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_avx_vtestc_pd: -; AVX: ## BB#0: -; AVX-NEXT: vtestpd %xmm1, %xmm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vtestc_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vtestpd %xmm1, %xmm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vtestc_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: vtestpd %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0f,0xc1] +; CHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; CHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestc.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -4134,18 +3460,18 @@ declare i32 @llvm.x86.avx.vtestc.pd(<2 x double>, <2 x double>) nounwind readnon define i32 @test_x86_avx_vtestc_pd_256(<4 x double> %a0, <4 x double> %a1) { ; AVX-LABEL: test_x86_avx_vtestc_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: vtestpd %ymm1, %ymm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vtestpd %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0f,0xc1] +; AVX-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; AVX-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vtestc_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0f,0xc1] +; AVX512VL-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; AVX512VL-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestc.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1] ret i32 %res } @@ -4153,19 +3479,12 @@ declare i32 @llvm.x86.avx.vtestc.pd.256(<4 x double>, <4 x double>) nounwind rea define i32 @test_x86_avx_vtestc_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_avx_vtestc_ps: -; AVX: ## BB#0: -; AVX-NEXT: vtestps %xmm1, %xmm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vtestc_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vtestps %xmm1, %xmm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vtestc_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: vtestps %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0e,0xc1] +; CHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; CHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestc.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -4175,18 +3494,18 @@ declare i32 @llvm.x86.avx.vtestc.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_avx_vtestc_ps_256(<8 x float> %a0, <8 x float> %a1) { ; AVX-LABEL: test_x86_avx_vtestc_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: vtestps %ymm1, %ymm0 -; AVX-NEXT: sbbl %eax, %eax -; AVX-NEXT: andl $1, %eax -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: vtestps %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0e,0xc1] +; AVX-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; AVX-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vtestc_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vtestps %ymm1, %ymm0 -; AVX512VL-NEXT: sbbl %eax, %eax -; AVX512VL-NEXT: andl $1, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vtestps %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0e,0xc1] +; AVX512VL-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; AVX512VL-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestc.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1] ret i32 %res } @@ -4194,19 +3513,12 @@ declare i32 @llvm.x86.avx.vtestc.ps.256(<8 x float>, <8 x float>) nounwind readn define i32 @test_x86_avx_vtestnzc_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_avx_vtestnzc_pd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestpd %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vtestnzc_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestpd %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vtestnzc_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vtestpd %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0f,0xc1] +; CHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestnzc.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -4216,18 +3528,18 @@ declare i32 @llvm.x86.avx.vtestnzc.pd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_avx_vtestnzc_pd_256(<4 x double> %a0, <4 x double> %a1) { ; AVX-LABEL: test_x86_avx_vtestnzc_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestpd %ymm1, %ymm0 -; AVX-NEXT: seta %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vtestpd %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0f,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vtestnzc_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0f,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1] ret i32 %res } @@ -4235,19 +3547,12 @@ declare i32 @llvm.x86.avx.vtestnzc.pd.256(<4 x double>, <4 x double>) nounwind r define i32 @test_x86_avx_vtestnzc_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_avx_vtestnzc_ps: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestps %xmm1, %xmm0 -; AVX-NEXT: seta %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vtestnzc_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestps %xmm1, %xmm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vtestnzc_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vtestps %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0e,0xc1] +; CHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestnzc.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -4257,18 +3562,18 @@ declare i32 @llvm.x86.avx.vtestnzc.ps(<4 x float>, <4 x float>) nounwind readnon define i32 @test_x86_avx_vtestnzc_ps_256(<8 x float> %a0, <8 x float> %a1) { ; AVX-LABEL: test_x86_avx_vtestnzc_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestps %ymm1, %ymm0 -; AVX-NEXT: seta %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vtestps %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0e,0xc1] +; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vtestnzc_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestps %ymm1, %ymm0 -; AVX512VL-NEXT: seta %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vtestps %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0e,0xc1] +; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1] ret i32 %res } @@ -4276,19 +3581,12 @@ declare i32 @llvm.x86.avx.vtestnzc.ps.256(<8 x float>, <8 x float>) nounwind rea define i32 @test_x86_avx_vtestz_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_avx_vtestz_pd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestpd %xmm1, %xmm0 -; AVX-NEXT: sete %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vtestz_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestpd %xmm1, %xmm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vtestz_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vtestpd %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0f,0xc1] +; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestz.pd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -4298,18 +3596,18 @@ declare i32 @llvm.x86.avx.vtestz.pd(<2 x double>, <2 x double>) nounwind readnon define i32 @test_x86_avx_vtestz_pd_256(<4 x double> %a0, <4 x double> %a1) { ; AVX-LABEL: test_x86_avx_vtestz_pd_256: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestpd %ymm1, %ymm0 -; AVX-NEXT: sete %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vtestpd %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0f,0xc1] +; AVX-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vtestz_pd_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vtestpd %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0f,0xc1] +; AVX512VL-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestz.pd.256(<4 x double> %a0, <4 x double> %a1) ; [#uses=1] ret i32 %res } @@ -4317,19 +3615,12 @@ declare i32 @llvm.x86.avx.vtestz.pd.256(<4 x double>, <4 x double>) nounwind rea define i32 @test_x86_avx_vtestz_ps(<4 x float> %a0, <4 x float> %a1) { -; AVX-LABEL: test_x86_avx_vtestz_ps: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestps %xmm1, %xmm0 -; AVX-NEXT: sete %al -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vtestz_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestps %xmm1, %xmm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vtestz_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; CHECK-NEXT: vtestps %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0e,0xc1] +; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestz.ps(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -4339,18 +3630,18 @@ declare i32 @llvm.x86.avx.vtestz.ps(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_avx_vtestz_ps_256(<8 x float> %a0, <8 x float> %a1) { ; AVX-LABEL: test_x86_avx_vtestz_ps_256: ; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax -; AVX-NEXT: vtestps %ymm1, %ymm0 -; AVX-NEXT: sete %al -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX-NEXT: vtestps %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0e,0xc1] +; AVX-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx_vtestz_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax -; AVX512VL-NEXT: vtestps %ymm1, %ymm0 -; AVX512VL-NEXT: sete %al -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX512VL-NEXT: vtestps %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0e,0xc1] +; AVX512VL-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx.vtestz.ps.256(<8 x float> %a0, <8 x float> %a1) ; [#uses=1] ret i32 %res } @@ -4358,15 +3649,10 @@ declare i32 @llvm.x86.avx.vtestz.ps.256(<8 x float>, <8 x float>) nounwind readn define void @test_x86_avx_vzeroall() { -; AVX-LABEL: test_x86_avx_vzeroall: -; AVX: ## BB#0: -; AVX-NEXT: vzeroall -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vzeroall: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vzeroall -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vzeroall: +; CHECK: ## BB#0: +; CHECK-NEXT: vzeroall ## encoding: [0xc5,0xfc,0x77] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx.vzeroall() ret void } @@ -4374,15 +3660,10 @@ declare void @llvm.x86.avx.vzeroall() nounwind define void @test_x86_avx_vzeroupper() { -; AVX-LABEL: test_x86_avx_vzeroupper: -; AVX: ## BB#0: -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx_vzeroupper: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vzeroupper -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx_vzeroupper: +; CHECK: ## BB#0: +; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx.vzeroupper() ret void } @@ -4391,155 +3672,100 @@ declare void @llvm.x86.avx.vzeroupper() nounwind ; Make sure instructions with no AVX equivalents, but are associated with SSEX feature flags still work define void @monitor(i8* %P, i32 %E, i32 %H) nounwind { -; AVX-LABEL: monitor: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %edx -; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: leal (%eax), %eax -; AVX-NEXT: monitor -; AVX-NEXT: retl -; -; AVX512VL-LABEL: monitor: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %edx -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: leal (%eax), %eax -; AVX512VL-NEXT: monitor -; AVX512VL-NEXT: retl +; CHECK-LABEL: monitor: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x0c] +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: leal (%eax), %eax ## encoding: [0x8d,0x00] +; CHECK-NEXT: monitor ## encoding: [0x0f,0x01,0xc8] +; CHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse3.monitor(i8* %P, i32 %E, i32 %H) ret void } declare void @llvm.x86.sse3.monitor(i8*, i32, i32) nounwind define void @mwait(i32 %E, i32 %H) nounwind { -; AVX-LABEL: mwait: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: mwait -; AVX-NEXT: retl -; -; AVX512VL-LABEL: mwait: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: mwait -; AVX512VL-NEXT: retl +; CHECK-LABEL: mwait: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; CHECK-NEXT: mwait ## encoding: [0x0f,0x01,0xc9] +; CHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse3.mwait(i32 %E, i32 %H) ret void } declare void @llvm.x86.sse3.mwait(i32, i32) nounwind define void @sfence() nounwind { -; AVX-LABEL: sfence: -; AVX: ## BB#0: -; AVX-NEXT: sfence -; AVX-NEXT: retl -; -; AVX512VL-LABEL: sfence: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: sfence -; AVX512VL-NEXT: retl +; CHECK-LABEL: sfence: +; CHECK: ## BB#0: +; CHECK-NEXT: sfence ## encoding: [0x0f,0xae,0xf8] +; CHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse.sfence() ret void } declare void @llvm.x86.sse.sfence() nounwind define void @lfence() nounwind { -; AVX-LABEL: lfence: -; AVX: ## BB#0: -; AVX-NEXT: lfence -; AVX-NEXT: retl -; -; AVX512VL-LABEL: lfence: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: lfence -; AVX512VL-NEXT: retl +; CHECK-LABEL: lfence: +; CHECK: ## BB#0: +; CHECK-NEXT: lfence ## encoding: [0x0f,0xae,0xe8] +; CHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse2.lfence() ret void } declare void @llvm.x86.sse2.lfence() nounwind define void @mfence() nounwind { -; AVX-LABEL: mfence: -; AVX: ## BB#0: -; AVX-NEXT: mfence -; AVX-NEXT: retl -; -; AVX512VL-LABEL: mfence: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: mfence -; AVX512VL-NEXT: retl +; CHECK-LABEL: mfence: +; CHECK: ## BB#0: +; CHECK-NEXT: mfence ## encoding: [0x0f,0xae,0xf0] +; CHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse2.mfence() ret void } declare void @llvm.x86.sse2.mfence() nounwind define void @clflush(i8* %p) nounwind { -; AVX-LABEL: clflush: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: clflush (%eax) -; AVX-NEXT: retl -; -; AVX512VL-LABEL: clflush: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: clflush (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: clflush: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: clflush (%eax) ## encoding: [0x0f,0xae,0x38] +; CHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse2.clflush(i8* %p) ret void } declare void @llvm.x86.sse2.clflush(i8*) nounwind define i32 @crc32_32_8(i32 %a, i8 %b) nounwind { -; AVX-LABEL: crc32_32_8: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: crc32b {{[0-9]+}}(%esp), %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: crc32_32_8: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: crc32b {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: crc32_32_8: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: crc32b {{[0-9]+}}(%esp), %eax ## encoding: [0xf2,0x0f,0x38,0xf0,0x44,0x24,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b) ret i32 %tmp } declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind define i32 @crc32_32_16(i32 %a, i16 %b) nounwind { -; AVX-LABEL: crc32_32_16: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: crc32w {{[0-9]+}}(%esp), %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: crc32_32_16: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: crc32w {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: crc32_32_16: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: crc32w {{[0-9]+}}(%esp), %eax ## encoding: [0x66,0xf2,0x0f,0x38,0xf1,0x44,0x24,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b) ret i32 %tmp } declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind define i32 @crc32_32_32(i32 %a, i32 %b) nounwind { -; AVX-LABEL: crc32_32_32: -; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: crc32l {{[0-9]+}}(%esp), %eax -; AVX-NEXT: retl -; -; AVX512VL-LABEL: crc32_32_32: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: crc32l {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: retl +; CHECK-LABEL: crc32_32_32: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: crc32l {{[0-9]+}}(%esp), %eax ## encoding: [0xf2,0x0f,0x38,0xf1,0x44,0x24,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b) ret i32 %tmp } @@ -4548,18 +3774,20 @@ declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind define void @movnt_dq(i8* %p, <2 x i64> %a1) nounwind { ; AVX-LABEL: movnt_dq: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vpaddq LCPI254_0, %xmm0, %xmm0 -; AVX-NEXT: vmovntdq %ymm0, (%eax) -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vpaddq LCPI254_0, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd4,0x05,A,A,A,A] +; AVX-NEXT: ## fixup A - offset: 4, value: LCPI254_0, kind: FK_Data_4 +; AVX-NEXT: vmovntdq %ymm0, (%eax) ## encoding: [0xc5,0xfd,0xe7,0x00] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: movnt_dq: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpaddq LCPI254_0, %xmm0, %xmm0 -; AVX512VL-NEXT: vmovntdq %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vpaddq LCPI254_0, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xd4,0x05,A,A,A,A] +; AVX512VL-NEXT: ## fixup A - offset: 6, value: LCPI254_0, kind: FK_Data_4 +; AVX512VL-NEXT: vmovntdq %ymm0, (%eax) ## encoding: [0x62,0xf1,0x7d,0x28,0xe7,0x00] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %a2 = add <2 x i64> %a1, %a3 = shufflevector <2 x i64> %a2, <2 x i64> undef, <4 x i32> tail call void @llvm.x86.avx.movnt.dq.256(i8* %p, <4 x i64> %a3) nounwind @@ -4570,16 +3798,16 @@ declare void @llvm.x86.avx.movnt.dq.256(i8*, <4 x i64>) nounwind define void @movnt_ps(i8* %p, <8 x float> %a) nounwind { ; AVX-LABEL: movnt_ps: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vmovntps %ymm0, (%eax) -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vmovntps %ymm0, (%eax) ## encoding: [0xc5,0xfc,0x2b,0x00] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: movnt_ps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmovntps %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vmovntps %ymm0, (%eax) ## encoding: [0x62,0xf1,0x7c,0x28,0x2b,0x00] +; AVX512VL-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.avx.movnt.ps.256(i8* %p, <8 x float> %a) nounwind ret void } @@ -4589,20 +3817,20 @@ define void @movnt_pd(i8* %p, <4 x double> %a1) nounwind { ; add operation forces the execution domain. ; AVX-LABEL: movnt_pd: ; AVX: ## BB#0: -; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX-NEXT: vxorpd %ymm1, %ymm1, %ymm1 -; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0 -; AVX-NEXT: vmovntpd %ymm0, (%eax) -; AVX-NEXT: vzeroupper -; AVX-NEXT: retl +; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX-NEXT: vxorpd %ymm1, %ymm1, %ymm1 ## encoding: [0xc5,0xf5,0x57,0xc9] +; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x58,0xc1] +; AVX-NEXT: vmovntpd %ymm0, (%eax) ## encoding: [0xc5,0xfd,0x2b,0x00] +; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: movnt_pd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpxord %ymm1, %ymm1, %ymm1 -; AVX512VL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vmovntpd %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vxorpd %ymm1, %ymm1, %ymm1 ## encoding: [0x62,0xf1,0xf5,0x28,0x57,0xc9] +; AVX512VL-NEXT: vaddpd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0x58,0xc1] +; AVX512VL-NEXT: vmovntpd %ymm0, (%eax) ## encoding: [0x62,0xf1,0xfd,0x28,0x2b,0x00] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %a2 = fadd <4 x double> %a1, tail call void @llvm.x86.avx.movnt.pd.256(i8* %p, <4 x double> %a2) nounwind ret void @@ -4612,15 +3840,10 @@ declare void @llvm.x86.avx.movnt.pd.256(i8*, <4 x double>) nounwind ; Check for pclmulqdq define <2 x i64> @test_x86_pclmulqdq(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_pclmulqdq: -; AVX: ## BB#0: -; AVX-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 -; AVX-NEXT: retl -; -; AVX512VL-LABEL: test_x86_pclmulqdq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_pclmulqdq: +; CHECK: ## BB#0: +; CHECK-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x44,0xc1,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %a0, <2 x i64> %a1, i8 0) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } diff --git a/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll index 2a04de5fe907..0ca67e28cf26 100644 --- a/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll @@ -1,17 +1,17 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 | FileCheck %s --check-prefix=AVX2 -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx512vl | FileCheck %s --check-prefix=AVX512VL +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_packssdw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x6b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_packssdw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x6b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -21,13 +21,13 @@ declare <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32>, <8 x i32>) nounwind readno define <32 x i8> @test_x86_avx2_packsswb(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_packsswb: ; AVX2: ## BB#0: -; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x63,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_packsswb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x63,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -37,13 +37,13 @@ declare <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_packuswb(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_packuswb: ; AVX2: ## BB#0: -; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x67,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_packuswb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x67,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16> %a0, <16 x i16> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -53,13 +53,13 @@ declare <32 x i8> @llvm.x86.avx2.packuswb(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_padds_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_padds_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xec,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_padds_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddsb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xec,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -69,13 +69,13 @@ declare <32 x i8> @llvm.x86.avx2.padds.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_padds_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_padds_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xed,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_padds_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddsw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xed,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -85,13 +85,13 @@ declare <16 x i16> @llvm.x86.avx2.padds.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_paddus_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_paddus_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xdc,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_paddus_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddusb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xdc,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.paddus.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -101,13 +101,13 @@ declare <32 x i8> @llvm.x86.avx2.paddus.b(<32 x i8>, <32 x i8>) nounwind readnon define <16 x i16> @test_x86_avx2_paddus_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_paddus_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xdd,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_paddus_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpaddusw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xdd,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.paddus.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -117,13 +117,13 @@ declare <16 x i16> @llvm.x86.avx2.paddus.w(<16 x i16>, <16 x i16>) nounwind read define <32 x i8> @test_x86_avx2_pavg_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pavg_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpavgb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpavgb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe0,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pavg_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpavgb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpavgb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe0,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -133,13 +133,13 @@ declare <32 x i8> @llvm.x86.avx2.pavg.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pavg_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pavg_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpavgw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpavgw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe3,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pavg_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpavgw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpavgw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe3,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -149,13 +149,13 @@ declare <16 x i16> @llvm.x86.avx2.pavg.w(<16 x i16>, <16 x i16>) nounwind readno define <8 x i32> @test_x86_avx2_pmadd_wd(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmadd_wd: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xf5,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmadd_wd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xf5,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16> %a0, <16 x i16> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -165,13 +165,13 @@ declare <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16>, <16 x i16>) nounwind readn define <16 x i16> @test_x86_avx2_pmaxs_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmaxs_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xee,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmaxs_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xee,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -181,13 +181,13 @@ declare <16 x i16> @llvm.x86.avx2.pmaxs.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_pmaxu_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pmaxu_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xde,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmaxu_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxub %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xde,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -197,13 +197,13 @@ declare <32 x i8> @llvm.x86.avx2.pmaxu.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pmins_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmins_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xea,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmins_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminsw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xea,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -213,13 +213,13 @@ declare <16 x i16> @llvm.x86.avx2.pmins.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_pminu_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pminu_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpminub %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xda,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pminu_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminub %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminub %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xda,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -229,14 +229,14 @@ declare <32 x i8> @llvm.x86.avx2.pminu.b(<32 x i8>, <32 x i8>) nounwind readnone define i32 @test_x86_avx2_pmovmskb(<32 x i8> %a0) { ; AVX2-LABEL: test_x86_avx2_pmovmskb: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmovmskb %ymm0, %eax -; AVX2-NEXT: vzeroupper -; AVX2-NEXT: retl +; AVX2-NEXT: vpmovmskb %ymm0, %eax ## encoding: [0xc5,0xfd,0xd7,0xc0] +; AVX2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmovmskb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmovmskb %ymm0, %eax -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmovmskb %ymm0, %eax ## encoding: [0xc5,0xfd,0xd7,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.avx2.pmovmskb(<32 x i8> %a0) ; [#uses=1] ret i32 %res } @@ -246,13 +246,13 @@ declare i32 @llvm.x86.avx2.pmovmskb(<32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_pmulh_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmulh_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe5,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmulh_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe5,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -262,13 +262,13 @@ declare <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16>, <16 x i16>) nounwind readn define <16 x i16> @test_x86_avx2_pmulhu_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmulhu_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe4,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmulhu_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe4,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -278,13 +278,13 @@ declare <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16>, <16 x i16>) nounwind read define <4 x i64> @test_x86_avx2_pmulu_dq(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_pmulu_dq: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xf4,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmulu_dq: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0xf4,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32> %a0, <8 x i32> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -294,13 +294,13 @@ declare <4 x i64> @llvm.x86.avx2.pmulu.dq(<8 x i32>, <8 x i32>) nounwind readnon define <4 x i64> @test_x86_avx2_psad_bw(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_psad_bw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xf6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psad_bw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsadbw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xf6,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8> %a0, <32 x i8> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -310,13 +310,13 @@ declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_psll_d(<8 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psll_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpslld %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpslld %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xf2,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psll_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpslld %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpslld %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xf2,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -326,13 +326,13 @@ declare <8 x i32> @llvm.x86.avx2.psll.d(<8 x i32>, <4 x i32>) nounwind readnone define <4 x i64> @test_x86_avx2_psll_q(<4 x i64> %a0, <2 x i64> %a1) { ; AVX2-LABEL: test_x86_avx2_psll_q: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xf3,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psll_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllq %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllq %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0xf3,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64> %a0, <2 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -342,13 +342,13 @@ declare <4 x i64> @llvm.x86.avx2.psll.q(<4 x i64>, <2 x i64>) nounwind readnone define <16 x i16> @test_x86_avx2_psll_w(<16 x i16> %a0, <8 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_psll_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllw %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xf1,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psll_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllw %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllw %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xf1,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -358,13 +358,13 @@ declare <16 x i16> @llvm.x86.avx2.psll.w(<16 x i16>, <8 x i16>) nounwind readnon define <8 x i32> @test_x86_avx2_pslli_d(<8 x i32> %a0) { ; AVX2-LABEL: test_x86_avx2_pslli_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpslld $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpslld $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x72,0xf0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pslli_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpslld $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpslld $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x72,0xf0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -374,13 +374,13 @@ declare <8 x i32> @llvm.x86.avx2.pslli.d(<8 x i32>, i32) nounwind readnone define <4 x i64> @test_x86_avx2_pslli_q(<4 x i64> %a0) { ; AVX2-LABEL: test_x86_avx2_pslli_q: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllq $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllq $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x73,0xf0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pslli_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllq $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllq $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0x73,0xf0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -390,13 +390,13 @@ declare <4 x i64> @llvm.x86.avx2.pslli.q(<4 x i64>, i32) nounwind readnone define <16 x i16> @test_x86_avx2_pslli_w(<16 x i16> %a0) { ; AVX2-LABEL: test_x86_avx2_pslli_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllw $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x71,0xf0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pslli_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllw $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllw $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x71,0xf0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -406,13 +406,13 @@ declare <16 x i16> @llvm.x86.avx2.pslli.w(<16 x i16>, i32) nounwind readnone define <8 x i32> @test_x86_avx2_psra_d(<8 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psra_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrad %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrad %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe2,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psra_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrad %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrad %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe2,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psra.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -422,13 +422,13 @@ declare <8 x i32> @llvm.x86.avx2.psra.d(<8 x i32>, <4 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_psra_w(<16 x i16> %a0, <8 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_psra_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsraw %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsraw %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe1,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psra_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsraw %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsraw %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe1,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -438,13 +438,13 @@ declare <16 x i16> @llvm.x86.avx2.psra.w(<16 x i16>, <8 x i16>) nounwind readnon define <8 x i32> @test_x86_avx2_psrai_d(<8 x i32> %a0) { ; AVX2-LABEL: test_x86_avx2_psrai_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrad $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrad $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x72,0xe0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrai_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrad $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrad $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x72,0xe0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -454,13 +454,13 @@ declare <8 x i32> @llvm.x86.avx2.psrai.d(<8 x i32>, i32) nounwind readnone define <16 x i16> @test_x86_avx2_psrai_w(<16 x i16> %a0) { ; AVX2-LABEL: test_x86_avx2_psrai_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsraw $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsraw $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x71,0xe0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrai_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsraw $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsraw $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x71,0xe0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -470,13 +470,13 @@ declare <16 x i16> @llvm.x86.avx2.psrai.w(<16 x i16>, i32) nounwind readnone define <8 x i32> @test_x86_avx2_psrl_d(<8 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psrl_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xd2,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrl_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrld %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrld %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xd2,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32> %a0, <4 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -486,13 +486,13 @@ declare <8 x i32> @llvm.x86.avx2.psrl.d(<8 x i32>, <4 x i32>) nounwind readnone define <4 x i64> @test_x86_avx2_psrl_q(<4 x i64> %a0, <2 x i64> %a1) { ; AVX2-LABEL: test_x86_avx2_psrl_q: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xd3,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrl_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0xd3,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64> %a0, <2 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -502,13 +502,13 @@ declare <4 x i64> @llvm.x86.avx2.psrl.q(<4 x i64>, <2 x i64>) nounwind readnone define <16 x i16> @test_x86_avx2_psrl_w(<16 x i16> %a0, <8 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_psrl_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xd1,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrl_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xd1,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16> %a0, <8 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -518,13 +518,13 @@ declare <16 x i16> @llvm.x86.avx2.psrl.w(<16 x i16>, <8 x i16>) nounwind readnon define <8 x i32> @test_x86_avx2_psrli_d(<8 x i32> %a0) { ; AVX2-LABEL: test_x86_avx2_psrli_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrld $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrld $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x72,0xd0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrli_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrld $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrld $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x72,0xd0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32> %a0, i32 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -534,13 +534,13 @@ declare <8 x i32> @llvm.x86.avx2.psrli.d(<8 x i32>, i32) nounwind readnone define <4 x i64> @test_x86_avx2_psrli_q(<4 x i64> %a0) { ; AVX2-LABEL: test_x86_avx2_psrli_q: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlq $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlq $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x73,0xd0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrli_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlq $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlq $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0xfd,0x28,0x73,0xd0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64> %a0, i32 7) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -550,13 +550,13 @@ declare <4 x i64> @llvm.x86.avx2.psrli.q(<4 x i64>, i32) nounwind readnone define <16 x i16> @test_x86_avx2_psrli_w(<16 x i16> %a0) { ; AVX2-LABEL: test_x86_avx2_psrli_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0x71,0xd0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrli_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlw $7, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlw $7, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0x71,0xd0,0x07] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16> %a0, i32 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -566,13 +566,13 @@ declare <16 x i16> @llvm.x86.avx2.psrli.w(<16 x i16>, i32) nounwind readnone define <32 x i8> @test_x86_avx2_psubs_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_psubs_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe8,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psubs_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubsb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe8,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -582,13 +582,13 @@ declare <32 x i8> @llvm.x86.avx2.psubs.b(<32 x i8>, <32 x i8>) nounwind readnone define <16 x i16> @test_x86_avx2_psubs_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_psubs_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xe9,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psubs_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubsw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xe9,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -598,13 +598,13 @@ declare <16 x i16> @llvm.x86.avx2.psubs.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_psubus_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_psubus_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xd8,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psubus_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubusb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xd8,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.psubus.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -614,13 +614,13 @@ declare <32 x i8> @llvm.x86.avx2.psubus.b(<32 x i8>, <32 x i8>) nounwind readnon define <16 x i16> @test_x86_avx2_psubus_w(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_psubus_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 ## encoding: [0xc5,0xfd,0xd9,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psubus_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsubusw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf1,0x7d,0x28,0xd9,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psubus.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -630,13 +630,13 @@ declare <16 x i16> @llvm.x86.avx2.psubus.w(<16 x i16>, <16 x i16>) nounwind read define <32 x i8> @test_x86_avx2_pabs_b(<32 x i8> %a0) { ; AVX2-LABEL: test_x86_avx2_pabs_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpabsb %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpabsb %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x1c,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pabs_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpabsb %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpabsb %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x1c,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8> %a0) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -646,13 +646,13 @@ declare <32 x i8> @llvm.x86.avx2.pabs.b(<32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_pabs_d(<8 x i32> %a0) { ; AVX2-LABEL: test_x86_avx2_pabs_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpabsd %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpabsd %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x1e,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pabs_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpabsd %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpabsd %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x1e,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32> %a0) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -662,13 +662,13 @@ declare <8 x i32> @llvm.x86.avx2.pabs.d(<8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_pabs_w(<16 x i16> %a0) { ; AVX2-LABEL: test_x86_avx2_pabs_w: ; AVX2: ## BB#0: -; AVX2-NEXT: vpabsw %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpabsw %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x1d,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pabs_w: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpabsw %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpabsw %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x1d,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16> %a0) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -676,15 +676,10 @@ declare <16 x i16> @llvm.x86.avx2.pabs.w(<16 x i16>) nounwind readnone define <8 x i32> @test_x86_avx2_phadd_d(<8 x i32> %a0, <8 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_phadd_d: -; AVX2: ## BB#0: -; AVX2-NEXT: vphaddd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_phadd_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphaddd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_phadd_d: +; CHECK: ## BB#0: +; CHECK-NEXT: vphaddd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x02,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -692,15 +687,10 @@ declare <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_phadd_sw(<16 x i16> %a0, <16 x i16> %a1) { -; AVX2-LABEL: test_x86_avx2_phadd_sw: -; AVX2: ## BB#0: -; AVX2-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_phadd_sw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_phadd_sw: +; CHECK: ## BB#0: +; CHECK-NEXT: vphaddsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x03,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.phadd.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -708,15 +698,10 @@ declare <16 x i16> @llvm.x86.avx2.phadd.sw(<16 x i16>, <16 x i16>) nounwind read define <16 x i16> @test_x86_avx2_phadd_w(<16 x i16> %a0, <16 x i16> %a1) { -; AVX2-LABEL: test_x86_avx2_phadd_w: -; AVX2: ## BB#0: -; AVX2-NEXT: vphaddw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_phadd_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphaddw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_phadd_w: +; CHECK: ## BB#0: +; CHECK-NEXT: vphaddw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x01,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -724,15 +709,10 @@ declare <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16>, <16 x i16>) nounwind readn define <8 x i32> @test_x86_avx2_phsub_d(<8 x i32> %a0, <8 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_phsub_d: -; AVX2: ## BB#0: -; AVX2-NEXT: vphsubd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_phsub_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphsubd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_phsub_d: +; CHECK: ## BB#0: +; CHECK-NEXT: vphsubd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x06,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -740,15 +720,10 @@ declare <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_phsub_sw(<16 x i16> %a0, <16 x i16> %a1) { -; AVX2-LABEL: test_x86_avx2_phsub_sw: -; AVX2: ## BB#0: -; AVX2-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_phsub_sw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_phsub_sw: +; CHECK: ## BB#0: +; CHECK-NEXT: vphsubsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x07,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.phsub.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -756,15 +731,10 @@ declare <16 x i16> @llvm.x86.avx2.phsub.sw(<16 x i16>, <16 x i16>) nounwind read define <16 x i16> @test_x86_avx2_phsub_w(<16 x i16> %a0, <16 x i16> %a1) { -; AVX2-LABEL: test_x86_avx2_phsub_w: -; AVX2: ## BB#0: -; AVX2-NEXT: vphsubw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_phsub_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vphsubw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_phsub_w: +; CHECK: ## BB#0: +; CHECK-NEXT: vphsubw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x05,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -774,13 +744,13 @@ declare <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16>, <16 x i16>) nounwind readn define <16 x i16> @test_x86_avx2_pmadd_ub_sw(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pmadd_ub_sw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x04,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmadd_ub_sw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x04,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8> %a0, <32 x i8> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -790,13 +760,13 @@ declare <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8>, <32 x i8>) nounwind rea define <16 x i16> @test_x86_avx2_pmul_hr_sw(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmul_hr_sw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmul_hr_sw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x0b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -806,13 +776,13 @@ declare <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16>, <16 x i16>) nounwind re define <32 x i8> @test_x86_avx2_pshuf_b(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pshuf_b: ; AVX2: ## BB#0: -; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x00,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pshuf_b: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpshufb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpshufb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x00,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <32 x i8> %res } @@ -820,15 +790,10 @@ declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>) nounwind readnone define <32 x i8> @test_x86_avx2_psign_b(<32 x i8> %a0, <32 x i8> %a1) { -; AVX2-LABEL: test_x86_avx2_psign_b: -; AVX2: ## BB#0: -; AVX2-NEXT: vpsignb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_psign_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsignb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_psign_b: +; CHECK: ## BB#0: +; CHECK-NEXT: vpsignb %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x08,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -836,15 +801,10 @@ declare <32 x i8> @llvm.x86.avx2.psign.b(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_psign_d(<8 x i32> %a0, <8 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_psign_d: -; AVX2: ## BB#0: -; AVX2-NEXT: vpsignd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_psign_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsignd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_psign_d: +; CHECK: ## BB#0: +; CHECK-NEXT: vpsignd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x0a,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32> %a0, <8 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <8 x i32> %res } @@ -852,15 +812,10 @@ declare <8 x i32> @llvm.x86.avx2.psign.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_psign_w(<16 x i16> %a0, <16 x i16> %a1) { -; AVX2-LABEL: test_x86_avx2_psign_w: -; AVX2: ## BB#0: -; AVX2-NEXT: vpsignw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_psign_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsignw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_psign_w: +; CHECK: ## BB#0: +; CHECK-NEXT: vpsignw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x09,0xc1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -870,15 +825,15 @@ declare <16 x i16> @llvm.x86.avx2.psign.w(<16 x i16>, <16 x i16>) nounwind readn define <4 x i64> @test_x86_avx2_movntdqa(i8* %a0) { ; AVX2-LABEL: test_x86_avx2_movntdqa: ; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vmovntdqa (%eax), %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vmovntdqa (%eax), %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x2a,0x00] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_movntdqa: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vmovntdqa (%eax), %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vmovntdqa (%eax), %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x2a,0x00] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.movntdqa(i8* %a0) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -886,15 +841,10 @@ declare <4 x i64> @llvm.x86.avx2.movntdqa(i8*) nounwind readonly define <16 x i16> @test_x86_avx2_mpsadbw(<32 x i8> %a0, <32 x i8> %a1) { -; AVX2-LABEL: test_x86_avx2_mpsadbw: -; AVX2: ## BB#0: -; AVX2-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_mpsadbw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_mpsadbw: +; CHECK: ## BB#0: +; CHECK-NEXT: vmpsadbw $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x42,0xc1,0x07] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8> %a0, <32 x i8> %a1, i8 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -904,13 +854,13 @@ declare <16 x i16> @llvm.x86.avx2.mpsadbw(<32 x i8>, <32 x i8>, i8) nounwind rea define <16 x i16> @test_x86_avx2_packusdw(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_packusdw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x2b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_packusdw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x2b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %a0, <8 x i32> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -918,15 +868,10 @@ declare <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32>, <8 x i32>) nounwind readno define <32 x i8> @test_x86_avx2_pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) { -; AVX2-LABEL: test_x86_avx2_pblendvb: -; AVX2: ## BB#0: -; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_pblendvb: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_pblendvb: +; CHECK: ## BB#0: +; CHECK-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x4c,0xc1,0x20] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8> %a0, <32 x i8> %a1, <32 x i8> %a2) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -934,15 +879,11 @@ declare <32 x i8> @llvm.x86.avx2.pblendvb(<32 x i8>, <32 x i8>, <32 x i8>) nounw define <16 x i16> @test_x86_avx2_pblendw(<16 x i16> %a0, <16 x i16> %a1) { -; AVX2-LABEL: test_x86_avx2_pblendw: -; AVX2: ## BB#0: -; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_pblendw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpblendw {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_pblendw: +; CHECK: ## BB#0: +; CHECK-NEXT: vpblendw $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x0e,0xc1,0x07] +; CHECK-NEXT: ## ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7],ymm1[8,9,10],ymm0[11,12,13,14,15] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16> %a0, <16 x i16> %a1, i8 7) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -952,13 +893,13 @@ declare <16 x i16> @llvm.x86.avx2.pblendw(<16 x i16>, <16 x i16>, i8) nounwind r define <32 x i8> @test_x86_avx2_pmaxsb(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pmaxsb: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x3c,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmaxsb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x3c,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -968,13 +909,13 @@ declare <32 x i8> @llvm.x86.avx2.pmaxs.b(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_pmaxsd(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_pmaxsd: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x3d,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmaxsd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x3d,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -984,13 +925,13 @@ declare <8 x i32> @llvm.x86.avx2.pmaxs.d(<8 x i32>, <8 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_pmaxud(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_pmaxud: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x3f,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmaxud: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxud %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x3f,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1000,13 +941,13 @@ declare <8 x i32> @llvm.x86.avx2.pmaxu.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_pmaxuw(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pmaxuw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x3e,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pmaxuw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpmaxuw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x3e,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -1016,13 +957,13 @@ declare <16 x i16> @llvm.x86.avx2.pmaxu.w(<16 x i16>, <16 x i16>) nounwind readn define <32 x i8> @test_x86_avx2_pminsb(<32 x i8> %a0, <32 x i8> %a1) { ; AVX2-LABEL: test_x86_avx2_pminsb: ; AVX2: ## BB#0: -; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x38,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pminsb: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsb %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminsb %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x38,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8> %a0, <32 x i8> %a1) ; <<32 x i8>> [#uses=1] ret <32 x i8> %res } @@ -1032,13 +973,13 @@ declare <32 x i8> @llvm.x86.avx2.pmins.b(<32 x i8>, <32 x i8>) nounwind readnone define <8 x i32> @test_x86_avx2_pminsd(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_pminsd: ; AVX2: ## BB#0: -; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x39,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pminsd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x39,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1048,13 +989,13 @@ declare <8 x i32> @llvm.x86.avx2.pmins.d(<8 x i32>, <8 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_pminud(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_pminud: ; AVX2: ## BB#0: -; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpminud %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x3b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pminud: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminud %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminud %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x3b,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1064,13 +1005,13 @@ declare <8 x i32> @llvm.x86.avx2.pminu.d(<8 x i32>, <8 x i32>) nounwind readnone define <16 x i16> @test_x86_avx2_pminuw(<16 x i16> %a0, <16 x i16> %a1) { ; AVX2-LABEL: test_x86_avx2_pminuw: ; AVX2: ## BB#0: -; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpminuw %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x3a,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_pminuw: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminuw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpminuw %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x3a,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <16 x i16> @llvm.x86.avx2.pminu.w(<16 x i16> %a0, <16 x i16> %a1) ; <<16 x i16>> [#uses=1] ret <16 x i16> %res } @@ -1085,15 +1026,11 @@ declare <4 x i64> @llvm.x86.avx2.pmul.dq(<8 x i32>, <8 x i32>) nounwind readnone define <4 x i32> @test_x86_avx2_pblendd_128(<4 x i32> %a0, <4 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_pblendd_128: -; AVX2: ## BB#0: -; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_pblendd_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_pblendd_128: +; CHECK: ## BB#0: +; CHECK-NEXT: vpblendd $8, %xmm0, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x71,0x02,0xc0,0x08] +; CHECK-NEXT: ## xmm0 = xmm1[0,1,2],xmm0[3] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32> %a0, <4 x i32> %a1, i8 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1101,15 +1038,11 @@ declare <4 x i32> @llvm.x86.avx2.pblendd.128(<4 x i32>, <4 x i32>, i8) nounwind define <8 x i32> @test_x86_avx2_pblendd_256(<8 x i32> %a0, <8 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_pblendd_256: -; AVX2: ## BB#0: -; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_pblendd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_pblendd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: vpblendd $7, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x02,0xc1,0x07] +; CHECK-NEXT: ## ymm0 = ymm1[0,1,2],ymm0[3,4,5,6,7] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32> %a0, <8 x i32> %a1, i8 7) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1122,13 +1055,13 @@ declare <8 x i32> @llvm.x86.avx2.pblendd.256(<8 x i32>, <8 x i32>, i8) nounwind define <8 x i32> @test_x86_avx2_permd(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_permd: ; AVX2: ## BB#0: -; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x75,0x36,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_permd: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermd %ymm0, %ymm1, %ymm0 ## encoding: [0x62,0xf2,0x75,0x28,0x36,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1141,13 +1074,13 @@ declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) nounwind readonly define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_permps: ; AVX2: ## BB#0: -; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpermps %ymm0, %ymm1, %ymm0 ## encoding: [0xc4,0xe2,0x75,0x16,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_permps: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0 ## encoding: [0x62,0xf2,0x75,0x28,0x16,0xc0] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %a1) ; <<8 x float>> [#uses=1] ret <8 x float> %res } @@ -1155,15 +1088,11 @@ declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>) nounwind reado define <4 x i64> @test_x86_avx2_vperm2i128(<4 x i64> %a0, <4 x i64> %a1) { -; AVX2-LABEL: test_x86_avx2_vperm2i128: -; AVX2: ## BB#0: -; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_vperm2i128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1] -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_vperm2i128: +; CHECK: ## BB#0: +; CHECK-NEXT: vperm2f128 $1, %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe3,0x7d,0x06,0xc1,0x01] +; CHECK-NEXT: ## ymm0 = ymm0[2,3,0,1] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -1171,17 +1100,11 @@ declare <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64>, <4 x i64>, i8) nounwind r define <2 x i64> @test_x86_avx2_maskload_q(i8* %a0, <2 x i64> %a1) { -; AVX2-LABEL: test_x86_avx2_maskload_q: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_maskload_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_maskload_q: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpmaskmovq (%eax), %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0xf9,0x8c,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.avx2.maskload.q(i8* %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1189,17 +1112,11 @@ declare <2 x i64> @llvm.x86.avx2.maskload.q(i8*, <2 x i64>) nounwind readonly define <4 x i64> @test_x86_avx2_maskload_q_256(i8* %a0, <4 x i64> %a1) { -; AVX2-LABEL: test_x86_avx2_maskload_q_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_maskload_q_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_maskload_q_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpmaskmovq (%eax), %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0xfd,0x8c,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.maskload.q.256(i8* %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -1207,17 +1124,11 @@ declare <4 x i64> @llvm.x86.avx2.maskload.q.256(i8*, <4 x i64>) nounwind readonl define <4 x i32> @test_x86_avx2_maskload_d(i8* %a0, <4 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_maskload_d: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_maskload_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_maskload_d: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpmaskmovd (%eax), %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x8c,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.maskload.d(i8* %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1225,17 +1136,11 @@ declare <4 x i32> @llvm.x86.avx2.maskload.d(i8*, <4 x i32>) nounwind readonly define <8 x i32> @test_x86_avx2_maskload_d_256(i8* %a0, <8 x i32> %a1) { -; AVX2-LABEL: test_x86_avx2_maskload_d_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_maskload_d_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_maskload_d_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpmaskmovd (%eax), %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x8c,0x00] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.maskload.d.256(i8* %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1243,17 +1148,11 @@ declare <8 x i32> @llvm.x86.avx2.maskload.d.256(i8*, <8 x i32>) nounwind readonl define void @test_x86_avx2_maskstore_q(i8* %a0, <2 x i64> %a1, <2 x i64> %a2) { -; AVX2-LABEL: test_x86_avx2_maskstore_q: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_maskstore_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_maskstore_q: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpmaskmovq %xmm1, %xmm0, (%eax) ## encoding: [0xc4,0xe2,0xf9,0x8e,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx2.maskstore.q(i8* %a0, <2 x i64> %a1, <2 x i64> %a2) ret void } @@ -1263,16 +1162,16 @@ declare void @llvm.x86.avx2.maskstore.q(i8*, <2 x i64>, <2 x i64>) nounwind define void @test_x86_avx2_maskstore_q_256(i8* %a0, <4 x i64> %a1, <4 x i64> %a2) { ; AVX2-LABEL: test_x86_avx2_maskstore_q_256: ; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) -; AVX2-NEXT: vzeroupper -; AVX2-NEXT: retl +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0xfd,0x8e,0x08] +; AVX2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_maskstore_q_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vpmaskmovq %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0xfd,0x8e,0x08] +; AVX512VL-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx2.maskstore.q.256(i8* %a0, <4 x i64> %a1, <4 x i64> %a2) ret void } @@ -1280,17 +1179,11 @@ declare void @llvm.x86.avx2.maskstore.q.256(i8*, <4 x i64>, <4 x i64>) nounwind define void @test_x86_avx2_maskstore_d(i8* %a0, <4 x i32> %a1, <4 x i32> %a2) { -; AVX2-LABEL: test_x86_avx2_maskstore_d: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_maskstore_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_maskstore_d: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpmaskmovd %xmm1, %xmm0, (%eax) ## encoding: [0xc4,0xe2,0x79,0x8e,0x08] +; CHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx2.maskstore.d(i8* %a0, <4 x i32> %a1, <4 x i32> %a2) ret void } @@ -1300,16 +1193,16 @@ declare void @llvm.x86.avx2.maskstore.d(i8*, <4 x i32>, <4 x i32>) nounwind define void @test_x86_avx2_maskstore_d_256(i8* %a0, <8 x i32> %a1, <8 x i32> %a2) { ; AVX2-LABEL: test_x86_avx2_maskstore_d_256: ; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) -; AVX2-NEXT: vzeroupper -; AVX2-NEXT: retl +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0x7d,0x8e,0x08] +; AVX2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_maskstore_d_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vpmaskmovd %ymm1, %ymm0, (%eax) ## encoding: [0xc4,0xe2,0x7d,0x8e,0x08] +; AVX512VL-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.avx2.maskstore.d.256(i8* %a0, <8 x i32> %a1, <8 x i32> %a2) ret void } @@ -1319,13 +1212,13 @@ declare void @llvm.x86.avx2.maskstore.d.256(i8*, <8 x i32>, <8 x i32>) nounwind define <4 x i32> @test_x86_avx2_psllv_d(<4 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psllv_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x47,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psllv_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x47,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1335,13 +1228,13 @@ declare <4 x i32> @llvm.x86.avx2.psllv.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_psllv_d_256(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psllv_d_256: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x47,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psllv_d_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x47,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1351,13 +1244,13 @@ declare <8 x i32> @llvm.x86.avx2.psllv.d.256(<8 x i32>, <8 x i32>) nounwind read define <2 x i64> @test_x86_avx2_psllv_q(<2 x i64> %a0, <2 x i64> %a1) { ; AVX2-LABEL: test_x86_avx2_psllv_q: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0xf9,0x47,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psllv_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0xfd,0x08,0x47,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1367,13 +1260,13 @@ declare <2 x i64> @llvm.x86.avx2.psllv.q(<2 x i64>, <2 x i64>) nounwind readnone define <4 x i64> @test_x86_avx2_psllv_q_256(<4 x i64> %a0, <4 x i64> %a1) { ; AVX2-LABEL: test_x86_avx2_psllv_q_256: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0xfd,0x47,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psllv_q_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0xfd,0x28,0x47,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64> %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -1383,13 +1276,13 @@ declare <4 x i64> @llvm.x86.avx2.psllv.q.256(<4 x i64>, <4 x i64>) nounwind read define <4 x i32> @test_x86_avx2_psrlv_d(<4 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psrlv_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x45,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrlv_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x45,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1399,13 +1292,13 @@ declare <4 x i32> @llvm.x86.avx2.psrlv.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_psrlv_d_256(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psrlv_d_256: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x45,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrlv_d_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x45,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1415,13 +1308,13 @@ declare <8 x i32> @llvm.x86.avx2.psrlv.d.256(<8 x i32>, <8 x i32>) nounwind read define <2 x i64> @test_x86_avx2_psrlv_q(<2 x i64> %a0, <2 x i64> %a1) { ; AVX2-LABEL: test_x86_avx2_psrlv_q: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0xf9,0x45,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrlv_q: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0xfd,0x08,0x45,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1431,13 +1324,13 @@ declare <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64>, <2 x i64>) nounwind readnone define <4 x i64> @test_x86_avx2_psrlv_q_256(<4 x i64> %a0, <4 x i64> %a1) { ; AVX2-LABEL: test_x86_avx2_psrlv_q_256: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0xfd,0x45,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrlv_q_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0xfd,0x28,0x45,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64> %a0, <4 x i64> %a1) ; <<4 x i64>> [#uses=1] ret <4 x i64> %res } @@ -1447,13 +1340,13 @@ declare <4 x i64> @llvm.x86.avx2.psrlv.q.256(<4 x i64>, <4 x i64>) nounwind read define <4 x i32> @test_x86_avx2_psrav_d(<4 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psrav_d: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsravd %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsravd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x46,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrav_d: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsravd %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsravd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x46,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1462,14 +1355,20 @@ define <4 x i32> @test_x86_avx2_psrav_d_const(<4 x i32> %a0, <4 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psrav_d_const: ; AVX2: ## BB#0: ; AVX2-NEXT: vmovdqa {{.*#+}} xmm0 = [2,9,4294967284,23] -; AVX2-NEXT: vpsravd LCPI90_1, %xmm0, %xmm0 -; AVX2-NEXT: retl +; AVX2-NEXT: ## encoding: [0xc5,0xf9,0x6f,0x05,A,A,A,A] +; AVX2-NEXT: ## fixup A - offset: 4, value: LCPI90_0, kind: FK_Data_4 +; AVX2-NEXT: vpsravd LCPI90_1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x46,0x05,A,A,A,A] +; AVX2-NEXT: ## fixup A - offset: 5, value: LCPI90_1, kind: FK_Data_4 +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrav_d_const: ; AVX512VL: ## BB#0: ; AVX512VL-NEXT: vmovdqa32 {{.*#+}} xmm0 = [2,9,4294967284,23] -; AVX512VL-NEXT: vpsravd LCPI90_1, %xmm0, %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: ## encoding: [0x62,0xf1,0x7d,0x08,0x6f,0x05,A,A,A,A] +; AVX512VL-NEXT: ## fixup A - offset: 6, value: LCPI90_0, kind: FK_Data_4 +; AVX512VL-NEXT: vpsravd LCPI90_1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x46,0x05,A,A,A,A] +; AVX512VL-NEXT: ## fixup A - offset: 6, value: LCPI90_1, kind: FK_Data_4 +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32> , <4 x i32> ) ret <4 x i32> %res } @@ -1478,13 +1377,13 @@ declare <4 x i32> @llvm.x86.avx2.psrav.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i32> @test_x86_avx2_psrav_d_256(<8 x i32> %a0, <8 x i32> %a1) { ; AVX2-LABEL: test_x86_avx2_psrav_d_256: ; AVX2: ## BB#0: -; AVX2-NEXT: vpsravd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: vpsravd %ymm1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x46,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrav_d_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsravd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: vpsravd %ymm1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x46,0xc1] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1] ret <8 x i32> %res } @@ -1493,31 +1392,31 @@ define <8 x i32> @test_x86_avx2_psrav_d_256_const(<8 x i32> %a0, <8 x i32> %a1) ; AVX2-LABEL: test_x86_avx2_psrav_d_256_const: ; AVX2: ## BB#0: ; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [2,9,4294967284,23,4294967270,37,4294967256,51] -; AVX2-NEXT: vpsravd LCPI92_1, %ymm0, %ymm0 -; AVX2-NEXT: retl +; AVX2-NEXT: ## encoding: [0xc5,0xfd,0x6f,0x05,A,A,A,A] +; AVX2-NEXT: ## fixup A - offset: 4, value: LCPI92_0, kind: FK_Data_4 +; AVX2-NEXT: vpsravd LCPI92_1, %ymm0, %ymm0 ## encoding: [0xc4,0xe2,0x7d,0x46,0x05,A,A,A,A] +; AVX2-NEXT: ## fixup A - offset: 5, value: LCPI92_1, kind: FK_Data_4 +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_psrav_d_256_const: ; AVX512VL: ## BB#0: ; AVX512VL-NEXT: vmovdqa32 {{.*#+}} ymm0 = [2,9,4294967284,23,4294967270,37,4294967256,51] -; AVX512VL-NEXT: vpsravd LCPI92_1, %ymm0, %ymm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: ## encoding: [0x62,0xf1,0x7d,0x28,0x6f,0x05,A,A,A,A] +; AVX512VL-NEXT: ## fixup A - offset: 6, value: LCPI92_0, kind: FK_Data_4 +; AVX512VL-NEXT: vpsravd LCPI92_1, %ymm0, %ymm0 ## encoding: [0x62,0xf2,0x7d,0x28,0x46,0x05,A,A,A,A] +; AVX512VL-NEXT: ## fixup A - offset: 6, value: LCPI92_1, kind: FK_Data_4 +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32> , <8 x i32> ) ret <8 x i32> %res } declare <8 x i32> @llvm.x86.avx2.psrav.d.256(<8 x i32>, <8 x i32>) nounwind readnone define <2 x double> @test_x86_avx2_gather_d_pd(<2 x double> %a0, i8* %a1, <4 x i32> %idx, <2 x double> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_pd: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherdpd %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0xe9,0x92,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> %a0, i8* %a1, <4 x i32> %idx, <2 x double> %mask, i8 2) ; ret <2 x double> %res @@ -1526,17 +1425,11 @@ declare <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double>, i8*, <4 x i32>, <2 x double>, i8) nounwind readonly define <4 x double> @test_x86_avx2_gather_d_pd_256(<4 x double> %a0, i8* %a1, <4 x i32> %idx, <4 x double> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_pd_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherdpd %ymm2, (%eax,%xmm1,2), %ymm0 ## encoding: [0xc4,0xe2,0xed,0x92,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double> %a0, i8* %a1, <4 x i32> %idx, <4 x double> %mask, i8 2) ; ret <4 x double> %res @@ -1545,17 +1438,11 @@ declare <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double>, i8*, <4 x i32>, <4 x double>, i8) nounwind readonly define <2 x double> @test_x86_avx2_gather_q_pd(<2 x double> %a0, i8* %a1, <2 x i64> %idx, <2 x double> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_q_pd: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_q_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_q_pd: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherqpd %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0xe9,0x93,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double> %a0, i8* %a1, <2 x i64> %idx, <2 x double> %mask, i8 2) ; ret <2 x double> %res @@ -1564,17 +1451,11 @@ declare <2 x double> @llvm.x86.avx2.gather.q.pd(<2 x double>, i8*, <2 x i64>, <2 x double>, i8) nounwind readonly define <4 x double> @test_x86_avx2_gather_q_pd_256(<4 x double> %a0, i8* %a1, <4 x i64> %idx, <4 x double> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_q_pd_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_q_pd_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_q_pd_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherqpd %ymm2, (%eax,%ymm1,2), %ymm0 ## encoding: [0xc4,0xe2,0xed,0x93,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double> %a0, i8* %a1, <4 x i64> %idx, <4 x double> %mask, i8 2) ; ret <4 x double> %res @@ -1583,17 +1464,11 @@ declare <4 x double> @llvm.x86.avx2.gather.q.pd.256(<4 x double>, i8*, <4 x i64>, <4 x double>, i8) nounwind readonly define <4 x float> @test_x86_avx2_gather_d_ps(<4 x float> %a0, i8* %a1, <4 x i32> %idx, <4 x float> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_ps: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherdps %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x69,0x92,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> %a0, i8* %a1, <4 x i32> %idx, <4 x float> %mask, i8 2) ; ret <4 x float> %res @@ -1602,17 +1477,11 @@ declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*, <4 x i32>, <4 x float>, i8) nounwind readonly define <8 x float> @test_x86_avx2_gather_d_ps_256(<8 x float> %a0, i8* %a1, <8 x i32> %idx, <8 x float> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_ps_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_ps_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_ps_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherdps %ymm2, (%eax,%ymm1,2), %ymm0 ## encoding: [0xc4,0xe2,0x6d,0x92,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0, i8* %a1, <8 x i32> %idx, <8 x float> %mask, i8 2) ; ret <8 x float> %res @@ -1621,17 +1490,11 @@ declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*, <8 x i32>, <8 x float>, i8) nounwind readonly define <4 x float> @test_x86_avx2_gather_q_ps(<4 x float> %a0, i8* %a1, <2 x i64> %idx, <4 x float> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_q_ps: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_q_ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_q_ps: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vgatherqps %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x69,0x93,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float> %a0, i8* %a1, <2 x i64> %idx, <4 x float> %mask, i8 2) ; ret <4 x float> %res @@ -1642,16 +1505,16 @@ declare <4 x float> @llvm.x86.avx2.gather.q.ps(<4 x float>, i8*, define <4 x float> @test_x86_avx2_gather_q_ps_256(<4 x float> %a0, i8* %a1, <4 x i64> %idx, <4 x float> %mask) { ; AVX2-LABEL: test_x86_avx2_gather_q_ps_256: ; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 -; AVX2-NEXT: vzeroupper -; AVX2-NEXT: retl +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x6d,0x93,0x04,0x48] +; AVX2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_gather_q_ps_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vgatherqps %xmm2, (%eax,%ymm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x6d,0x93,0x04,0x48] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float> %a0, i8* %a1, <4 x i64> %idx, <4 x float> %mask, i8 2) ; ret <4 x float> %res @@ -1660,17 +1523,11 @@ declare <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float>, i8*, <4 x i64>, <4 x float>, i8) nounwind readonly define <2 x i64> @test_x86_avx2_gather_d_q(<2 x i64> %a0, i8* %a1, <4 x i32> %idx, <2 x i64> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_q: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_q: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherdq %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0xe9,0x90,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.avx2.gather.d.q(<2 x i64> %a0, i8* %a1, <4 x i32> %idx, <2 x i64> %mask, i8 2) ; ret <2 x i64> %res @@ -1679,17 +1536,11 @@ declare <2 x i64> @llvm.x86.avx2.gather.d.q(<2 x i64>, i8*, <4 x i32>, <2 x i64>, i8) nounwind readonly define <4 x i64> @test_x86_avx2_gather_d_q_256(<4 x i64> %a0, i8* %a1, <4 x i32> %idx, <4 x i64> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_q_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_q_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_q_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherdq %ymm2, (%eax,%xmm1,2), %ymm0 ## encoding: [0xc4,0xe2,0xed,0x90,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.gather.d.q.256(<4 x i64> %a0, i8* %a1, <4 x i32> %idx, <4 x i64> %mask, i8 2) ; ret <4 x i64> %res @@ -1698,17 +1549,11 @@ declare <4 x i64> @llvm.x86.avx2.gather.d.q.256(<4 x i64>, i8*, <4 x i32>, <4 x i64>, i8) nounwind readonly define <2 x i64> @test_x86_avx2_gather_q_q(<2 x i64> %a0, i8* %a1, <2 x i64> %idx, <2 x i64> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_q_q: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_q_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_q_q: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherqq %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0xe9,0x91,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.avx2.gather.q.q(<2 x i64> %a0, i8* %a1, <2 x i64> %idx, <2 x i64> %mask, i8 2) ; ret <2 x i64> %res @@ -1717,17 +1562,11 @@ declare <2 x i64> @llvm.x86.avx2.gather.q.q(<2 x i64>, i8*, <2 x i64>, <2 x i64>, i8) nounwind readonly define <4 x i64> @test_x86_avx2_gather_q_q_256(<4 x i64> %a0, i8* %a1, <4 x i64> %idx, <4 x i64> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_q_q_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_q_q_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_q_q_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherqq %ymm2, (%eax,%ymm1,2), %ymm0 ## encoding: [0xc4,0xe2,0xed,0x91,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i64> @llvm.x86.avx2.gather.q.q.256(<4 x i64> %a0, i8* %a1, <4 x i64> %idx, <4 x i64> %mask, i8 2) ; ret <4 x i64> %res @@ -1736,17 +1575,11 @@ declare <4 x i64> @llvm.x86.avx2.gather.q.q.256(<4 x i64>, i8*, <4 x i64>, <4 x i64>, i8) nounwind readonly define <4 x i32> @test_x86_avx2_gather_d_d(<4 x i32> %a0, i8* %a1, <4 x i32> %idx, <4 x i32> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_d: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_d: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherdd %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x69,0x90,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32> %a0, i8* %a1, <4 x i32> %idx, <4 x i32> %mask, i8 2) ; ret <4 x i32> %res @@ -1755,17 +1588,11 @@ declare <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32>, i8*, <4 x i32>, <4 x i32>, i8) nounwind readonly define <8 x i32> @test_x86_avx2_gather_d_d_256(<8 x i32> %a0, i8* %a1, <8 x i32> %idx, <8 x i32> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_d_d_256: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_d_d_256: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_d_d_256: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherdd %ymm2, (%eax,%ymm1,2), %ymm0 ## encoding: [0xc4,0xe2,0x6d,0x90,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i32> @llvm.x86.avx2.gather.d.d.256(<8 x i32> %a0, i8* %a1, <8 x i32> %idx, <8 x i32> %mask, i8 2) ; ret <8 x i32> %res @@ -1774,17 +1601,11 @@ declare <8 x i32> @llvm.x86.avx2.gather.d.d.256(<8 x i32>, i8*, <8 x i32>, <8 x i32>, i8) nounwind readonly define <4 x i32> @test_x86_avx2_gather_q_d(<4 x i32> %a0, i8* %a1, <2 x i64> %idx, <4 x i32> %mask) { -; AVX2-LABEL: test_x86_avx2_gather_q_d: -; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX2-NEXT: retl -; -; AVX512VL-LABEL: test_x86_avx2_gather_q_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 -; AVX512VL-NEXT: retl +; CHECK-LABEL: test_x86_avx2_gather_q_d: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: vpgatherqd %xmm2, (%eax,%xmm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x69,0x91,0x04,0x48] +; CHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.gather.q.d(<4 x i32> %a0, i8* %a1, <2 x i64> %idx, <4 x i32> %mask, i8 2) ; ret <4 x i32> %res @@ -1795,16 +1616,16 @@ declare <4 x i32> @llvm.x86.avx2.gather.q.d(<4 x i32>, i8*, define <4 x i32> @test_x86_avx2_gather_q_d_256(<4 x i32> %a0, i8* %a1, <4 x i64> %idx, <4 x i32> %mask) { ; AVX2-LABEL: test_x86_avx2_gather_q_d_256: ; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 -; AVX2-NEXT: vzeroupper -; AVX2-NEXT: retl +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x6d,0x91,0x04,0x48] +; AVX2-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_x86_avx2_gather_q_d_256: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vpgatherqd %xmm2, (%eax,%ymm1,2), %xmm0 ## encoding: [0xc4,0xe2,0x6d,0x91,0x04,0x48] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.avx2.gather.q.d.256(<4 x i32> %a0, i8* %a1, <4 x i64> %idx, <4 x i32> %mask, i8 2) ; ret <4 x i32> %res @@ -1817,21 +1638,21 @@ define <8 x float> @test_gather_mask(<8 x float> %a0, float* %a, <8 x i32> %idx ;; gather with mask ; AVX2-LABEL: test_gather_mask: ; AVX2: ## BB#0: -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX2-NEXT: vmovaps %ymm2, %ymm3 -; AVX2-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 -; AVX2-NEXT: vmovups %ymm2, (%eax) -; AVX2-NEXT: retl +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; AVX2-NEXT: vmovaps %ymm2, %ymm3 ## encoding: [0xc5,0xfc,0x28,0xda] +; AVX2-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 ## encoding: [0xc4,0xe2,0x65,0x92,0x04,0x89] +; AVX2-NEXT: vmovups %ymm2, (%eax) ## encoding: [0xc5,0xfc,0x11,0x10] +; AVX2-NEXT: retl ## encoding: [0xc3] ; ; AVX512VL-LABEL: test_gather_mask: ; AVX512VL: ## BB#0: -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax -; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx -; AVX512VL-NEXT: vmovaps %ymm2, %ymm3 -; AVX512VL-NEXT: vgatherdps %ymm3, (%ecx,%ymm1,4), %ymm0 -; AVX512VL-NEXT: vmovups %ymm2, (%eax) -; AVX512VL-NEXT: retl +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX512VL-NEXT: vmovaps %ymm2, %ymm3 ## encoding: [0x62,0xf1,0x7c,0x28,0x28,0xda] +; AVX512VL-NEXT: vgatherdps %ymm3, (%eax,%ymm1,4), %ymm0 ## encoding: [0xc4,0xe2,0x65,0x92,0x04,0x88] +; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; AVX512VL-NEXT: vmovups %ymm2, (%eax) ## encoding: [0x62,0xf1,0x7c,0x28,0x11,0x10] +; AVX512VL-NEXT: retl ## encoding: [0xc3] %a_i8 = bitcast float* %a to i8* %res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> %a0, i8* %a_i8, <8 x i32> %idx, <8 x float> %mask, i8 4) ; diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll index 1df432185701..4b7c282259bf 100644 --- a/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll @@ -1,17 +1,19 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by update_llc_test_checks.py -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse | FileCheck %s --check-prefix=SSE -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=KNL +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse -show-mc-encoding | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX define <4 x float> @test_x86_sse_add_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_add_ss: ; SSE: ## BB#0: -; SSE-NEXT: addss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: addss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x58,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_add_ss: -; KNL: ## BB#0: -; KNL-NEXT: vaddss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_add_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vaddss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x58,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -21,13 +23,13 @@ declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_cmp_ps: ; SSE: ## BB#0: -; SSE-NEXT: cmpordps %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cmpordps %xmm1, %xmm0 ## encoding: [0x0f,0xc2,0xc1,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_cmp_ps: -; KNL: ## BB#0: -; KNL-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_cmp_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcmpordps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0xc2,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -37,13 +39,13 @@ declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse_cmp_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_cmp_ss: ; SSE: ## BB#0: -; SSE-NEXT: cmpordss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cmpordss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0xc2,0xc1,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_cmp_ss: -; KNL: ## BB#0: -; KNL-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_cmp_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcmpordss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0xc2,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -53,21 +55,30 @@ declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind define i32 @test_x86_sse_comieq_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_comieq_ss: ; SSE: ## BB#0: -; SSE-NEXT: comiss %xmm1, %xmm0 -; SSE-NEXT: setnp %al -; SSE-NEXT: sete %cl -; SSE-NEXT: andb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_comieq_ss: -; KNL: ## BB#0: -; KNL-NEXT: vcomiss %xmm1, %xmm0 -; KNL-NEXT: setnp %al -; KNL-NEXT: sete %cl -; KNL-NEXT: andb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1] +; SSE-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SSE-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SSE-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_comieq_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX2-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX2-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX2-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_comieq_ss: +; SKX: ## BB#0: +; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; SKX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SKX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SKX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -77,17 +88,24 @@ declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comige_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_comige_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comiss %xmm1, %xmm0 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_comige_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomiss %xmm1, %xmm0 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_comige_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_comige_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -97,17 +115,24 @@ declare i32 @llvm.x86.sse.comige.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comigt_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_comigt_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comiss %xmm1, %xmm0 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_comigt_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomiss %xmm1, %xmm0 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_comigt_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_comigt_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -117,17 +142,24 @@ declare i32 @llvm.x86.sse.comigt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comile_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_comile_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comiss %xmm0, %xmm1 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_comile_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomiss %xmm0, %xmm1 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comiss %xmm0, %xmm1 ## encoding: [0x0f,0x2f,0xc8] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_comile_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2f,0xc8] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_comile_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc8] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -137,17 +169,24 @@ declare i32 @llvm.x86.sse.comile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comilt_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_comilt_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comiss %xmm0, %xmm1 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_comilt_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomiss %xmm0, %xmm1 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comiss %xmm0, %xmm1 ## encoding: [0x0f,0x2f,0xc8] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_comilt_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2f,0xc8] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_comilt_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc8] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -157,21 +196,30 @@ declare i32 @llvm.x86.sse.comilt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_comineq_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_comineq_ss: ; SSE: ## BB#0: -; SSE-NEXT: comiss %xmm1, %xmm0 -; SSE-NEXT: setp %al -; SSE-NEXT: setne %cl -; SSE-NEXT: orb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_comineq_ss: -; KNL: ## BB#0: -; KNL-NEXT: vcomiss %xmm1, %xmm0 -; KNL-NEXT: setp %al -; KNL-NEXT: setne %cl -; KNL-NEXT: orb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: comiss %xmm1, %xmm0 ## encoding: [0x0f,0x2f,0xc1] +; SSE-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SSE-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SSE-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_comineq_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2f,0xc1] +; AVX2-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX2-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX2-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_comineq_ss: +; SKX: ## BB#0: +; SKX-NEXT: vcomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2f,0xc1] +; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.comineq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -181,15 +229,21 @@ declare i32 @llvm.x86.sse.comineq.ss(<4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_sse_cvtsi2ss(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_cvtsi2ss: ; SSE: ## BB#0: -; SSE-NEXT: movl $7, %eax -; SSE-NEXT: cvtsi2ssl %eax, %xmm0 -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_cvtsi2ss: -; KNL: ## BB#0: -; KNL-NEXT: movl $7, %eax -; KNL-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 -; KNL-NEXT: retl +; SSE-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE-NEXT: cvtsi2ssl %eax, %xmm0 ## encoding: [0xf3,0x0f,0x2a,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_cvtsi2ss: +; AVX2: ## BB#0: +; AVX2-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; AVX2-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x2a,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_cvtsi2ss: +; SKX: ## BB#0: +; SKX-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SKX-NEXT: vcvtsi2ssl %eax, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7e,0x08,0x2a,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -199,13 +253,18 @@ declare <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float>, i32) nounwind readnone define i32 @test_x86_sse_cvtss2si(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_cvtss2si: ; SSE: ## BB#0: -; SSE-NEXT: cvtss2si %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: cvtss2si %xmm0, %eax ## encoding: [0xf3,0x0f,0x2d,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_cvtss2si: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtss2si %xmm0, %eax ## encoding: [0xc5,0xfa,0x2d,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_cvtss2si: -; KNL: ## BB#0: -; KNL-NEXT: vcvtss2si %xmm0, %eax -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse_cvtss2si: +; SKX: ## BB#0: +; SKX-NEXT: vcvtss2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7e,0x08,0x2d,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -215,13 +274,18 @@ declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone define i32 @test_x86_sse_cvttss2si(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_cvttss2si: ; SSE: ## BB#0: -; SSE-NEXT: cvttss2si %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: cvttss2si %xmm0, %eax ## encoding: [0xf3,0x0f,0x2c,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_cvttss2si: -; KNL: ## BB#0: -; KNL-NEXT: vcvttss2si %xmm0, %eax -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse_cvttss2si: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvttss2si %xmm0, %eax ## encoding: [0xc5,0xfa,0x2c,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_cvttss2si: +; SKX: ## BB#0: +; SKX-NEXT: vcvttss2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7e,0x08,0x2c,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -231,13 +295,13 @@ declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_div_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_div_ss: ; SSE: ## BB#0: -; SSE-NEXT: divss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: divss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5e,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_div_ss: -; KNL: ## BB#0: -; KNL-NEXT: vdivss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_div_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vdivss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5e,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -247,15 +311,15 @@ declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind read define void @test_x86_sse_ldmxcsr(i8* %a0) { ; SSE-LABEL: test_x86_sse_ldmxcsr: ; SSE: ## BB#0: -; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; SSE-NEXT: ldmxcsr (%eax) -; SSE-NEXT: retl +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: ldmxcsr (%eax) ## encoding: [0x0f,0xae,0x10] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_ldmxcsr: -; KNL: ## BB#0: -; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax -; KNL-NEXT: vldmxcsr (%eax) -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_ldmxcsr: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vldmxcsr (%eax) ## encoding: [0xc5,0xf8,0xae,0x10] +; VCHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.sse.ldmxcsr(i8* %a0) ret void } @@ -266,13 +330,18 @@ declare void @llvm.x86.sse.ldmxcsr(i8*) nounwind define <4 x float> @test_x86_sse_max_ps(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_max_ps: ; SSE: ## BB#0: -; SSE-NEXT: maxps %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: maxps %xmm1, %xmm0 ## encoding: [0x0f,0x5f,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_max_ps: +; AVX2: ## BB#0: +; AVX2-NEXT: vmaxps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5f,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_max_ps: -; KNL: ## BB#0: -; KNL-NEXT: vmaxps %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse_max_ps: +; SKX: ## BB#0: +; SKX-NEXT: vmaxps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x5f,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -282,13 +351,13 @@ declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_max_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_max_ss: ; SSE: ## BB#0: -; SSE-NEXT: maxss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: maxss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5f,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_max_ss: -; KNL: ## BB#0: -; KNL-NEXT: vmaxss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_max_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmaxss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5f,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -298,13 +367,18 @@ declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_min_ps(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_min_ps: ; SSE: ## BB#0: -; SSE-NEXT: minps %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: minps %xmm1, %xmm0 ## encoding: [0x0f,0x5d,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_min_ps: -; KNL: ## BB#0: -; KNL-NEXT: vminps %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse_min_ps: +; AVX2: ## BB#0: +; AVX2-NEXT: vminps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5d,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_min_ps: +; SKX: ## BB#0: +; SKX-NEXT: vminps %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x5d,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -314,13 +388,13 @@ declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_min_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_min_ss: ; SSE: ## BB#0: -; SSE-NEXT: minss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: minss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5d,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_min_ss: -; KNL: ## BB#0: -; KNL-NEXT: vminss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_min_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vminss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5d,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -330,13 +404,13 @@ declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind read define i32 @test_x86_sse_movmsk_ps(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_movmsk_ps: ; SSE: ## BB#0: -; SSE-NEXT: movmskps %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: movmskps %xmm0, %eax ## encoding: [0x0f,0x50,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_movmsk_ps: -; KNL: ## BB#0: -; KNL-NEXT: vmovmskps %xmm0, %eax -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_movmsk_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmovmskps %xmm0, %eax ## encoding: [0xc5,0xf8,0x50,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.movmsk.ps(<4 x float> %a0) ; [#uses=1] ret i32 %res } @@ -347,13 +421,13 @@ declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_mul_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_mul_ss: ; SSE: ## BB#0: -; SSE-NEXT: mulss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: mulss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x59,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_mul_ss: -; KNL: ## BB#0: -; KNL-NEXT: vmulss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_mul_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmulss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x59,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -363,13 +437,18 @@ declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) nounwind read define <4 x float> @test_x86_sse_rcp_ps(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_rcp_ps: ; SSE: ## BB#0: -; SSE-NEXT: rcpps %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: rcpps %xmm0, %xmm0 ## encoding: [0x0f,0x53,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_rcp_ps: +; AVX2: ## BB#0: +; AVX2-NEXT: vrcpps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x53,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_rcp_ps: -; KNL: ## BB#0: -; KNL-NEXT: vrcpps %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse_rcp_ps: +; SKX: ## BB#0: +; SKX-NEXT: vrcp14ps %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x4c,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -379,13 +458,13 @@ declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rcp_ss(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_rcp_ss: ; SSE: ## BB#0: -; SSE-NEXT: rcpss %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: rcpss %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x53,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_rcp_ss: -; KNL: ## BB#0: -; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_rcp_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vrcpss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x53,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -395,13 +474,18 @@ declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rsqrt_ps(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_rsqrt_ps: ; SSE: ## BB#0: -; SSE-NEXT: rsqrtps %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: rsqrtps %xmm0, %xmm0 ## encoding: [0x0f,0x52,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_rsqrt_ps: +; AVX2: ## BB#0: +; AVX2-NEXT: vrsqrtps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x52,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_rsqrt_ps: -; KNL: ## BB#0: -; KNL-NEXT: vrsqrtps %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse_rsqrt_ps: +; SKX: ## BB#0: +; SKX-NEXT: vrsqrt14ps %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x4e,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -411,13 +495,13 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_rsqrt_ss(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_rsqrt_ss: ; SSE: ## BB#0: -; SSE-NEXT: rsqrtss %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: rsqrtss %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x52,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_rsqrt_ss: -; KNL: ## BB#0: -; KNL-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_rsqrt_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x52,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -427,13 +511,13 @@ declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_sqrt_ps(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_sqrt_ps: ; SSE: ## BB#0: -; SSE-NEXT: sqrtps %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: sqrtps %xmm0, %xmm0 ## encoding: [0x0f,0x51,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_sqrt_ps: -; KNL: ## BB#0: -; KNL-NEXT: vsqrtps %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_sqrt_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vsqrtps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x51,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -443,13 +527,13 @@ declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>) nounwind readnone define <4 x float> @test_x86_sse_sqrt_ss(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse_sqrt_ss: ; SSE: ## BB#0: -; SSE-NEXT: sqrtss %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: sqrtss %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x51,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_sqrt_ss: -; KNL: ## BB#0: -; KNL-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_sqrt_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x51,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -459,15 +543,15 @@ declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone define void @test_x86_sse_stmxcsr(i8* %a0) { ; SSE-LABEL: test_x86_sse_stmxcsr: ; SSE: ## BB#0: -; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; SSE-NEXT: stmxcsr (%eax) -; SSE-NEXT: retl +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: stmxcsr (%eax) ## encoding: [0x0f,0xae,0x18] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_stmxcsr: -; KNL: ## BB#0: -; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax -; KNL-NEXT: vstmxcsr (%eax) -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_stmxcsr: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vstmxcsr (%eax) ## encoding: [0xc5,0xf8,0xae,0x18] +; VCHECK-NEXT: retl ## encoding: [0xc3] call void @llvm.x86.sse.stmxcsr(i8* %a0) ret void } @@ -477,13 +561,13 @@ declare void @llvm.x86.sse.stmxcsr(i8*) nounwind define <4 x float> @test_x86_sse_sub_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_sub_ss: ; SSE: ## BB#0: -; SSE-NEXT: subss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: subss %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5c,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse_sub_ss: -; KNL: ## BB#0: -; KNL-NEXT: vsubss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse_sub_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vsubss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5c,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -493,21 +577,30 @@ declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) nounwind read define i32 @test_x86_sse_ucomieq_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_ucomieq_ss: ; SSE: ## BB#0: -; SSE-NEXT: ucomiss %xmm1, %xmm0 -; SSE-NEXT: setnp %al -; SSE-NEXT: sete %cl -; SSE-NEXT: andb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_ucomieq_ss: -; KNL: ## BB#0: -; KNL-NEXT: vucomiss %xmm1, %xmm0 -; KNL-NEXT: setnp %al -; KNL-NEXT: sete %cl -; KNL-NEXT: andb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1] +; SSE-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SSE-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SSE-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_ucomieq_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX2-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX2-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX2-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_ucomieq_ss: +; SKX: ## BB#0: +; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; SKX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SKX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SKX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -517,17 +610,24 @@ declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomige_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_ucomige_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomiss %xmm1, %xmm0 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_ucomige_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomiss %xmm1, %xmm0 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_ucomige_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_ucomige_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -537,17 +637,24 @@ declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomigt_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_ucomigt_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomiss %xmm1, %xmm0 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_ucomigt_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomiss %xmm1, %xmm0 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_ucomigt_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_ucomigt_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -557,17 +664,24 @@ declare i32 @llvm.x86.sse.ucomigt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomile_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_ucomile_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomiss %xmm0, %xmm1 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_ucomile_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomiss %xmm0, %xmm1 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomiss %xmm0, %xmm1 ## encoding: [0x0f,0x2e,0xc8] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_ucomile_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2e,0xc8] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_ucomile_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc8] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -577,17 +691,24 @@ declare i32 @llvm.x86.sse.ucomile.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomilt_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_ucomilt_ss: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomiss %xmm0, %xmm1 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_ucomilt_ss: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomiss %xmm0, %xmm1 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomiss %xmm0, %xmm1 ## encoding: [0x0f,0x2e,0xc8] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_ucomilt_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0xc5,0xf8,0x2e,0xc8] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_ucomilt_ss: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomiss %xmm0, %xmm1 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc8] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } @@ -597,21 +718,30 @@ declare i32 @llvm.x86.sse.ucomilt.ss(<4 x float>, <4 x float>) nounwind readnone define i32 @test_x86_sse_ucomineq_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse_ucomineq_ss: ; SSE: ## BB#0: -; SSE-NEXT: ucomiss %xmm1, %xmm0 -; SSE-NEXT: setp %al -; SSE-NEXT: setne %cl -; SSE-NEXT: orb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse_ucomineq_ss: -; KNL: ## BB#0: -; KNL-NEXT: vucomiss %xmm1, %xmm0 -; KNL-NEXT: setp %al -; KNL-NEXT: setne %cl -; KNL-NEXT: orb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: ucomiss %xmm1, %xmm0 ## encoding: [0x0f,0x2e,0xc1] +; SSE-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SSE-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SSE-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse_ucomineq_ss: +; AVX2: ## BB#0: +; AVX2-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x2e,0xc1] +; AVX2-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX2-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX2-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse_ucomineq_ss: +; SKX: ## BB#0: +; SKX-NEXT: vucomiss %xmm1, %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x2e,0xc1] +; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %a0, <4 x float> %a1) ; [#uses=1] ret i32 %res } diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll index 4e01d429b7d2..e95b449ae440 100644 --- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll @@ -1,17 +1,18 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefix=SSE -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=KNL +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX define <2 x double> @test_x86_sse2_add_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_add_sd: ; SSE: ## BB#0: -; SSE-NEXT: addsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: addsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x58,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_add_sd: -; KNL: ## BB#0: -; KNL-NEXT: vaddsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_add_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x58,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -21,13 +22,13 @@ declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_cmp_pd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_cmp_pd: ; SSE: ## BB#0: -; SSE-NEXT: cmpordpd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cmpordpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xc2,0xc1,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cmp_pd: -; KNL: ## BB#0: -; KNL-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cmp_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc2,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -37,13 +38,13 @@ declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounw define <2 x double> @test_x86_sse2_cmp_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_cmp_sd: ; SSE: ## BB#0: -; SSE-NEXT: cmpordsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cmpordsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0xc2,0xc1,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cmp_sd: -; KNL: ## BB#0: -; KNL-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cmp_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xc2,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -53,21 +54,30 @@ declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounw define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_comieq_sd: ; SSE: ## BB#0: -; SSE-NEXT: comisd %xmm1, %xmm0 -; SSE-NEXT: setnp %al -; SSE-NEXT: sete %cl -; SSE-NEXT: andb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_comieq_sd: -; KNL: ## BB#0: -; KNL-NEXT: vcomisd %xmm1, %xmm0 -; KNL-NEXT: setnp %al -; KNL-NEXT: sete %cl -; KNL-NEXT: andb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: comisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2f,0xc1] +; SSE-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SSE-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SSE-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_comieq_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX2-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX2-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX2-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_comieq_sd: +; SKX: ## BB#0: +; SKX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; SKX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SKX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SKX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -77,17 +87,24 @@ declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_comige_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comisd %xmm1, %xmm0 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_comige_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomisd %xmm1, %xmm0 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2f,0xc1] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_comige_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_comige_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -97,17 +114,24 @@ declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_comigt_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comisd %xmm1, %xmm0 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_comigt_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomisd %xmm1, %xmm0 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2f,0xc1] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_comigt_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_comigt_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -117,17 +141,24 @@ declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_comile_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comisd %xmm0, %xmm1 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_comile_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomisd %xmm0, %xmm1 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comisd %xmm0, %xmm1 ## encoding: [0x66,0x0f,0x2f,0xc8] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_comile_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2f,0xc8] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_comile_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc8] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -137,17 +168,24 @@ declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_comilt_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: comisd %xmm0, %xmm1 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_comilt_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vcomisd %xmm0, %xmm1 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: comisd %xmm0, %xmm1 ## encoding: [0x66,0x0f,0x2f,0xc8] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_comilt_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2f,0xc8] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_comilt_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc8] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -157,21 +195,30 @@ declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>) nounwind readno define i32 @test_x86_sse2_comineq_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_comineq_sd: ; SSE: ## BB#0: -; SSE-NEXT: comisd %xmm1, %xmm0 -; SSE-NEXT: setp %al -; SSE-NEXT: setne %cl -; SSE-NEXT: orb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_comineq_sd: -; KNL: ## BB#0: -; KNL-NEXT: vcomisd %xmm1, %xmm0 -; KNL-NEXT: setp %al -; KNL-NEXT: setne %cl -; KNL-NEXT: orb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: comisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2f,0xc1] +; SSE-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SSE-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SSE-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_comineq_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] +; AVX2-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX2-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX2-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_comineq_sd: +; SKX: ## BB#0: +; SKX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2f,0xc1] +; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -181,13 +228,13 @@ declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>) nounwind readn define <4 x float> @test_x86_sse2_cvtdq2ps(<4 x i32> %a0) { ; SSE-LABEL: test_x86_sse2_cvtdq2ps: ; SSE: ## BB#0: -; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 ## encoding: [0x0f,0x5b,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtdq2ps: -; KNL: ## BB#0: -; KNL-NEXT: vcvtdq2ps %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtdq2ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvtdq2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5b,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -197,13 +244,13 @@ declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse2_cvtpd2dq(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_cvtpd2dq: ; SSE: ## BB#0: -; SSE-NEXT: cvtpd2dq %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtpd2dq %xmm0, %xmm0 ## encoding: [0xf2,0x0f,0xe6,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtpd2dq: -; KNL: ## BB#0: -; KNL-NEXT: vcvtpd2dq %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtpd2dq: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvtpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xe6,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -213,15 +260,24 @@ declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone define <2 x i64> @test_mm_cvtpd_epi32_zext(<2 x double> %a0) nounwind { ; SSE-LABEL: test_mm_cvtpd_epi32_zext: ; SSE: ## BB#0: -; SSE-NEXT: cvtpd2dq %xmm0, %xmm0 -; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero -; SSE-NEXT: retl -; -; KNL-LABEL: test_mm_cvtpd_epi32_zext: -; KNL: ## BB#0: -; KNL-NEXT: vcvtpd2dq %xmm0, %xmm0 -; KNL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; KNL-NEXT: retl +; SSE-NEXT: cvtpd2dq %xmm0, %xmm0 ## encoding: [0xf2,0x0f,0xe6,0xc0] +; SSE-NEXT: movq %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x7e,0xc0] +; SSE-NEXT: ## xmm0 = xmm0[0],zero +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_mm_cvtpd_epi32_zext: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xe6,0xc0] +; AVX2-NEXT: vmovq %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x7e,0xc0] +; AVX2-NEXT: ## xmm0 = xmm0[0],zero +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_mm_cvtpd_epi32_zext: +; SKX: ## BB#0: +; SKX-NEXT: vcvtpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xe6,0xc0] +; SKX-NEXT: vmovq %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfe,0x08,0x7e,0xc0] +; SKX-NEXT: ## xmm0 = xmm0[0],zero +; SKX-NEXT: retl ## encoding: [0xc3] %cvt = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0) %res = shufflevector <4 x i32> %cvt, <4 x i32> zeroinitializer, <4 x i32> %bc = bitcast <4 x i32> %res to <2 x i64> @@ -232,13 +288,18 @@ define <2 x i64> @test_mm_cvtpd_epi32_zext(<2 x double> %a0) nounwind { define <4 x float> @test_x86_sse2_cvtpd2ps(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_cvtpd2ps: ; SSE: ## BB#0: -; SSE-NEXT: cvtpd2ps %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtpd2ps %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x5a,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_cvtpd2ps: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5a,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtpd2ps: -; KNL: ## BB#0: -; KNL-NEXT: vcvtpd2ps %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_cvtpd2ps: +; SKX: ## BB#0: +; SKX-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5a,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -247,13 +308,20 @@ declare <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double>) nounwind readnone define <4 x float> @test_x86_sse2_cvtpd2ps_zext(<2 x double> %a0) nounwind { ; SSE-LABEL: test_x86_sse2_cvtpd2ps_zext: ; SSE: ## BB#0: -; SSE-NEXT: cvtpd2ps %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtpd2ps %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x5a,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_cvtpd2ps_zext: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5a,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtpd2ps_zext: -; KNL: ## BB#0: -; KNL-NEXT: vcvtpd2ps %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_cvtpd2ps_zext: +; SKX: ## BB#0: +; SKX-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5a,0xc0] +; SKX-NEXT: vmovq %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfe,0x08,0x7e,0xc0] +; SKX-NEXT: ## xmm0 = xmm0[0],zero +; SKX-NEXT: retl ## encoding: [0xc3] %cvt = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0) %res = shufflevector <4 x float> %cvt, <4 x float> zeroinitializer, <4 x i32> ret <4 x float> %res @@ -262,13 +330,13 @@ define <4 x float> @test_x86_sse2_cvtpd2ps_zext(<2 x double> %a0) nounwind { define <4 x i32> @test_x86_sse2_cvtps2dq(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse2_cvtps2dq: ; SSE: ## BB#0: -; SSE-NEXT: cvtps2dq %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtps2dq %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x5b,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtps2dq: -; KNL: ## BB#0: -; KNL-NEXT: vcvtps2dq %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtps2dq: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvtps2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5b,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -278,13 +346,18 @@ declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvtsd2si(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_cvtsd2si: ; SSE: ## BB#0: -; SSE-NEXT: cvtsd2si %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: cvtsd2si %xmm0, %eax ## encoding: [0xf2,0x0f,0x2d,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtsd2si: -; KNL: ## BB#0: -; KNL-NEXT: vcvtsd2si %xmm0, %eax -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_cvtsd2si: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtsd2si %xmm0, %eax ## encoding: [0xc5,0xfb,0x2d,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_cvtsd2si: +; SKX: ## BB#0: +; SKX-NEXT: vcvtsd2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7f,0x08,0x2d,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -294,13 +367,13 @@ declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_cvtsd2ss: ; SSE: ## BB#0: -; SSE-NEXT: cvtsd2ss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtsd2ss %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x5a,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtsd2ss: -; KNL: ## BB#0: -; KNL-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtsd2ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5a,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -310,16 +383,16 @@ declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind define <4 x float> @test_x86_sse2_cvtsd2ss_load(<4 x float> %a0, <2 x double>* %p1) { ; SSE-LABEL: test_x86_sse2_cvtsd2ss_load: ; SSE: ## BB#0: -; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; SSE-NEXT: movaps (%eax), %xmm1 -; SSE-NEXT: cvtsd2ss %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: movaps (%eax), %xmm1 ## encoding: [0x0f,0x28,0x08] +; SSE-NEXT: cvtsd2ss %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x5a,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtsd2ss_load: -; KNL: ## BB#0: -; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax -; KNL-NEXT: vcvtsd2ss (%eax), %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtsd2ss_load: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vcvtsd2ss (%eax), %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5a,0x00] +; VCHECK-NEXT: retl ## encoding: [0xc3] %a1 = load <2 x double>, <2 x double>* %p1 %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res @@ -329,15 +402,15 @@ define <4 x float> @test_x86_sse2_cvtsd2ss_load(<4 x float> %a0, <2 x double>* % define <4 x float> @test_x86_sse2_cvtsd2ss_load_optsize(<4 x float> %a0, <2 x double>* %p1) optsize { ; SSE-LABEL: test_x86_sse2_cvtsd2ss_load_optsize: ; SSE: ## BB#0: -; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; SSE-NEXT: cvtsd2ss (%eax), %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: cvtsd2ss (%eax), %xmm0 ## encoding: [0xf2,0x0f,0x5a,0x00] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtsd2ss_load_optsize: -; KNL: ## BB#0: -; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax -; KNL-NEXT: vcvtsd2ss (%eax), %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtsd2ss_load_optsize: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vcvtsd2ss (%eax), %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5a,0x00] +; VCHECK-NEXT: retl ## encoding: [0xc3] %a1 = load <2 x double>, <2 x double>* %p1 %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res @@ -347,13 +420,18 @@ define <4 x float> @test_x86_sse2_cvtsd2ss_load_optsize(<4 x float> %a0, <2 x do define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) { ; SSE-LABEL: test_x86_sse2_cvtsi2sd: ; SSE: ## BB#0: -; SSE-NEXT: cvtsi2sdl {{[0-9]+}}(%esp), %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtsi2sdl {{[0-9]+}}(%esp), %xmm0 ## encoding: [0xf2,0x0f,0x2a,0x44,0x24,0x04] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_cvtsi2sd: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x2a,0x44,0x24,0x04] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtsi2sd: -; KNL: ## BB#0: -; KNL-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_cvtsi2sd: +; SKX: ## BB#0: +; SKX-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x2a,0x44,0x24,0x01] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -363,13 +441,13 @@ declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnon define <2 x double> @test_x86_sse2_cvtss2sd(<2 x double> %a0, <4 x float> %a1) { ; SSE-LABEL: test_x86_sse2_cvtss2sd: ; SSE: ## BB#0: -; SSE-NEXT: cvtss2sd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvtss2sd %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5a,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtss2sd: -; KNL: ## BB#0: -; KNL-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtss2sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5a,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -379,16 +457,16 @@ declare <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double>, <4 x float>) nounwind define <2 x double> @test_x86_sse2_cvtss2sd_load(<2 x double> %a0, <4 x float>* %p1) { ; SSE-LABEL: test_x86_sse2_cvtss2sd_load: ; SSE: ## BB#0: -; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; SSE-NEXT: movaps (%eax), %xmm1 -; SSE-NEXT: cvtss2sd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: movaps (%eax), %xmm1 ## encoding: [0x0f,0x28,0x08] +; SSE-NEXT: cvtss2sd %xmm1, %xmm0 ## encoding: [0xf3,0x0f,0x5a,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtss2sd_load: -; KNL: ## BB#0: -; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax -; KNL-NEXT: vcvtss2sd (%eax), %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtss2sd_load: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vcvtss2sd (%eax), %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5a,0x00] +; VCHECK-NEXT: retl ## encoding: [0xc3] %a1 = load <4 x float>, <4 x float>* %p1 %res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res @@ -398,15 +476,15 @@ define <2 x double> @test_x86_sse2_cvtss2sd_load(<2 x double> %a0, <4 x float>* define <2 x double> @test_x86_sse2_cvtss2sd_load_optsize(<2 x double> %a0, <4 x float>* %p1) optsize { ; SSE-LABEL: test_x86_sse2_cvtss2sd_load_optsize: ; SSE: ## BB#0: -; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax -; SSE-NEXT: cvtss2sd (%eax), %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: cvtss2sd (%eax), %xmm0 ## encoding: [0xf3,0x0f,0x5a,0x00] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvtss2sd_load_optsize: -; KNL: ## BB#0: -; KNL-NEXT: movl {{[0-9]+}}(%esp), %eax -; KNL-NEXT: vcvtss2sd (%eax), %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvtss2sd_load_optsize: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vcvtss2sd (%eax), %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5a,0x00] +; VCHECK-NEXT: retl ## encoding: [0xc3] %a1 = load <4 x float>, <4 x float>* %p1 %res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res @@ -416,13 +494,13 @@ define <2 x double> @test_x86_sse2_cvtss2sd_load_optsize(<2 x double> %a0, <4 x define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_cvttpd2dq: ; SSE: ## BB#0: -; SSE-NEXT: cvttpd2dq %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvttpd2dq %xmm0, %xmm0 ## encoding: [0x66,0x0f,0xe6,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvttpd2dq: -; KNL: ## BB#0: -; KNL-NEXT: vcvttpd2dq %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvttpd2dq: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvttpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe6,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -432,15 +510,24 @@ declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone define <2 x i64> @test_mm_cvttpd_epi32_zext(<2 x double> %a0) nounwind { ; SSE-LABEL: test_mm_cvttpd_epi32_zext: ; SSE: ## BB#0: -; SSE-NEXT: cvttpd2dq %xmm0, %xmm0 -; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero -; SSE-NEXT: retl -; -; KNL-LABEL: test_mm_cvttpd_epi32_zext: -; KNL: ## BB#0: -; KNL-NEXT: vcvttpd2dq %xmm0, %xmm0 -; KNL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; KNL-NEXT: retl +; SSE-NEXT: cvttpd2dq %xmm0, %xmm0 ## encoding: [0x66,0x0f,0xe6,0xc0] +; SSE-NEXT: movq %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x7e,0xc0] +; SSE-NEXT: ## xmm0 = xmm0[0],zero +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_mm_cvttpd_epi32_zext: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvttpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe6,0xc0] +; AVX2-NEXT: vmovq %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x7e,0xc0] +; AVX2-NEXT: ## xmm0 = xmm0[0],zero +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_mm_cvttpd_epi32_zext: +; SKX: ## BB#0: +; SKX-NEXT: vcvttpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe6,0xc0] +; SKX-NEXT: vmovq %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfe,0x08,0x7e,0xc0] +; SKX-NEXT: ## xmm0 = xmm0[0],zero +; SKX-NEXT: retl ## encoding: [0xc3] %cvt = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0) %res = shufflevector <4 x i32> %cvt, <4 x i32> zeroinitializer, <4 x i32> %bc = bitcast <4 x i32> %res to <2 x i64> @@ -451,13 +538,13 @@ define <2 x i64> @test_mm_cvttpd_epi32_zext(<2 x double> %a0) nounwind { define <4 x i32> @test_x86_sse2_cvttps2dq(<4 x float> %a0) { ; SSE-LABEL: test_x86_sse2_cvttps2dq: ; SSE: ## BB#0: -; SSE-NEXT: cvttps2dq %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: cvttps2dq %xmm0, %xmm0 ## encoding: [0xf3,0x0f,0x5b,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvttps2dq: -; KNL: ## BB#0: -; KNL-NEXT: vcvttps2dq %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_cvttps2dq: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vcvttps2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5b,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -467,13 +554,18 @@ declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone define i32 @test_x86_sse2_cvttsd2si(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_cvttsd2si: ; SSE: ## BB#0: -; SSE-NEXT: cvttsd2si %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: cvttsd2si %xmm0, %eax ## encoding: [0xf2,0x0f,0x2c,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_cvttsd2si: -; KNL: ## BB#0: -; KNL-NEXT: vcvttsd2si %xmm0, %eax -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_cvttsd2si: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvttsd2si %xmm0, %eax ## encoding: [0xc5,0xfb,0x2c,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_cvttsd2si: +; SKX: ## BB#0: +; SKX-NEXT: vcvttsd2si %xmm0, %eax ## encoding: [0x62,0xf1,0x7f,0x08,0x2c,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -483,13 +575,13 @@ declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_div_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_div_sd: ; SSE: ## BB#0: -; SSE-NEXT: divsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: divsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x5e,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_div_sd: -; KNL: ## BB#0: -; KNL-NEXT: vdivsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_div_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vdivsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5e,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -500,13 +592,18 @@ declare <2 x double> @llvm.x86.sse2.div.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_max_pd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_max_pd: ; SSE: ## BB#0: -; SSE-NEXT: maxpd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: maxpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x5f,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_max_pd: +; AVX2: ## BB#0: +; AVX2-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5f,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_max_pd: -; KNL: ## BB#0: -; KNL-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_max_pd: +; SKX: ## BB#0: +; SKX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5f,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -516,13 +613,13 @@ declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_max_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_max_sd: ; SSE: ## BB#0: -; SSE-NEXT: maxsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: maxsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x5f,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_max_sd: -; KNL: ## BB#0: -; KNL-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_max_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5f,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -532,13 +629,18 @@ declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_min_pd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_min_pd: ; SSE: ## BB#0: -; SSE-NEXT: minpd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: minpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x5d,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_min_pd: +; AVX2: ## BB#0: +; AVX2-NEXT: vminpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5d,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_min_pd: -; KNL: ## BB#0: -; KNL-NEXT: vminpd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_min_pd: +; SKX: ## BB#0: +; SKX-NEXT: vminpd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x5d,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -548,13 +650,13 @@ declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind define <2 x double> @test_x86_sse2_min_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_min_sd: ; SSE: ## BB#0: -; SSE-NEXT: minsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: minsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x5d,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_min_sd: -; KNL: ## BB#0: -; KNL-NEXT: vminsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_min_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vminsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5d,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -564,13 +666,13 @@ declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind define i32 @test_x86_sse2_movmsk_pd(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_movmsk_pd: ; SSE: ## BB#0: -; SSE-NEXT: movmskpd %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: movmskpd %xmm0, %eax ## encoding: [0x66,0x0f,0x50,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_movmsk_pd: -; KNL: ## BB#0: -; KNL-NEXT: vmovmskpd %xmm0, %eax -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_movmsk_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmovmskpd %xmm0, %eax ## encoding: [0xc5,0xf9,0x50,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; [#uses=1] ret i32 %res } @@ -582,13 +684,13 @@ declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_mul_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_mul_sd: ; SSE: ## BB#0: -; SSE-NEXT: mulsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: mulsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x59,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_mul_sd: -; KNL: ## BB#0: -; KNL-NEXT: vmulsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_mul_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmulsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x59,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -598,13 +700,18 @@ declare <2 x double> @llvm.x86.sse2.mul.sd(<2 x double>, <2 x double>) nounwind define <8 x i16> @test_x86_sse2_packssdw_128(<4 x i32> %a0, <4 x i32> %a1) { ; SSE-LABEL: test_x86_sse2_packssdw_128: ; SSE: ## BB#0: -; SSE-NEXT: packssdw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: packssdw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x6b,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_packssdw_128: -; KNL: ## BB#0: -; KNL-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_packssdw_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x6b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_packssdw_128: +; SKX: ## BB#0: +; SKX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x6b,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -614,13 +721,18 @@ declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind rea define <16 x i8> @test_x86_sse2_packsswb_128(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_packsswb_128: ; SSE: ## BB#0: -; SSE-NEXT: packsswb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: packsswb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x63,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_packsswb_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x63,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_packsswb_128: -; KNL: ## BB#0: -; KNL-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_packsswb_128: +; SKX: ## BB#0: +; SKX-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x63,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -630,13 +742,18 @@ declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>) nounwind rea define <16 x i8> @test_x86_sse2_packuswb_128(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_packuswb_128: ; SSE: ## BB#0: -; SSE-NEXT: packuswb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: packuswb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x67,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_packuswb_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x67,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_packuswb_128: -; KNL: ## BB#0: -; KNL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_packuswb_128: +; SKX: ## BB#0: +; SKX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x67,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -646,13 +763,18 @@ declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind rea define <16 x i8> @test_x86_sse2_padds_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_padds_b: ; SSE: ## BB#0: -; SSE-NEXT: paddsb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: paddsb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xec,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_padds_b: -; KNL: ## BB#0: -; KNL-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_padds_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xec,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_padds_b: +; SKX: ## BB#0: +; SKX-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xec,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -662,13 +784,18 @@ declare <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_padds_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_padds_w: ; SSE: ## BB#0: -; SSE-NEXT: paddsw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: paddsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xed,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_padds_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xed,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_padds_w: -; KNL: ## BB#0: -; KNL-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_padds_w: +; SKX: ## BB#0: +; SKX-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xed,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -678,13 +805,18 @@ declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_paddus_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_paddus_b: ; SSE: ## BB#0: -; SSE-NEXT: paddusb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: paddusb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdc,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_paddus_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdc,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_paddus_b: -; KNL: ## BB#0: -; KNL-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_paddus_b: +; SKX: ## BB#0: +; SKX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xdc,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -694,13 +826,18 @@ declare <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8>, <16 x i8>) nounwind readnon define <8 x i16> @test_x86_sse2_paddus_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_paddus_w: ; SSE: ## BB#0: -; SSE-NEXT: paddusw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: paddusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xdd,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_paddus_w: -; KNL: ## BB#0: -; KNL-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_paddus_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_paddus_w: +; SKX: ## BB#0: +; SKX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xdd,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -710,13 +847,18 @@ declare <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16>, <8 x i16>) nounwind readnon define <16 x i8> @test_x86_sse2_pavg_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_pavg_b: ; SSE: ## BB#0: -; SSE-NEXT: pavgb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pavgb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe0,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pavg_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpavgb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe0,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pavg_b: -; KNL: ## BB#0: -; KNL-NEXT: vpavgb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pavg_b: +; SKX: ## BB#0: +; SKX-NEXT: vpavgb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe0,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -726,13 +868,18 @@ declare <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pavg_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_pavg_w: ; SSE: ## BB#0: -; SSE-NEXT: pavgw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pavgw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe3,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pavg_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpavgw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe3,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pavg_w: -; KNL: ## BB#0: -; KNL-NEXT: vpavgw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pavg_w: +; SKX: ## BB#0: +; SKX-NEXT: vpavgw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe3,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -742,13 +889,18 @@ declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_pmadd_wd(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_pmadd_wd: ; SSE: ## BB#0: -; SSE-NEXT: pmaddwd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pmaddwd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xf5,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmadd_wd: -; KNL: ## BB#0: -; KNL-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_pmadd_wd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf5,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_pmadd_wd: +; SKX: ## BB#0: +; SKX-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf5,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a0, <8 x i16> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -758,13 +910,18 @@ declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnon define <8 x i16> @test_x86_sse2_pmaxs_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_pmaxs_w: ; SSE: ## BB#0: -; SSE-NEXT: pmaxsw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pmaxsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xee,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pmaxs_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xee,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmaxs_w: -; KNL: ## BB#0: -; KNL-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pmaxs_w: +; SKX: ## BB#0: +; SKX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xee,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -774,13 +931,18 @@ declare <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_pmaxu_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_pmaxu_b: ; SSE: ## BB#0: -; SSE-NEXT: pmaxub %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pmaxub %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xde,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pmaxu_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xde,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmaxu_b: -; KNL: ## BB#0: -; KNL-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pmaxu_b: +; SKX: ## BB#0: +; SKX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xde,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -790,13 +952,18 @@ declare <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pmins_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_pmins_w: ; SSE: ## BB#0: -; SSE-NEXT: pminsw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pminsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xea,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmins_w: -; KNL: ## BB#0: -; KNL-NEXT: vpminsw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_pmins_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xea,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_pmins_w: +; SKX: ## BB#0: +; SKX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xea,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -806,13 +973,18 @@ declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_pminu_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_pminu_b: ; SSE: ## BB#0: -; SSE-NEXT: pminub %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pminub %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xda,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pminu_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminub %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xda,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pminu_b: -; KNL: ## BB#0: -; KNL-NEXT: vpminub %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pminu_b: +; SKX: ## BB#0: +; SKX-NEXT: vpminub %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xda,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -822,13 +994,13 @@ declare <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8>, <16 x i8>) nounwind readnone define i32 @test_x86_sse2_pmovmskb_128(<16 x i8> %a0) { ; SSE-LABEL: test_x86_sse2_pmovmskb_128: ; SSE: ## BB#0: -; SSE-NEXT: pmovmskb %xmm0, %eax -; SSE-NEXT: retl +; SSE-NEXT: pmovmskb %xmm0, %eax ## encoding: [0x66,0x0f,0xd7,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmovmskb_128: -; KNL: ## BB#0: -; KNL-NEXT: vpmovmskb %xmm0, %eax -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_pmovmskb_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpmovmskb %xmm0, %eax ## encoding: [0xc5,0xf9,0xd7,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0) ; [#uses=1] ret i32 %res } @@ -838,13 +1010,18 @@ declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_pmulh_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_pmulh_w: ; SSE: ## BB#0: -; SSE-NEXT: pmulhw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pmulhw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe5,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pmulh_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe5,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmulh_w: -; KNL: ## BB#0: -; KNL-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pmulh_w: +; SKX: ## BB#0: +; SKX-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe5,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -854,13 +1031,18 @@ declare <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16>, <8 x i16>) nounwind readnone define <8 x i16> @test_x86_sse2_pmulhu_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_pmulhu_w: ; SSE: ## BB#0: -; SSE-NEXT: pmulhuw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pmulhuw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe4,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmulhu_w: -; KNL: ## BB#0: -; KNL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_pmulhu_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe4,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_pmulhu_w: +; SKX: ## BB#0: +; SKX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe4,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -870,13 +1052,18 @@ declare <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16>, <8 x i16>) nounwind readnon define <2 x i64> @test_x86_sse2_pmulu_dq(<4 x i32> %a0, <4 x i32> %a1) { ; SSE-LABEL: test_x86_sse2_pmulu_dq: ; SSE: ## BB#0: -; SSE-NEXT: pmuludq %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pmuludq %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xf4,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pmulu_dq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf4,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pmulu_dq: -; KNL: ## BB#0: -; KNL-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pmulu_dq: +; SKX: ## BB#0: +; SKX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xf4,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -886,13 +1073,18 @@ declare <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32>, <4 x i32>) nounwind readnon define <2 x i64> @test_x86_sse2_psad_bw(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_psad_bw: ; SSE: ## BB#0: -; SSE-NEXT: psadbw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psadbw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xf6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psad_bw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psad_bw: -; KNL: ## BB#0: -; KNL-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psad_bw: +; SKX: ## BB#0: +; SKX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a0, <16 x i8> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -902,13 +1094,18 @@ declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse2_psll_d(<4 x i32> %a0, <4 x i32> %a1) { ; SSE-LABEL: test_x86_sse2_psll_d: ; SSE: ## BB#0: -; SSE-NEXT: pslld %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pslld %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xf2,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psll_d: -; KNL: ## BB#0: -; KNL-NEXT: vpslld %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_psll_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpslld %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf2,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_psll_d: +; SKX: ## BB#0: +; SKX-NEXT: vpslld %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf2,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -918,13 +1115,18 @@ declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone define <2 x i64> @test_x86_sse2_psll_q(<2 x i64> %a0, <2 x i64> %a1) { ; SSE-LABEL: test_x86_sse2_psll_q: ; SSE: ## BB#0: -; SSE-NEXT: psllq %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psllq %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xf3,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psll_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf3,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psll_q: -; KNL: ## BB#0: -; KNL-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psll_q: +; SKX: ## BB#0: +; SKX-NEXT: vpsllq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xf3,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -934,13 +1136,18 @@ declare <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i16> @test_x86_sse2_psll_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_psll_w: ; SSE: ## BB#0: -; SSE-NEXT: psllw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psllw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xf1,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psll_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf1,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psll_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsllw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psll_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsllw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xf1,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -950,13 +1157,18 @@ declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_pslli_d(<4 x i32> %a0) { ; SSE-LABEL: test_x86_sse2_pslli_d: ; SSE: ## BB#0: -; SSE-NEXT: pslld $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: pslld $7, %xmm0 ## encoding: [0x66,0x0f,0x72,0xf0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pslli_d: -; KNL: ## BB#0: -; KNL-NEXT: vpslld $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_pslli_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpslld $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xf0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_pslli_d: +; SKX: ## BB#0: +; SKX-NEXT: vpslld $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x72,0xf0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -966,13 +1178,18 @@ declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32) nounwind readnone define <2 x i64> @test_x86_sse2_pslli_q(<2 x i64> %a0) { ; SSE-LABEL: test_x86_sse2_pslli_q: ; SSE: ## BB#0: -; SSE-NEXT: psllq $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psllq $7, %xmm0 ## encoding: [0x66,0x0f,0x73,0xf0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pslli_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllq $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x73,0xf0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pslli_q: -; KNL: ## BB#0: -; KNL-NEXT: vpsllq $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pslli_q: +; SKX: ## BB#0: +; SKX-NEXT: vpsllq $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x73,0xf0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -982,13 +1199,18 @@ declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_pslli_w(<8 x i16> %a0) { ; SSE-LABEL: test_x86_sse2_pslli_w: ; SSE: ## BB#0: -; SSE-NEXT: psllw $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psllw $7, %xmm0 ## encoding: [0x66,0x0f,0x71,0xf0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_pslli_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsllw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xf0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pslli_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsllw $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_pslli_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsllw $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x71,0xf0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -998,13 +1220,18 @@ declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) nounwind readnone define <4 x i32> @test_x86_sse2_psra_d(<4 x i32> %a0, <4 x i32> %a1) { ; SSE-LABEL: test_x86_sse2_psra_d: ; SSE: ## BB#0: -; SSE-NEXT: psrad %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrad %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe2,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psra_d: -; KNL: ## BB#0: -; KNL-NEXT: vpsrad %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_psra_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrad %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe2,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_psra_d: +; SKX: ## BB#0: +; SKX-NEXT: vpsrad %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe2,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1014,13 +1241,18 @@ declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse2_psra_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_psra_w: ; SSE: ## BB#0: -; SSE-NEXT: psraw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psraw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe1,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psra_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsraw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe1,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psra_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsraw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psra_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsraw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe1,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1030,13 +1262,18 @@ declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_psrai_d(<4 x i32> %a0) { ; SSE-LABEL: test_x86_sse2_psrai_d: ; SSE: ## BB#0: -; SSE-NEXT: psrad $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrad $7, %xmm0 ## encoding: [0x66,0x0f,0x72,0xe0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psrai_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrad $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xe0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrai_d: -; KNL: ## BB#0: -; KNL-NEXT: vpsrad $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psrai_d: +; SKX: ## BB#0: +; SKX-NEXT: vpsrad $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x72,0xe0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1046,13 +1283,18 @@ declare <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_psrai_w(<8 x i16> %a0) { ; SSE-LABEL: test_x86_sse2_psrai_w: ; SSE: ## BB#0: -; SSE-NEXT: psraw $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psraw $7, %xmm0 ## encoding: [0x66,0x0f,0x71,0xe0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrai_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsraw $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_psrai_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsraw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xe0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_psrai_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsraw $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x71,0xe0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1062,13 +1304,18 @@ declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone define <4 x i32> @test_x86_sse2_psrl_d(<4 x i32> %a0, <4 x i32> %a1) { ; SSE-LABEL: test_x86_sse2_psrl_d: ; SSE: ## BB#0: -; SSE-NEXT: psrld %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrld %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd2,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psrl_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrld %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd2,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrl_d: -; KNL: ## BB#0: -; KNL-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psrl_d: +; SKX: ## BB#0: +; SKX-NEXT: vpsrld %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd2,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1078,13 +1325,18 @@ declare <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32>, <4 x i32>) nounwind readnone define <2 x i64> @test_x86_sse2_psrl_q(<2 x i64> %a0, <2 x i64> %a1) { ; SSE-LABEL: test_x86_sse2_psrl_q: ; SSE: ## BB#0: -; SSE-NEXT: psrlq %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrlq %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd3,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psrl_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd3,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrl_q: -; KNL: ## BB#0: -; KNL-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psrl_q: +; SKX: ## BB#0: +; SKX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0xd3,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1094,13 +1346,18 @@ declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone define <8 x i16> @test_x86_sse2_psrl_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_psrl_w: ; SSE: ## BB#0: -; SSE-NEXT: psrlw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrlw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd1,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrl_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_psrl_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd1,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_psrl_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd1,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1110,13 +1367,18 @@ declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone define <4 x i32> @test_x86_sse2_psrli_d(<4 x i32> %a0) { ; SSE-LABEL: test_x86_sse2_psrli_d: ; SSE: ## BB#0: -; SSE-NEXT: psrld $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrld $7, %xmm0 ## encoding: [0x66,0x0f,0x72,0xd0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psrli_d: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrld $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xd0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrli_d: -; KNL: ## BB#0: -; KNL-NEXT: vpsrld $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psrli_d: +; SKX: ## BB#0: +; SKX-NEXT: vpsrld $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x72,0xd0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -1126,13 +1388,18 @@ declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32) nounwind readnone define <2 x i64> @test_x86_sse2_psrli_q(<2 x i64> %a0) { ; SSE-LABEL: test_x86_sse2_psrli_q: ; SSE: ## BB#0: -; SSE-NEXT: psrlq $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrlq $7, %xmm0 ## encoding: [0x66,0x0f,0x73,0xd0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psrli_q: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlq $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x73,0xd0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrli_q: -; KNL: ## BB#0: -; KNL-NEXT: vpsrlq $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psrli_q: +; SKX: ## BB#0: +; SKX-NEXT: vpsrlq $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x73,0xd0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -1142,13 +1409,18 @@ declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32) nounwind readnone define <8 x i16> @test_x86_sse2_psrli_w(<8 x i16> %a0) { ; SSE-LABEL: test_x86_sse2_psrli_w: ; SSE: ## BB#0: -; SSE-NEXT: psrlw $7, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psrlw $7, %xmm0 ## encoding: [0x66,0x0f,0x71,0xd0,0x07] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psrli_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsrlw $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_psrli_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsrlw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xd0,0x07] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_psrli_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsrlw $7, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0x71,0xd0,0x07] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1158,13 +1430,18 @@ declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) nounwind readnone define <16 x i8> @test_x86_sse2_psubs_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_psubs_b: ; SSE: ## BB#0: -; SSE-NEXT: psubsb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psubsb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe8,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psubs_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe8,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psubs_b: -; KNL: ## BB#0: -; KNL-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psubs_b: +; SKX: ## BB#0: +; SKX-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe8,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1174,13 +1451,18 @@ declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone define <8 x i16> @test_x86_sse2_psubs_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_psubs_w: ; SSE: ## BB#0: -; SSE-NEXT: psubsw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psubsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xe9,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psubs_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe9,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psubs_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psubs_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xe9,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1190,13 +1472,18 @@ declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse2_psubus_b(<16 x i8> %a0, <16 x i8> %a1) { ; SSE-LABEL: test_x86_sse2_psubus_b: ; SSE: ## BB#0: -; SSE-NEXT: psubusb %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psubusb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd8,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psubus_b: -; KNL: ## BB#0: -; KNL-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse2_psubus_b: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd8,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_psubus_b: +; SKX: ## BB#0: +; SKX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd8,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1206,13 +1493,18 @@ declare <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8>, <16 x i8>) nounwind readnon define <8 x i16> @test_x86_sse2_psubus_w(<8 x i16> %a0, <8 x i16> %a1) { ; SSE-LABEL: test_x86_sse2_psubus_w: ; SSE: ## BB#0: -; SSE-NEXT: psubusw %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: psubusw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd9,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_psubus_w: +; AVX2: ## BB#0: +; AVX2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd9,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_psubus_w: -; KNL: ## BB#0: -; KNL-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse2_psubus_w: +; SKX: ## BB#0: +; SKX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7d,0x08,0xd9,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -1222,13 +1514,13 @@ declare <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16>, <8 x i16>) nounwind readnon define <2 x double> @test_x86_sse2_sqrt_pd(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_sqrt_pd: ; SSE: ## BB#0: -; SSE-NEXT: sqrtpd %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: sqrtpd %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x51,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_sqrt_pd: -; KNL: ## BB#0: -; KNL-NEXT: vsqrtpd %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_sqrt_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vsqrtpd %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x51,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1238,13 +1530,13 @@ declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_sqrt_sd(<2 x double> %a0) { ; SSE-LABEL: test_x86_sse2_sqrt_sd: ; SSE: ## BB#0: -; SSE-NEXT: sqrtsd %xmm0, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: sqrtsd %xmm0, %xmm0 ## encoding: [0xf2,0x0f,0x51,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_sqrt_sd: -; KNL: ## BB#0: -; KNL-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_sqrt_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x51,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a0) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1254,13 +1546,13 @@ declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone define <2 x double> @test_x86_sse2_sub_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_sub_sd: ; SSE: ## BB#0: -; SSE-NEXT: subsd %xmm1, %xmm0 -; SSE-NEXT: retl +; SSE-NEXT: subsd %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x5c,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_sub_sd: -; KNL: ## BB#0: -; KNL-NEXT: vsubsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_sub_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vsubsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5c,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -1270,21 +1562,30 @@ declare <2 x double> @llvm.x86.sse2.sub.sd(<2 x double>, <2 x double>) nounwind define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomieq_sd: ; SSE: ## BB#0: -; SSE-NEXT: ucomisd %xmm1, %xmm0 -; SSE-NEXT: setnp %al -; SSE-NEXT: sete %cl -; SSE-NEXT: andb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_ucomieq_sd: -; KNL: ## BB#0: -; KNL-NEXT: vucomisd %xmm1, %xmm0 -; KNL-NEXT: setnp %al -; KNL-NEXT: sete %cl -; KNL-NEXT: andb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: ucomisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2e,0xc1] +; SSE-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SSE-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SSE-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_ucomieq_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX2-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; AVX2-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; AVX2-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_ucomieq_sd: +; SKX: ## BB#0: +; SKX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; SKX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] +; SKX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] +; SKX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1294,17 +1595,24 @@ declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomige_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomisd %xmm1, %xmm0 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_ucomige_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomisd %xmm1, %xmm0 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2e,0xc1] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_ucomige_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_ucomige_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1314,17 +1622,24 @@ declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomigt_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomisd %xmm1, %xmm0 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_ucomigt_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomisd %xmm1, %xmm0 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2e,0xc1] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_ucomigt_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_ucomigt_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1334,17 +1649,24 @@ declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomile_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomisd %xmm0, %xmm1 -; SSE-NEXT: setae %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_ucomile_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomisd %xmm0, %xmm1 -; KNL-NEXT: setae %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomisd %xmm0, %xmm1 ## encoding: [0x66,0x0f,0x2e,0xc8] +; SSE-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_ucomile_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2e,0xc8] +; AVX2-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_ucomile_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc8] +; SKX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1354,17 +1676,24 @@ declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomilt_sd: ; SSE: ## BB#0: -; SSE-NEXT: xorl %eax, %eax -; SSE-NEXT: ucomisd %xmm0, %xmm1 -; SSE-NEXT: seta %al -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_ucomilt_sd: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vucomisd %xmm0, %xmm1 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE-NEXT: ucomisd %xmm0, %xmm1 ## encoding: [0x66,0x0f,0x2e,0xc8] +; SSE-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_ucomilt_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; AVX2-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2e,0xc8] +; AVX2-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_ucomilt_sd: +; SKX: ## BB#0: +; SKX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SKX-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc8] +; SKX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1374,21 +1703,30 @@ declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>) nounwind readn define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomineq_sd: ; SSE: ## BB#0: -; SSE-NEXT: ucomisd %xmm1, %xmm0 -; SSE-NEXT: setp %al -; SSE-NEXT: setne %cl -; SSE-NEXT: orb %al, %cl -; SSE-NEXT: movzbl %cl, %eax -; SSE-NEXT: retl -; -; KNL-LABEL: test_x86_sse2_ucomineq_sd: -; KNL: ## BB#0: -; KNL-NEXT: vucomisd %xmm1, %xmm0 -; KNL-NEXT: setp %al -; KNL-NEXT: setne %cl -; KNL-NEXT: orb %al, %cl -; KNL-NEXT: movzbl %cl, %eax -; KNL-NEXT: retl +; SSE-NEXT: ucomisd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x2e,0xc1] +; SSE-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SSE-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SSE-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SSE-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_ucomineq_sd: +; AVX2: ## BB#0: +; AVX2-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] +; AVX2-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; AVX2-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; AVX2-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; AVX2-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_ucomineq_sd: +; SKX: ## BB#0: +; SKX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0x62,0xf1,0xfd,0x08,0x2e,0xc1] +; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] +; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] +; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] +; SKX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] ret i32 %res } @@ -1397,13 +1735,13 @@ declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>) nounwind read define void @test_x86_sse2_pause() { ; SSE-LABEL: test_x86_sse2_pause: ; SSE: ## BB#0: -; SSE-NEXT: pause -; SSE-NEXT: retl +; SSE-NEXT: pause ## encoding: [0xf3,0x90] +; SSE-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse2_pause: -; KNL: ## BB#0: -; KNL-NEXT: pause -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse2_pause: +; VCHECK: ## BB#0: +; VCHECK-NEXT: pause ## encoding: [0xf3,0x90] +; VCHECK-NEXT: retl ## encoding: [0xc3] tail call void @llvm.x86.sse2.pause() ret void } diff --git a/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll index dbd14b805fb5..362525f24d2a 100644 --- a/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll @@ -1,7 +1,18 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) { - ; CHECK: addsubpd +; SSE-LABEL: test_x86_sse3_addsub_pd: +; SSE: ## BB#0: +; SSE-NEXT: addsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0xd0,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_addsub_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vaddsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd0,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -9,7 +20,15 @@ declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwi define <4 x float> @test_x86_sse3_addsub_ps(<4 x float> %a0, <4 x float> %a1) { - ; CHECK: addsubps +; SSE-LABEL: test_x86_sse3_addsub_ps: +; SSE: ## BB#0: +; SSE-NEXT: addsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0xd0,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_addsub_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vaddsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xd0,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -17,7 +36,15 @@ declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind define <2 x double> @test_x86_sse3_hadd_pd(<2 x double> %a0, <2 x double> %a1) { - ; CHECK: haddpd +; SSE-LABEL: test_x86_sse3_hadd_pd: +; SSE: ## BB#0: +; SSE-NEXT: haddpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7c,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_hadd_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vhaddpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7c,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -25,7 +52,15 @@ declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind define <4 x float> @test_x86_sse3_hadd_ps(<4 x float> %a0, <4 x float> %a1) { - ; CHECK: haddps +; SSE-LABEL: test_x86_sse3_hadd_ps: +; SSE: ## BB#0: +; SSE-NEXT: haddps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7c,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_hadd_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vhaddps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7c,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -33,7 +68,15 @@ declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind re define <2 x double> @test_x86_sse3_hsub_pd(<2 x double> %a0, <2 x double> %a1) { - ; CHECK: hsubpd +; SSE-LABEL: test_x86_sse3_hsub_pd: +; SSE: ## BB#0: +; SSE-NEXT: hsubpd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x7d,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_hsub_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vhsubpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x7d,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -41,7 +84,15 @@ declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind define <4 x float> @test_x86_sse3_hsub_ps(<4 x float> %a0, <4 x float> %a1) { - ; CHECK: hsubps +; SSE-LABEL: test_x86_sse3_hsub_ps: +; SSE: ## BB#0: +; SSE-NEXT: hsubps %xmm1, %xmm0 ## encoding: [0xf2,0x0f,0x7d,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_hsub_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vhsubps %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x7d,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -49,8 +100,17 @@ declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind re define <16 x i8> @test_x86_sse3_ldu_dq(i8* %a0) { - ; CHECK: movl - ; CHECK: lddqu +; SSE-LABEL: test_x86_sse3_ldu_dq: +; SSE: ## BB#0: +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: lddqu (%eax), %xmm0 ## encoding: [0xf2,0x0f,0xf0,0x00] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse3_ldu_dq: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vlddqu (%eax), %xmm0 ## encoding: [0xc5,0xfb,0xf0,0x00] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } diff --git a/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll index 58eae1057f89..b77f472faf34 100644 --- a/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll @@ -1,20 +1,21 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE41 -; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=SSE41 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { ; SSE41-LABEL: test_x86_sse41_blendvpd: ; SSE41: ## BB#0: -; SSE41-NEXT: movapd %xmm0, %xmm3 -; SSE41-NEXT: movaps %xmm2, %xmm0 -; SSE41-NEXT: blendvpd %xmm1, %xmm3 -; SSE41-NEXT: movapd %xmm3, %xmm0 -; SSE41-NEXT: retl -; -; KNL-LABEL: test_x86_sse41_blendvpd: -; KNL: ## BB#0: -; KNL-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SSE41-NEXT: movapd %xmm0, %xmm3 ## encoding: [0x66,0x0f,0x28,0xd8] +; SSE41-NEXT: movaps %xmm2, %xmm0 ## encoding: [0x0f,0x28,0xc2] +; SSE41-NEXT: blendvpd %xmm1, %xmm3 ## encoding: [0x66,0x0f,0x38,0x15,0xd9] +; SSE41-NEXT: movapd %xmm3, %xmm0 ## encoding: [0x66,0x0f,0x28,0xc3] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse41_blendvpd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4b,0xc1,0x20] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -24,16 +25,16 @@ declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x d define <4 x float> @test_x86_sse41_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { ; SSE41-LABEL: test_x86_sse41_blendvps: ; SSE41: ## BB#0: -; SSE41-NEXT: movaps %xmm0, %xmm3 -; SSE41-NEXT: movaps %xmm2, %xmm0 -; SSE41-NEXT: blendvps %xmm1, %xmm3 -; SSE41-NEXT: movaps %xmm3, %xmm0 -; SSE41-NEXT: retl -; -; KNL-LABEL: test_x86_sse41_blendvps: -; KNL: ## BB#0: -; KNL-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SSE41-NEXT: movaps %xmm0, %xmm3 ## encoding: [0x0f,0x28,0xd8] +; SSE41-NEXT: movaps %xmm2, %xmm0 ## encoding: [0x0f,0x28,0xc2] +; SSE41-NEXT: blendvps %xmm1, %xmm3 ## encoding: [0x66,0x0f,0x38,0x14,0xd9] +; SSE41-NEXT: movaps %xmm3, %xmm0 ## encoding: [0x0f,0x28,0xc3] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse41_blendvps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4a,0xc1,0x20] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -43,13 +44,13 @@ declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x floa define <2 x double> @test_x86_sse41_dppd(<2 x double> %a0, <2 x double> %a1) { ; SSE41-LABEL: test_x86_sse41_dppd: ; SSE41: ## BB#0: -; SSE41-NEXT: dppd $7, %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: dppd $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x41,0xc1,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_dppd: -; KNL: ## BB#0: -; KNL-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_dppd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vdppd $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x41,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -59,13 +60,13 @@ declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwi define <4 x float> @test_x86_sse41_dpps(<4 x float> %a0, <4 x float> %a1) { ; SSE41-LABEL: test_x86_sse41_dpps: ; SSE41: ## BB#0: -; SSE41-NEXT: dpps $7, %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: dpps $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x40,0xc1,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_dpps: -; KNL: ## BB#0: -; KNL-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_dpps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x40,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -75,13 +76,21 @@ declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind define <4 x float> @test_x86_sse41_insertps(<4 x float> %a0, <4 x float> %a1) { ; SSE41-LABEL: test_x86_sse41_insertps: ; SSE41: ## BB#0: -; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] -; SSE41-NEXT: retl +; SSE41-NEXT: insertps $17, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x21,0xc1,0x11] +; SSE41-NEXT: ## xmm0 = zero,xmm1[0],xmm0[2,3] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse41_insertps: +; AVX2: ## BB#0: +; AVX2-NEXT: vinsertps $17, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x21,0xc1,0x11] +; AVX2-NEXT: ## xmm0 = zero,xmm1[0],xmm0[2,3] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_insertps: -; KNL: ## BB#0: -; KNL-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm1[0],xmm0[2,3] -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse41_insertps: +; SKX: ## BB#0: +; SKX-NEXT: vinsertps $17, %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf3,0x7d,0x08,0x21,0xc1,0x11] +; SKX-NEXT: ## xmm0 = zero,xmm1[0],xmm0[2,3] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 17) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -92,13 +101,13 @@ declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounw define <8 x i16> @test_x86_sse41_mpsadbw(<16 x i8> %a0, <16 x i8> %a1) { ; SSE41-LABEL: test_x86_sse41_mpsadbw: ; SSE41: ## BB#0: -; SSE41-NEXT: mpsadbw $7, %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: mpsadbw $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x42,0xc1,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_mpsadbw: -; KNL: ## BB#0: -; KNL-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_mpsadbw: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vmpsadbw $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x42,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -108,13 +117,18 @@ declare <8 x i16> @llvm.x86.sse41.mpsadbw(<16 x i8>, <16 x i8>, i8) nounwind rea define <8 x i16> @test_x86_sse41_packusdw(<4 x i32> %a0, <4 x i32> %a1) { ; SSE41-LABEL: test_x86_sse41_packusdw: ; SSE41: ## BB#0: -; SSE41-NEXT: packusdw %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: packusdw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x2b,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_packusdw: -; KNL: ## BB#0: -; KNL-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse41_packusdw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x2b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse41_packusdw: +; SKX: ## BB#0: +; SKX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x2b,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -124,16 +138,16 @@ declare <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32>, <4 x i32>) nounwind readno define <16 x i8> @test_x86_sse41_pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) { ; SSE41-LABEL: test_x86_sse41_pblendvb: ; SSE41: ## BB#0: -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: movaps %xmm2, %xmm0 -; SSE41-NEXT: pblendvb %xmm1, %xmm3 -; SSE41-NEXT: movdqa %xmm3, %xmm0 -; SSE41-NEXT: retl -; -; KNL-LABEL: test_x86_sse41_pblendvb: -; KNL: ## BB#0: -; KNL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SSE41-NEXT: movdqa %xmm0, %xmm3 ## encoding: [0x66,0x0f,0x6f,0xd8] +; SSE41-NEXT: movaps %xmm2, %xmm0 ## encoding: [0x0f,0x28,0xc2] +; SSE41-NEXT: pblendvb %xmm1, %xmm3 ## encoding: [0x66,0x0f,0x38,0x10,0xd9] +; SSE41-NEXT: movdqa %xmm3, %xmm0 ## encoding: [0x66,0x0f,0x6f,0xc3] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse41_pblendvb: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4c,0xc1,0x20] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -143,13 +157,13 @@ declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>) noun define <8 x i16> @test_x86_sse41_phminposuw(<8 x i16> %a0) { ; SSE41-LABEL: test_x86_sse41_phminposuw: ; SSE41: ## BB#0: -; SSE41-NEXT: phminposuw %xmm0, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: phminposuw %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x41,0xc0] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_phminposuw: -; KNL: ## BB#0: -; KNL-NEXT: vphminposuw %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_phminposuw: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphminposuw %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x41,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -159,13 +173,18 @@ declare <8 x i16> @llvm.x86.sse41.phminposuw(<8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse41_pmaxsb(<16 x i8> %a0, <16 x i8> %a1) { ; SSE41-LABEL: test_x86_sse41_pmaxsb: ; SSE41: ## BB#0: -; SSE41-NEXT: pmaxsb %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pmaxsb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3c,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pmaxsb: -; KNL: ## BB#0: -; KNL-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse41_pmaxsb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3c,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse41_pmaxsb: +; SKX: ## BB#0: +; SKX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3c,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -175,13 +194,18 @@ declare <16 x i8> @llvm.x86.sse41.pmaxsb(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse41_pmaxsd(<4 x i32> %a0, <4 x i32> %a1) { ; SSE41-LABEL: test_x86_sse41_pmaxsd: ; SSE41: ## BB#0: -; SSE41-NEXT: pmaxsd %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pmaxsd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3d,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse41_pmaxsd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3d,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pmaxsd: -; KNL: ## BB#0: -; KNL-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse41_pmaxsd: +; SKX: ## BB#0: +; SKX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3d,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -191,13 +215,18 @@ declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pmaxud(<4 x i32> %a0, <4 x i32> %a1) { ; SSE41-LABEL: test_x86_sse41_pmaxud: ; SSE41: ## BB#0: -; SSE41-NEXT: pmaxud %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pmaxud %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3f,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pmaxud: -; KNL: ## BB#0: -; KNL-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse41_pmaxud: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3f,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse41_pmaxud: +; SKX: ## BB#0: +; SKX-NEXT: vpmaxud %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3f,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -207,13 +236,18 @@ declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse41_pmaxuw(<8 x i16> %a0, <8 x i16> %a1) { ; SSE41-LABEL: test_x86_sse41_pmaxuw: ; SSE41: ## BB#0: -; SSE41-NEXT: pmaxuw %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pmaxuw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3e,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse41_pmaxuw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3e,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pmaxuw: -; KNL: ## BB#0: -; KNL-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse41_pmaxuw: +; SKX: ## BB#0: +; SKX-NEXT: vpmaxuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3e,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -223,13 +257,18 @@ declare <8 x i16> @llvm.x86.sse41.pmaxuw(<8 x i16>, <8 x i16>) nounwind readnone define <16 x i8> @test_x86_sse41_pminsb(<16 x i8> %a0, <16 x i8> %a1) { ; SSE41-LABEL: test_x86_sse41_pminsb: ; SSE41: ## BB#0: -; SSE41-NEXT: pminsb %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pminsb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x38,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pminsb: -; KNL: ## BB#0: -; KNL-NEXT: vpminsb %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse41_pminsb: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x38,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse41_pminsb: +; SKX: ## BB#0: +; SKX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x38,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -239,13 +278,18 @@ declare <16 x i8> @llvm.x86.sse41.pminsb(<16 x i8>, <16 x i8>) nounwind readnone define <4 x i32> @test_x86_sse41_pminsd(<4 x i32> %a0, <4 x i32> %a1) { ; SSE41-LABEL: test_x86_sse41_pminsd: ; SSE41: ## BB#0: -; SSE41-NEXT: pminsd %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pminsd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x39,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse41_pminsd: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x39,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pminsd: -; KNL: ## BB#0: -; KNL-NEXT: vpminsd %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse41_pminsd: +; SKX: ## BB#0: +; SKX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x39,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -255,13 +299,18 @@ declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone define <4 x i32> @test_x86_sse41_pminud(<4 x i32> %a0, <4 x i32> %a1) { ; SSE41-LABEL: test_x86_sse41_pminud: ; SSE41: ## BB#0: -; SSE41-NEXT: pminud %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pminud %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3b,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pminud: -; KNL: ## BB#0: -; KNL-NEXT: vpminud %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse41_pminud: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminud %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse41_pminud: +; SKX: ## BB#0: +; SKX-NEXT: vpminud %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3b,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -271,13 +320,18 @@ declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone define <8 x i16> @test_x86_sse41_pminuw(<8 x i16> %a0, <8 x i16> %a1) { ; SSE41-LABEL: test_x86_sse41_pminuw: ; SSE41: ## BB#0: -; SSE41-NEXT: pminuw %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pminuw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x3a,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse41_pminuw: +; AVX2: ## BB#0: +; AVX2-NEXT: vpminuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x3a,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pminuw: -; KNL: ## BB#0: -; KNL-NEXT: vpminuw %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; SKX-LABEL: test_x86_sse41_pminuw: +; SKX: ## BB#0: +; SKX-NEXT: vpminuw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x3a,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -287,13 +341,18 @@ declare <8 x i16> @llvm.x86.sse41.pminuw(<8 x i16>, <8 x i16>) nounwind readnone define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) { ; SSE41-LABEL: test_x86_sse41_pmuldq: ; SSE41: ## BB#0: -; SSE41-NEXT: pmuldq %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: pmuldq %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x28,0xc1] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_pmuldq: -; KNL: ## BB#0: -; KNL-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; AVX2-LABEL: test_x86_sse41_pmuldq: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x28,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse41_pmuldq: +; SKX: ## BB#0: +; SKX-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0xfd,0x08,0x28,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] ret <2 x i64> %res } @@ -303,17 +362,17 @@ declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) { ; SSE41-LABEL: test_x86_sse41_ptestc: ; SSE41: ## BB#0: -; SSE41-NEXT: ptest %xmm1, %xmm0 -; SSE41-NEXT: sbbl %eax, %eax -; SSE41-NEXT: andl $1, %eax -; SSE41-NEXT: retl -; -; KNL-LABEL: test_x86_sse41_ptestc: -; KNL: ## BB#0: -; KNL-NEXT: vptest %xmm1, %xmm0 -; KNL-NEXT: sbbl %eax, %eax -; KNL-NEXT: andl $1, %eax -; KNL-NEXT: retl +; SSE41-NEXT: ptest %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x17,0xc1] +; SSE41-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; SSE41-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse41_ptestc: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1] +; VCHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; VCHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -323,17 +382,17 @@ declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) { ; SSE41-LABEL: test_x86_sse41_ptestnzc: ; SSE41: ## BB#0: -; SSE41-NEXT: xorl %eax, %eax -; SSE41-NEXT: ptest %xmm1, %xmm0 -; SSE41-NEXT: seta %al -; SSE41-NEXT: retl -; -; KNL-LABEL: test_x86_sse41_ptestnzc: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vptest %xmm1, %xmm0 -; KNL-NEXT: seta %al -; KNL-NEXT: retl +; SSE41-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE41-NEXT: ptest %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x17,0xc1] +; SSE41-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse41_ptestnzc: +; VCHECK: ## BB#0: +; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; VCHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1] +; VCHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -343,17 +402,17 @@ declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) { ; SSE41-LABEL: test_x86_sse41_ptestz: ; SSE41: ## BB#0: -; SSE41-NEXT: xorl %eax, %eax -; SSE41-NEXT: ptest %xmm1, %xmm0 -; SSE41-NEXT: sete %al -; SSE41-NEXT: retl -; -; KNL-LABEL: test_x86_sse41_ptestz: -; KNL: ## BB#0: -; KNL-NEXT: xorl %eax, %eax -; KNL-NEXT: vptest %xmm1, %xmm0 -; KNL-NEXT: sete %al -; KNL-NEXT: retl +; SSE41-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE41-NEXT: ptest %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x17,0xc1] +; SSE41-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; SSE41-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse41_ptestz: +; VCHECK: ## BB#0: +; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; VCHECK-NEXT: vptest %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x17,0xc1] +; VCHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; [#uses=1] ret i32 %res } @@ -363,13 +422,13 @@ declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) { ; SSE41-LABEL: test_x86_sse41_round_pd: ; SSE41: ## BB#0: -; SSE41-NEXT: roundpd $7, %xmm0, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: roundpd $7, %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x09,0xc0,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_round_pd: -; KNL: ## BB#0: -; KNL-NEXT: vroundpd $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_round_pd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vroundpd $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x09,0xc0,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -379,13 +438,13 @@ declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readno define <4 x float> @test_x86_sse41_round_ps(<4 x float> %a0) { ; SSE41-LABEL: test_x86_sse41_round_ps: ; SSE41: ## BB#0: -; SSE41-NEXT: roundps $7, %xmm0, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: roundps $7, %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_round_ps: -; KNL: ## BB#0: -; KNL-NEXT: vroundps $7, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_round_ps: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vroundps $7, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x08,0xc0,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } @@ -395,13 +454,13 @@ declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone define <2 x double> @test_x86_sse41_round_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE41-LABEL: test_x86_sse41_round_sd: ; SSE41: ## BB#0: -; SSE41-NEXT: roundsd $7, %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: roundsd $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x0b,0xc1,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_round_sd: -; KNL: ## BB#0: -; KNL-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_round_sd: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0b,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7) ; <<2 x double>> [#uses=1] ret <2 x double> %res } @@ -411,13 +470,13 @@ declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) n define <4 x float> @test_x86_sse41_round_ss(<4 x float> %a0, <4 x float> %a1) { ; SSE41-LABEL: test_x86_sse41_round_ss: ; SSE41: ## BB#0: -; SSE41-NEXT: roundss $7, %xmm1, %xmm0 -; SSE41-NEXT: retl +; SSE41-NEXT: roundss $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x0a,0xc1,0x07] +; SSE41-NEXT: retl ## encoding: [0xc3] ; -; KNL-LABEL: test_x86_sse41_round_ss: -; KNL: ## BB#0: -; KNL-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 -; KNL-NEXT: retl +; VCHECK-LABEL: test_x86_sse41_round_ss: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vroundss $7, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0a,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7) ; <<4 x float>> [#uses=1] ret <4 x float> %res } diff --git a/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll index 2b31109ce45c..9475b7b5e95f 100644 --- a/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll @@ -1,14 +1,24 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.2 | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse4.2 -show-mc-encoding | FileCheck %s --check-prefix=SSE42 +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX define i32 @test_x86_sse42_pcmpestri128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestri128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestri128: +; SSE42: ## BB#0: +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07] +; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestri128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; VCHECK-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -16,16 +26,38 @@ declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nou define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestri128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: movdqa (%eax), %xmm0 -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: pcmpestri $7, (%ecx), %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestri128_load: +; SSE42: ## BB#0: +; SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE42-NEXT: movdqa (%eax), %xmm0 ## encoding: [0x66,0x0f,0x6f,0x00] +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: pcmpestri $7, (%ecx), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0x01,0x07] +; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse42_pcmpestri128_load: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vmovdqa (%eax), %xmm0 ## encoding: [0xc5,0xf9,0x6f,0x00] +; AVX2-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; AVX2-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; AVX2-NEXT: vpcmpestri $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0x01,0x07] +; AVX2-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse42_pcmpestri128_load: +; SKX: ## BB#0: +; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08] +; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SKX-NEXT: vmovdqu8 (%eax), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x00] +; SKX-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SKX-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SKX-NEXT: vpcmpestri $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0x01,0x07] +; SKX-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; SKX-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a0 %2 = load <16 x i8>, <16 x i8>* %a2 %res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; [#uses=1] @@ -34,17 +66,29 @@ define i32 @test_x86_sse42_pcmpestri128_load(<16 x i8>* %a0, <16 x i8>* %a2) { define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; CHECK-LABEL: test_x86_sse42_pcmpestria128: -; CHECK: ## BB#0: -; CHECK-NEXT: pushl %ebx -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: xorl %ebx, %ebx -; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: seta %bl -; CHECK-NEXT: movl %ebx, %eax -; CHECK-NEXT: popl %ebx -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestria128: +; SSE42: ## BB#0: +; SSE42-NEXT: pushl %ebx ## encoding: [0x53] +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07] +; SSE42-NEXT: seta %bl ## encoding: [0x0f,0x97,0xc3] +; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; SSE42-NEXT: popl %ebx ## encoding: [0x5b] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestria128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: pushl %ebx ## encoding: [0x53] +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; VCHECK-NEXT: seta %bl ## encoding: [0x0f,0x97,0xc3] +; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; VCHECK-NEXT: popl %ebx ## encoding: [0x5b] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -52,14 +96,23 @@ declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestric128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestric128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestric128: +; SSE42: ## BB#0: +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07] +; SSE42-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; SSE42-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestric128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; VCHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; VCHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -67,17 +120,29 @@ declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; CHECK-LABEL: test_x86_sse42_pcmpestrio128: -; CHECK: ## BB#0: -; CHECK-NEXT: pushl %ebx -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: xorl %ebx, %ebx -; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: seto %bl -; CHECK-NEXT: movl %ebx, %eax -; CHECK-NEXT: popl %ebx -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestrio128: +; SSE42: ## BB#0: +; SSE42-NEXT: pushl %ebx ## encoding: [0x53] +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07] +; SSE42-NEXT: seto %bl ## encoding: [0x0f,0x90,0xc3] +; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; SSE42-NEXT: popl %ebx ## encoding: [0x5b] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestrio128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: pushl %ebx ## encoding: [0x53] +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; VCHECK-NEXT: seto %bl ## encoding: [0x0f,0x90,0xc3] +; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; VCHECK-NEXT: popl %ebx ## encoding: [0x5b] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -85,17 +150,29 @@ declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; CHECK-LABEL: test_x86_sse42_pcmpestris128: -; CHECK: ## BB#0: -; CHECK-NEXT: pushl %ebx -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: xorl %ebx, %ebx -; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: sets %bl -; CHECK-NEXT: movl %ebx, %eax -; CHECK-NEXT: popl %ebx -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestris128: +; SSE42: ## BB#0: +; SSE42-NEXT: pushl %ebx ## encoding: [0x53] +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07] +; SSE42-NEXT: sets %bl ## encoding: [0x0f,0x98,0xc3] +; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; SSE42-NEXT: popl %ebx ## encoding: [0x5b] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestris128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: pushl %ebx ## encoding: [0x53] +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; VCHECK-NEXT: sets %bl ## encoding: [0x0f,0x98,0xc3] +; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; VCHECK-NEXT: popl %ebx ## encoding: [0x5b] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -103,17 +180,29 @@ declare i32 @llvm.x86.sse42.pcmpestris128(<16 x i8>, i32, <16 x i8>, i32, i8) no define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) nounwind { -; CHECK-LABEL: test_x86_sse42_pcmpestriz128: -; CHECK: ## BB#0: -; CHECK-NEXT: pushl %ebx -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: xorl %ebx, %ebx -; CHECK-NEXT: pcmpestri $7, %xmm1, %xmm0 -; CHECK-NEXT: sete %bl -; CHECK-NEXT: movl %ebx, %eax -; CHECK-NEXT: popl %ebx -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestriz128: +; SSE42: ## BB#0: +; SSE42-NEXT: pushl %ebx ## encoding: [0x53] +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; SSE42-NEXT: pcmpestri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x61,0xc1,0x07] +; SSE42-NEXT: sete %bl ## encoding: [0x0f,0x94,0xc3] +; SSE42-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; SSE42-NEXT: popl %ebx ## encoding: [0x5b] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestriz128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: pushl %ebx ## encoding: [0x53] +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: xorl %ebx, %ebx ## encoding: [0x31,0xdb] +; VCHECK-NEXT: vpcmpestri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x61,0xc1,0x07] +; VCHECK-NEXT: sete %bl ## encoding: [0x0f,0x94,0xc3] +; VCHECK-NEXT: movl %ebx, %eax ## encoding: [0x89,0xd8] +; VCHECK-NEXT: popl %ebx ## encoding: [0x5b] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; [#uses=1] ret i32 %res } @@ -121,12 +210,19 @@ declare i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8>, i32, <16 x i8>, i32, i8) no define <16 x i8> @test_x86_sse42_pcmpestrm128(<16 x i8> %a0, <16 x i8> %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestrm128: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: pcmpestrm $7, %xmm1, %xmm0 -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestrm128: +; SSE42: ## BB#0: +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: pcmpestrm $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x60,0xc1,0x07] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestrm128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: vpcmpestrm $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x60,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -134,13 +230,21 @@ declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2) { -; CHECK-LABEL: test_x86_sse42_pcmpestrm128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movl $7, %eax -; CHECK-NEXT: movl $7, %edx -; CHECK-NEXT: pcmpestrm $7, (%ecx), %xmm0 -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpestrm128_load: +; SSE42: ## BB#0: +; SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; SSE42-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; SSE42-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; SSE42-NEXT: pcmpestrm $7, (%ecx), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x60,0x01,0x07] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpestrm128_load: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; VCHECK-NEXT: movl $7, %eax ## encoding: [0xb8,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: movl $7, %edx ## encoding: [0xba,0x07,0x00,0x00,0x00] +; VCHECK-NEXT: vpcmpestrm $7, (%ecx), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x60,0x01,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a2 %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %1, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res @@ -148,11 +252,17 @@ define <16 x i8> @test_x86_sse42_pcmpestrm128_load(<16 x i8> %a0, <16 x i8>* %a2 define i32 @test_x86_sse42_pcmpistri128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistri128: -; CHECK: ## BB#0: -; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistri128: +; SSE42: ## BB#0: +; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07] +; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistri128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; VCHECK-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -160,14 +270,32 @@ declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8>, <16 x i8>, i8) nounwind read define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistri128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx -; CHECK-NEXT: movdqa (%ecx), %xmm0 -; CHECK-NEXT: pcmpistri $7, (%eax), %xmm0 -; CHECK-NEXT: movl %ecx, %eax -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistri128_load: +; SSE42: ## BB#0: +; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; SSE42-NEXT: movdqa (%ecx), %xmm0 ## encoding: [0x66,0x0f,0x6f,0x01] +; SSE42-NEXT: pcmpistri $7, (%eax), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0x00,0x07] +; SSE42-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse42_pcmpistri128_load: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; AVX2-NEXT: vmovdqa (%ecx), %xmm0 ## encoding: [0xc5,0xf9,0x6f,0x01] +; AVX2-NEXT: vpcmpistri $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0x00,0x07] +; AVX2-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse42_pcmpistri128_load: +; SKX: ## BB#0: +; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08] +; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04] +; SKX-NEXT: vmovdqu8 (%ecx), %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x6f,0x01] +; SKX-NEXT: vpcmpistri $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0x00,0x07] +; SKX-NEXT: movl %ecx, %eax ## encoding: [0x89,0xc8] +; SKX-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a0 %2 = load <16 x i8>, <16 x i8>* %a1 %res = call i32 @llvm.x86.sse42.pcmpistri128(<16 x i8> %1, <16 x i8> %2, i8 7) ; [#uses=1] @@ -176,12 +304,19 @@ define i32 @test_x86_sse42_pcmpistri128_load(<16 x i8>* %a0, <16 x i8>* %a1) { define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistria128: -; CHECK: ## BB#0: -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: seta %al -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistria128: +; SSE42: ## BB#0: +; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07] +; SSE42-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistria128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; VCHECK-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -189,12 +324,19 @@ declare i32 @llvm.x86.sse42.pcmpistria128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistric128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistric128: -; CHECK: ## BB#0: -; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: sbbl %eax, %eax -; CHECK-NEXT: andl $1, %eax -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistric128: +; SSE42: ## BB#0: +; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07] +; SSE42-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; SSE42-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistric128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; VCHECK-NEXT: sbbl %eax, %eax ## encoding: [0x19,0xc0] +; VCHECK-NEXT: andl $1, %eax ## encoding: [0x83,0xe0,0x01] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -202,12 +344,19 @@ declare i32 @llvm.x86.sse42.pcmpistric128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistrio128: -; CHECK: ## BB#0: -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: seto %al -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistrio128: +; SSE42: ## BB#0: +; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07] +; SSE42-NEXT: seto %al ## encoding: [0x0f,0x90,0xc0] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistrio128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; VCHECK-NEXT: seto %al ## encoding: [0x0f,0x90,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -215,12 +364,19 @@ declare i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistris128: -; CHECK: ## BB#0: -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: sets %al -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistris128: +; SSE42: ## BB#0: +; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07] +; SSE42-NEXT: sets %al ## encoding: [0x0f,0x98,0xc0] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistris128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; VCHECK-NEXT: sets %al ## encoding: [0x0f,0x98,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -228,12 +384,19 @@ declare i32 @llvm.x86.sse42.pcmpistris128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistriz128: -; CHECK: ## BB#0: -; CHECK-NEXT: xorl %eax, %eax -; CHECK-NEXT: pcmpistri $7, %xmm1, %xmm0 -; CHECK-NEXT: sete %al -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistriz128: +; SSE42: ## BB#0: +; SSE42-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; SSE42-NEXT: pcmpistri $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x63,0xc1,0x07] +; SSE42-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistriz128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] +; VCHECK-NEXT: vpcmpistri $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x63,0xc1,0x07] +; VCHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; [#uses=1] ret i32 %res } @@ -241,10 +404,15 @@ declare i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8>, <16 x i8>, i8) nounwind rea define <16 x i8> @test_x86_sse42_pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistrm128: -; CHECK: ## BB#0: -; CHECK-NEXT: pcmpistrm $7, %xmm1, %xmm0 -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistrm128: +; SSE42: ## BB#0: +; SSE42-NEXT: pcmpistrm $7, %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x3a,0x62,0xc1,0x07] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistrm128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpcmpistrm $7, %xmm1, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x62,0xc1,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -252,11 +420,17 @@ declare <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8>, <16 x i8>, i8) nounwin define <16 x i8> @test_x86_sse42_pcmpistrm128_load(<16 x i8> %a0, <16 x i8>* %a1) { -; CHECK-LABEL: test_x86_sse42_pcmpistrm128_load: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: pcmpistrm $7, (%eax), %xmm0 -; CHECK-NEXT: retl +; SSE42-LABEL: test_x86_sse42_pcmpistrm128_load: +; SSE42: ## BB#0: +; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE42-NEXT: pcmpistrm $7, (%eax), %xmm0 ## encoding: [0x66,0x0f,0x3a,0x62,0x00,0x07] +; SSE42-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_sse42_pcmpistrm128_load: +; VCHECK: ## BB#0: +; VCHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; VCHECK-NEXT: vpcmpistrm $7, (%eax), %xmm0 ## encoding: [0xc4,0xe3,0x79,0x62,0x00,0x07] +; VCHECK-NEXT: retl ## encoding: [0xc3] %1 = load <16 x i8>, <16 x i8>* %a1 %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res diff --git a/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll b/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll index 728cbc9b60dd..01f0d4d73ba2 100644 --- a/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll @@ -1,7 +1,23 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+ssse3 | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+ssse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) { - ; CHECK: pabsb +; SSE-LABEL: test_x86_ssse3_pabs_b_128: +; SSE: ## BB#0: +; SSE-NEXT: pabsb %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x1c,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_ssse3_pabs_b_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpabsb %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1c,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_ssse3_pabs_b_128: +; SKX: ## BB#0: +; SKX-NEXT: vpabsb %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1c,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8> %a0) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -9,7 +25,20 @@ declare <16 x i8> @llvm.x86.ssse3.pabs.b.128(<16 x i8>) nounwind readnone define <4 x i32> @test_x86_ssse3_pabs_d_128(<4 x i32> %a0) { - ; CHECK: pabsd +; SSE-LABEL: test_x86_ssse3_pabs_d_128: +; SSE: ## BB#0: +; SSE-NEXT: pabsd %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x1e,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_ssse3_pabs_d_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpabsd %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1e,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_ssse3_pabs_d_128: +; SKX: ## BB#0: +; SKX-NEXT: vpabsd %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1e,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32> %a0) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -17,7 +46,20 @@ declare <4 x i32> @llvm.x86.ssse3.pabs.d.128(<4 x i32>) nounwind readnone define <8 x i16> @test_x86_ssse3_pabs_w_128(<8 x i16> %a0) { - ; CHECK: pabsw +; SSE-LABEL: test_x86_ssse3_pabs_w_128: +; SSE: ## BB#0: +; SSE-NEXT: pabsw %xmm0, %xmm0 ## encoding: [0x66,0x0f,0x38,0x1d,0xc0] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_ssse3_pabs_w_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpabsw %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x1d,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_ssse3_pabs_w_128: +; SKX: ## BB#0: +; SKX-NEXT: vpabsw %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x1d,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16> %a0) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -25,7 +67,15 @@ declare <8 x i16> @llvm.x86.ssse3.pabs.w.128(<8 x i16>) nounwind readnone define <4 x i32> @test_x86_ssse3_phadd_d_128(<4 x i32> %a0, <4 x i32> %a1) { - ; CHECK: phaddd +; SSE-LABEL: test_x86_ssse3_phadd_d_128: +; SSE: ## BB#0: +; SSE-NEXT: phaddd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x02,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_phadd_d_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphaddd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x02,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -33,7 +83,15 @@ declare <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_phadd_sw_128(<8 x i16> %a0, <8 x i16> %a1) { - ; CHECK: phaddsw +; SSE-LABEL: test_x86_ssse3_phadd_sw_128: +; SSE: ## BB#0: +; SSE-NEXT: phaddsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x03,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_phadd_sw_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x03,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -41,7 +99,15 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.sw.128(<8 x i16>, <8 x i16>) nounwind re define <8 x i16> @test_x86_ssse3_phadd_w_128(<8 x i16> %a0, <8 x i16> %a1) { - ; CHECK: phaddw +; SSE-LABEL: test_x86_ssse3_phadd_w_128: +; SSE: ## BB#0: +; SSE-NEXT: phaddw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x01,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_phadd_w_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphaddw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x01,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -49,7 +115,15 @@ declare <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16>, <8 x i16>) nounwind rea define <4 x i32> @test_x86_ssse3_phsub_d_128(<4 x i32> %a0, <4 x i32> %a1) { - ; CHECK: phsubd +; SSE-LABEL: test_x86_ssse3_phsub_d_128: +; SSE: ## BB#0: +; SSE-NEXT: phsubd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x06,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_phsub_d_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphsubd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x06,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -57,7 +131,15 @@ declare <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_phsub_sw_128(<8 x i16> %a0, <8 x i16> %a1) { - ; CHECK: phsubsw +; SSE-LABEL: test_x86_ssse3_phsub_sw_128: +; SSE: ## BB#0: +; SSE-NEXT: phsubsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x07,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_phsub_sw_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x07,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -65,7 +147,15 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.sw.128(<8 x i16>, <8 x i16>) nounwind re define <8 x i16> @test_x86_ssse3_phsub_w_128(<8 x i16> %a0, <8 x i16> %a1) { - ; CHECK: phsubw +; SSE-LABEL: test_x86_ssse3_phsub_w_128: +; SSE: ## BB#0: +; SSE-NEXT: phsubw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x05,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_phsub_w_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vphsubw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x05,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -73,7 +163,20 @@ declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) nounwind rea define <8 x i16> @test_x86_ssse3_pmadd_ub_sw_128(<16 x i8> %a0, <16 x i8> %a1) { - ; CHECK: pmaddubsw +; SSE-LABEL: test_x86_ssse3_pmadd_ub_sw_128: +; SSE: ## BB#0: +; SSE-NEXT: pmaddubsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x04,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_ssse3_pmadd_ub_sw_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x04,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_ssse3_pmadd_ub_sw_128: +; SKX: ## BB#0: +; SKX-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x04,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8> %a0, <16 x i8> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -81,7 +184,20 @@ declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind define <8 x i16> @test_x86_ssse3_pmul_hr_sw_128(<8 x i16> %a0, <8 x i16> %a1) { - ; CHECK: pmulhrsw +; SSE-LABEL: test_x86_ssse3_pmul_hr_sw_128: +; SSE: ## BB#0: +; SSE-NEXT: pmulhrsw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x0b,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_ssse3_pmul_hr_sw_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0b,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_ssse3_pmul_hr_sw_128: +; SKX: ## BB#0: +; SKX-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x0b,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res } @@ -89,7 +205,20 @@ declare <8 x i16> @llvm.x86.ssse3.pmul.hr.sw.128(<8 x i16>, <8 x i16>) nounwind define <16 x i8> @test_x86_ssse3_pshuf_b_128(<16 x i8> %a0, <16 x i8> %a1) { - ; CHECK: pshufb +; SSE-LABEL: test_x86_ssse3_pshuf_b_128: +; SSE: ## BB#0: +; SSE-NEXT: pshufb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x00,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_ssse3_pshuf_b_128: +; AVX2: ## BB#0: +; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x00,0xc1] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_ssse3_pshuf_b_128: +; SKX: ## BB#0: +; SKX-NEXT: vpshufb %xmm1, %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7d,0x08,0x00,0xc1] +; SKX-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -97,7 +226,15 @@ declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind rea define <16 x i8> @test_x86_ssse3_psign_b_128(<16 x i8> %a0, <16 x i8> %a1) { - ; CHECK: psignb +; SSE-LABEL: test_x86_ssse3_psign_b_128: +; SSE: ## BB#0: +; SSE-NEXT: psignb %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x08,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_psign_b_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpsignb %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x08,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -105,7 +242,15 @@ declare <16 x i8> @llvm.x86.ssse3.psign.b.128(<16 x i8>, <16 x i8>) nounwind rea define <4 x i32> @test_x86_ssse3_psign_d_128(<4 x i32> %a0, <4 x i32> %a1) { - ; CHECK: psignd +; SSE-LABEL: test_x86_ssse3_psign_d_128: +; SSE: ## BB#0: +; SSE-NEXT: psignd %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x0a,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_psign_d_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpsignd %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x0a,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] ret <4 x i32> %res } @@ -113,7 +258,15 @@ declare <4 x i32> @llvm.x86.ssse3.psign.d.128(<4 x i32>, <4 x i32>) nounwind rea define <8 x i16> @test_x86_ssse3_psign_w_128(<8 x i16> %a0, <8 x i16> %a1) { - ; CHECK: psignw +; SSE-LABEL: test_x86_ssse3_psign_w_128: +; SSE: ## BB#0: +; SSE-NEXT: psignw %xmm1, %xmm0 ## encoding: [0x66,0x0f,0x38,0x09,0xc1] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; VCHECK-LABEL: test_x86_ssse3_psign_w_128: +; VCHECK: ## BB#0: +; VCHECK-NEXT: vpsignw %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe2,0x79,0x09,0xc1] +; VCHECK-NEXT: retl ## encoding: [0xc3] %res = call <8 x i16> @llvm.x86.ssse3.psign.w.128(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] ret <8 x i16> %res }