From: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Mon, 5 Dec 2016 14:15:44 +0000 (+0000)
Subject: ELF/AArch64: Fix R_AARCH64_LDST16_ABS_LO12_NC mask
X-Git-Tag: llvmorg-4.0.0-rc1~2994
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a47ba192dc0adc88311d3c3cafc298f53861c616;p=platform%2Fupstream%2Fllvm.git

ELF/AArch64: Fix R_AARCH64_LDST16_ABS_LO12_NC mask

The relocation R_AARCH64_LDST16_ABS_LO12_NC should set a ld/st
immediate value to bits [11:1] not [11:2].  This patches fixes it
and adds a testcase for regression.

With this fix all the faulty tests on test-suite (clavm, lencod,
and trimaran) pass.

llvm-svn: 288670
---

diff --git a/lld/ELF/Target.cpp b/lld/ELF/Target.cpp
index 6e4a180..40219b1 100644
--- a/lld/ELF/Target.cpp
+++ b/lld/ELF/Target.cpp
@@ -1381,7 +1381,7 @@ void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint32_t Type,
     or32le(Loc, (Val & 0x0FF8) << 6);
     break;
   case R_AARCH64_LDST16_ABS_LO12_NC:
-    or32le(Loc, (Val & 0x0FFC) << 9);
+    or32le(Loc, (Val & 0x0FFE) << 9);
     break;
   case R_AARCH64_LDST8_ABS_LO12_NC:
     or32le(Loc, (Val & 0xFFF) << 10);
diff --git a/lld/test/ELF/aarch64-relocs.s b/lld/test/ELF/aarch64-relocs.s
index 7c618b4..9d02bd5 100644
--- a/lld/test/ELF/aarch64-relocs.s
+++ b/lld/test/ELF/aarch64-relocs.s
@@ -141,16 +141,20 @@ foo128:
 .section .R_AARCH64_LDST16_ABS_LO12_NC,"ax",@progbits
 ldst16:
   ldr h17, [x19, :lo12:foo16]
+  ldrh w1, [x19, :lo12:foo16]
+  ldrh w2, [x19, :lo12:foo16 + 2]
 foo16:
   .asciz "foo"
-  .size mystr, 3
+  .size mystr, 4
 
 # S = 0x20054, A = 0x4
 # R = ((S + A) & 0x0FFC) << 9 = 0xb000
 # 0xb000 | 0x7d400271 = 0x7d40b271
 # CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
 # CHECK-NEXT: ldst16:
-# CHECK-NEXT:   20054:       71 b2 40 7d     ldr     h17, [x19, #88]
+# CHECK-NEXT:   20054:       71 c2 40 7d     ldr     h17, [x19, #96]
+# CHECK-NEXT:   20058:       61 c2 40 79     ldrh    w1, [x19, #96]
+# CHECK-NEXT:   2005c:       62 c6 40 79     ldrh    w2, [x19, #98]
 
 .section .R_AARCH64_MOVW_UABS,"ax",@progbits
 movz1: