From: Heiko Schocher <hs@denx.de>
Date: Thu, 7 Jan 2010 07:56:00 +0000 (+0100)
Subject: mpc83xx: add support configure bus parking
X-Git-Tag: v2010.03-rc1~160^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a3f5da1bee9a8c343a411080d7d468bdc78794a4;p=platform%2Fkernel%2Fu-boot.git

mpc83xx: add support configure bus parking

Add support to configure bus parking mode and master in bus arbitration
configuration (ACR). Add this for the kmeter1 port:

Configure bus arbiter with recommended values from Freescale
to improve bus latency/throughput for application with
intensive QuiccEngine activity.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
---

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 0d6a5fe..75b4522 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -70,6 +70,12 @@ void cpu_init_f (volatile immap_t * im)
 #ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
 		(ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
 #endif
+#ifdef CONFIG_SYS_ACR_APARK	/* Arbiter address parking mode */
+		(ACR_APARK << ACR_APARK_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_ACR_PARKM	/* Arbiter parking master */
+		(ACR_PARKM << ACR_PARKM_SHIFT) |
+#endif
 		0;
 	__be32 acr_val =
 #ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */
@@ -78,6 +84,12 @@ void cpu_init_f (volatile immap_t * im)
 #ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */
 		(CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT) |
 #endif
+#ifdef CONFIG_SYS_ACR_APARK	/* Arbiter address parking mode */
+		(CONFIG_SYS_ACR_APARK << ACR_APARK_SHIFT) |
+#endif
+#ifdef CONFIG_SYS_ACR_PARKM	/* Arbiter parking master */
+		(CONFIG_SYS_ACR_PARKM << ACR_PARKM_SHIFT) |
+#endif
 		0;
 	__be32 spcr_mask =
 #ifdef CONFIG_SYS_SPCR_OPT /* Optimize transactions between CSB and other dev */
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index bec08da..b023326 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -72,6 +72,14 @@
 #define CONFIG_SYS_IMMR		0xE0000000
 
 /*
+ * Bus Arbitration Configuration Register (ACR)
+ */
+#define CONFIG_SYS_ACR_PIPE_DEP 3       /* pipeline depth 4 transactions */
+#define CONFIG_SYS_ACR_RPTCNT   3       /* 4 consecutive transactions */
+#define CONFIG_SYS_ACR_APARK    0       /* park bus to master (below) */
+#define CONFIG_SYS_ACR_PARKM    3       /* parking master = QuiccEngine */
+
+/*
  * DDR Setup
  */
 #define CONFIG_SYS_DDR_BASE		0x00000000 /* DDR is system memory */