From: Jia Jie Ho <jiajie.ho@starfivetech.com>
Date: Fri, 2 Dec 2022 06:25:38 +0000 (+0800)
Subject: riscv: dts: starfive: Add TRNG node for VisionFive 2
X-Git-Tag: accepted/tizen/unified/riscv/20230725.071352~169
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a3ce5adb40628f505969f62468d43bf1f0ca208c;p=platform%2Fkernel%2Flinux-starfive.git

riscv: dts: starfive: Add TRNG node for VisionFive 2

Adding StarFive TRNG controller node to VisionFive 2 board.

Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
---

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 0f42549..1f9fd1e 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -632,6 +632,16 @@
 				 <&syscrg JH7110_SYSRST_WDT_CORE>;
 		};
 
+		rng: rng@1600c000 {
+			compatible = "starfive,jh7110-trng";
+			reg = <0x0 0x1600C000 0x0 0x4000>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
+				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
+			clock-names = "hclk", "ahb";
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			interrupts = <30>;
+		};
+
 		mmc0: mmc@16010000 {
 			compatible = "starfive,jh7110-mmc";
 			reg = <0x0 0x16010000 0x0 0x10000>;