From: Atish Patra Date: Tue, 2 Oct 2018 19:15:03 +0000 (-0700) Subject: RISC-V: Use WRITE_ONCE instead of direct access X-Git-Tag: v5.15~7669^2~3^2~4 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a37d56fc401108f39dec9ba83ed923a453937a26;p=platform%2Fkernel%2Flinux-starfive.git RISC-V: Use WRITE_ONCE instead of direct access The secondary harts spin on couple of per cpu variables until both of these are non-zero so it's not necessary to have any ordering here. However, WRITE_ONCE should be used to avoid tearing. Signed-off-by: Atish Patra Reviewed-by: Christoph Hellwig Signed-off-by: Palmer Dabbelt --- diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c index 17e7483..1e47861 100644 --- a/arch/riscv/kernel/smpboot.c +++ b/arch/riscv/kernel/smpboot.c @@ -81,8 +81,9 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle) * the spinning harts that they can continue the boot process. */ smp_mb(); - __cpu_up_stack_pointer[cpu] = task_stack_page(tidle) + THREAD_SIZE; - __cpu_up_task_pointer[cpu] = tidle; + WRITE_ONCE(__cpu_up_stack_pointer[cpu], + task_stack_page(tidle) + THREAD_SIZE); + WRITE_ONCE(__cpu_up_task_pointer[cpu], tidle); while (!cpu_online(cpu)) cpu_relax();