From: Marek Vasut Date: Wed, 13 Jun 2018 06:02:55 +0000 (+0200) Subject: mmc: tmio: sdhi: Merge DTCNTL access into single register write X-Git-Tag: v2018.11~20^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a376dde1deb9cc42e3804b9c654f873c936cc8d4;p=platform%2Fkernel%2Fu-boot.git mmc: tmio: sdhi: Merge DTCNTL access into single register write It is perfectly fine to write th DTCNTL TAP count and enable the SCC sampling clock operation in the same write. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 63561e1..e7f96f8 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -51,12 +51,9 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); /* Set sampling clock selection range */ - tmio_sd_writel(priv, 0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT, - RENESAS_SDHI_SCC_DTCNTL); - - reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_DTCNTL); - reg |= RENESAS_SDHI_SCC_DTCNTL_TAPEN; - tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_DTCNTL); + tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | + RENESAS_SDHI_SCC_DTCNTL_TAPEN, + RENESAS_SDHI_SCC_DTCNTL); reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL;