From: Jan Beulich Date: Fri, 1 Dec 2006 14:56:11 +0000 (+0000) Subject: opcodes/ X-Git-Tag: drow-reverse-20070409-branchpoint~1174 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a35ca55aee929c1b59136d93a257f0b5dcad6186;p=external%2Fbinutils.git opcodes/ 2006-11-30 Jan Beulich * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally. (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix used. For 'R' and 'W' suffix, simplify and fix Intel mode. gas/testsuite/ 2006-11-30 Jan Beulich * gas/i386/intel.s: Use Intel syntax in Intel syntax test. * gas/i386/x86-64-cbw.[sd]: New. * gas/i386/x86-64-cbw-intel.d: New. * gas/i386/i386.exp: Run new tests. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index ef83e7f..725f910 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2006-11-30 Jan Beulich + + * gas/i386/intel.s: Use Intel syntax in Intel syntax test. + * gas/i386/x86-64-cbw.[sd]: New. + * gas/i386/x86-64-cbw-intel.d: New. + * gas/i386/i386.exp: Run new tests. + 2006-11-29 Paul Brook * gas/arm/vfpv3-const-conv.s: Improve test coverage. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index cead592..699ad65 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -155,6 +155,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-merom" run_dump_test "x86-64-rep" run_dump_test "x86-64-rep-suffix" + run_dump_test "x86-64-cbw" + run_dump_test "x86-64-cbw-intel" run_dump_test "x86-64-gidt" run_dump_test "x86-64-nops" if ![istarget "*-*-mingw64*"] then { diff --git a/gas/testsuite/gas/i386/intel.s b/gas/testsuite/gas/i386/intel.s index 464f4b6..e0eedc9 100644 --- a/gas/testsuite/gas/i386/intel.s +++ b/gas/testsuite/gas/i386/intel.s @@ -484,8 +484,8 @@ foo: xchg bp, ax xchg si, ax xchg di, ax - cbtw - cwtd + cbw + cwd callw 0x9090,0x9090 pushfw popfw diff --git a/gas/testsuite/gas/i386/x86-64-cbw-intel.d b/gas/testsuite/gas/i386/x86-64-cbw-intel.d new file mode 100644 index 0000000..616ffad --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-cbw-intel.d @@ -0,0 +1,26 @@ +#source: x86-64-cbw.s +#objdump: -dwMintel +#name: x86-64 CBW/CWD & Co (Intel disassembly) + +.*: +file format .* + +Disassembly of section .text: + +0+000 <_cbw>: + 0: 66 98 cbw + 2: 98 cwde + 3: 48 98 cdqe + 5: 66 40 98 rex cbw + 8: 40 98 rex cwde + a: 66 data16 + b: 48 98 cdqe + +0+00d <_cwd>: + d: 66 99 cwd + f: 99 cdq + 10: 48 99 cqo + 12: 66 40 99 rex cwd + 15: 40 99 rex cdq + 17: 66 data16 + 18: 48 99 cqo +#pass diff --git a/gas/testsuite/gas/i386/x86-64-cbw.d b/gas/testsuite/gas/i386/x86-64-cbw.d new file mode 100644 index 0000000..5474ce2 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-cbw.d @@ -0,0 +1,25 @@ +#objdump: -dw +#name: x86-64 CBW/CWD & Co + +.*: +file format .* + +Disassembly of section .text: + +0+000 <_cbw>: + 0: 66 98 cbtw + 2: 98 cwtl + 3: 48 98 cltq + 5: 66 40 98 rex cbtw + 8: 40 98 rex cwtl + a: 66 data16 + b: 48 98 cltq + +0+00d <_cwd>: + d: 66 99 cwtd + f: 99 cltd + 10: 48 99 cqto + 12: 66 40 99 rex cwtd + 15: 40 99 rex cltd + 17: 66 data16 + 18: 48 99 cqto +#pass diff --git a/gas/testsuite/gas/i386/x86-64-cbw.s b/gas/testsuite/gas/i386/x86-64-cbw.s new file mode 100644 index 0000000..085c279 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-cbw.s @@ -0,0 +1,18 @@ + .intel_syntax noprefix + .text +_cbw: + cbw + cwde + cdqe + rex cbw + rex cwde + rex64 cbw +_cwd: + cwd + cdq + cqo + rex cwd + rex cdq + rex64 cwd + + .p2align 4,0 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f9a755a..36a479c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2006-11-30 Jan Beulich + + * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally. + (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix + used. For 'R' and 'W' suffix, simplify and fix Intel mode. + 2006-11-29 Paul Brook * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index caac903..7873a31 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -506,17 +506,17 @@ struct dis386 { 'J' => print 'l' 'L' => print 'l' if suffix_always is true 'N' => print 'n' if instruction has no wait "prefix" - 'O' => print 'd', or 'o' + 'O' => print 'd' or 'o' (or 'q' in Intel mode) 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, . or suffix_always is true. print 'q' if rex prefix is present. 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always . is true - 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode) + 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode) 'S' => print 'w', 'l' or 'q' if suffix_always is true 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 'V' => print 'q' in 64bit mode and behave as 'S' otherwise - 'W' => print 'b' or 'w' ("w" or "de" in intel mode) + 'W' => print 'b', 'w' or 'l' ('d' in Intel mode) 'X' => print 's', 'd' depending on data16 prefix (for XMM) 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise @@ -703,8 +703,8 @@ static const struct dis386 dis386[] = { { "xchgS", RMeSI, eAX, XX, XX }, { "xchgS", RMeDI, eAX, XX, XX }, /* 98 */ - { "cW{tR||tR|}", XX, XX, XX, XX }, - { "cR{tO||tO|}", XX, XX, XX, XX }, + { "cW{t||t|}R", XX, XX, XX, XX }, + { "cR{t||t|}O", XX, XX, XX, XX }, { "Jcall{T|}", Ap, XX, XX, XX }, { "(bad)", XX, XX, XX, XX }, /* fwait */ { "pushfT", XX, XX, XX, XX }, @@ -3812,8 +3812,12 @@ putop (const char *template, int sizeflag) USED_REX (REX_MODE64); if (rex & REX_MODE64) *obufp++ = 'o'; + else if (intel_syntax && (sizeflag & DFLAG)) + *obufp++ = 'q'; else *obufp++ = 'd'; + if (!(rex & REX_MODE64)) + used_prefixes |= (prefixes & PREFIX_DATA); break; case 'T': if (intel_syntax) @@ -3874,33 +3878,20 @@ putop (const char *template, int sizeflag) break; case 'R': USED_REX (REX_MODE64); - if (intel_syntax) + if (rex & REX_MODE64) + *obufp++ = 'q'; + else if (sizeflag & DFLAG) { - if (rex & REX_MODE64) - { - *obufp++ = 'q'; - *obufp++ = 't'; - } - else if (sizeflag & DFLAG) - { + if (intel_syntax) *obufp++ = 'd'; - *obufp++ = 'q'; - } else - { - *obufp++ = 'w'; - *obufp++ = 'd'; - } + *obufp++ = 'l'; } else - { - if (rex & REX_MODE64) - *obufp++ = 'q'; - else if (sizeflag & DFLAG) - *obufp++ = 'l'; - else - *obufp++ = 'w'; - } + *obufp++ = 'w'; + if (intel_syntax && !p[1] + && ((rex & REX_MODE64) || (sizeflag & DFLAG))) + *obufp++ = 'e'; if (!(rex & REX_MODE64)) used_prefixes |= (prefixes & PREFIX_DATA); break; @@ -3950,31 +3941,19 @@ putop (const char *template, int sizeflag) /* implicit operand size 'l' for i386 or 'q' for x86-64 */ case 'W': /* operand size flag for cwtl, cbtw */ - USED_REX (0); - if (rex) - *obufp++ = 'l'; + USED_REX (REX_MODE64); + if (rex & REX_MODE64) + { + if (intel_syntax) + *obufp++ = 'd'; + else + *obufp++ = 'l'; + } else if (sizeflag & DFLAG) *obufp++ = 'w'; else *obufp++ = 'b'; - if (intel_syntax) - { - if (rex) - { - *obufp++ = 'q'; - *obufp++ = 'e'; - } - if (sizeflag & DFLAG) - { - *obufp++ = 'd'; - *obufp++ = 'e'; - } - else - { - *obufp++ = 'w'; - } - } - if (!rex) + if (!(rex & REX_MODE64)) used_prefixes |= (prefixes & PREFIX_DATA); break; }