From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Thu, 28 Apr 2005 19:45:10 +0000 (+0000)
Subject: ne2000 reset fix - start/stop registers read access (aka OS/2 Warp V4 fix) (lukewarm)
X-Git-Tag: TizenStudio_2.0_p2.3~14795
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a343df1659d59fa20b8fa642f5eb92c5aad2eab9;p=sdk%2Femulator%2Fqemu.git

ne2000 reset fix - start/stop registers read access (aka OS/2 Warp V4 fix) (lukewarm)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1422 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/hw/ne2000.c b/hw/ne2000.c
index e1b656e..db61336 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -61,6 +61,9 @@
 #define EN1_CURPAG      0x17
 #define EN1_MULT        0x18
 
+#define EN2_STARTPG	0x21	/* Starting page of ring bfr RD */
+#define EN2_STOPPG	0x22	/* Ending page +1 of ring bfr RD */
+
 /*  Register accessed at EN_CMD, the 8390 base addr.  */
 #define E8390_STOP	0x01	/* Stop and reset the chip */
 #define E8390_START	0x02	/* Start the chip, clear reset */
@@ -150,7 +153,7 @@ static void ne2000_reset(NE2000State *s)
 static void ne2000_update_irq(NE2000State *s)
 {
     int isr;
-    isr = s->isr & s->imr;
+    isr = (s->isr & s->imr) & 0x7f;
 #if defined(DEBUG_NE2000)
     printf("NE2000: Set IRQ line %d to %d (%02x %02x)\n",
 	   s->irq, isr ? 1 : 0, s->isr, s->imr);
@@ -255,7 +258,7 @@ static void ne2000_ioport_write(void *opaque, uint32_t addr, uint32_t val)
     if (addr == E8390_CMD) {
         /* control register */
         s->cmd = val;
-        if (val & E8390_START) {
+        if (!(val & E8390_STOP)) { /* START bit makes no sense on RTL8029... */
             s->isr &= ~ENISR_RESET;
             /* test specific case: zero length transfert */
             if ((val & (E8390_RREAD | E8390_RWRITE)) &&
@@ -376,6 +379,12 @@ static uint32_t ne2000_ioport_read(void *opaque, uint32_t addr)
         case EN0_RSR:
             ret = s->rsr;
             break;
+        case EN2_STARTPG:
+            ret = s->start >> 8;
+            break;
+        case EN2_STOPPG:
+            ret = s->stop >> 8;
+            break;
         default:
             ret = 0x00;
             break;