From: Rex-BC Chen <rex-bc.chen@mediatek.com>
Date: Tue, 3 May 2022 09:38:55 +0000 (+0800)
Subject: arm64: dts: mediatek: Add infra #reset-cells property for MT8192
X-Git-Tag: v6.6.17~6969^2~27^2~55
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a30cc07f9e321e5b9ed26b3f14ee9637fd39b753;p=platform%2Fkernel%2Flinux-rpi.git

arm64: dts: mediatek: Add infra #reset-cells property for MT8192

To support reset of infra, we add property of #reset-cells.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220503093856.22250-16-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 733aec2..13ba5fe 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -271,6 +271,7 @@
 			compatible = "mediatek,mt8192-infracfg", "syscon";
 			reg = <0 0x10001000 0 0x1000>;
 			#clock-cells = <1>;
+			#reset-cells = <1>;
 		};
 
 		pericfg: syscon@10003000 {