From: David Spickett Date: Mon, 14 Jun 2021 09:19:25 +0000 (+0000) Subject: Reland "[lldb] Set return status to failed when adding a command error" X-Git-Tag: llvmorg-14-init~4054 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a2363c0cf9b6a9a81c76ac652da667f73845d38b;p=platform%2Fupstream%2Fllvm.git Reland "[lldb] Set return status to failed when adding a command error" This reverts commit db93e4e70aa453e5ba04ba0d9e01f581882b6c81. This modifies TestRegsters.py to account for Darwin showing AVX registers as part of "Floating Point Registers" instead of in a separate "Advanced Vector Extensions" category. --- diff --git a/lldb/source/Interpreter/CommandReturnObject.cpp b/lldb/source/Interpreter/CommandReturnObject.cpp index c3f32a4..531c1f2 100644 --- a/lldb/source/Interpreter/CommandReturnObject.cpp +++ b/lldb/source/Interpreter/CommandReturnObject.cpp @@ -44,6 +44,8 @@ CommandReturnObject::CommandReturnObject(bool colors) : m_out_stream(colors), m_err_stream(colors) {} void CommandReturnObject::AppendErrorWithFormat(const char *format, ...) { + SetStatus(eReturnStatusFailed); + if (!format) return; va_list args; @@ -98,6 +100,7 @@ void CommandReturnObject::AppendWarning(llvm::StringRef in_string) { void CommandReturnObject::AppendError(llvm::StringRef in_string) { if (in_string.empty()) return; + SetStatus(eReturnStatusFailed); error(GetErrorStream()) << in_string.rtrim() << '\n'; } @@ -114,7 +117,6 @@ void CommandReturnObject::SetError(llvm::StringRef error_str) { return; AppendError(error_str); - SetStatus(eReturnStatusFailed); } // Similar to AppendError, but do not prepend 'Status: ' to message, and don't @@ -124,6 +126,7 @@ void CommandReturnObject::AppendRawError(llvm::StringRef in_string) { if (in_string.empty()) return; GetErrorStream() << in_string; + SetStatus(eReturnStatusFailed); } void CommandReturnObject::SetStatus(ReturnStatus status) { m_status = status; } diff --git a/lldb/test/API/commands/register/register/register_command/TestRegisters.py b/lldb/test/API/commands/register/register/register_command/TestRegisters.py index 5ec46c1..7acf3a4 100644 --- a/lldb/test/API/commands/register/register/register_command/TestRegisters.py +++ b/lldb/test/API/commands/register/register/register_command/TestRegisters.py @@ -41,13 +41,18 @@ class RegisterCommandsTestCase(TestBase): self.expect("register read -a", MISSING_EXPECTED_REGISTERS, substrs=['registers were unavailable'], matching=False) + all_registers = self.res.GetOutput() + if self.getArchitecture() in ['amd64', 'i386', 'x86_64']: self.runCmd("register read xmm0") - self.runCmd("register read ymm15") # may be available - self.runCmd("register read bnd0") # may be available + if "ymm15 = " in all_registers: + self.runCmd("register read ymm15") # may be available + if "bnd0 = " in all_registers: + self.runCmd("register read bnd0") # may be available elif self.getArchitecture() in ['arm', 'armv7', 'armv7k', 'arm64', 'arm64e', 'arm64_32']: self.runCmd("register read s0") - self.runCmd("register read q15") # may be available + if "q15 = " in all_registers: + self.runCmd("register read q15") # may be available self.expect( "register read -s 4", @@ -413,7 +418,8 @@ class RegisterCommandsTestCase(TestBase): self.write_and_read(currentFrame, "ymm7", new_value) self.expect("expr $ymm0", substrs=['vector_type']) else: - self.runCmd("register read ymm0") + self.expect("register read ymm0", substrs=["Invalid register name 'ymm0'"], + error=True) if has_mpx: # Test write and read for bnd0. @@ -428,7 +434,8 @@ class RegisterCommandsTestCase(TestBase): self.write_and_read(currentFrame, "bndstatus", new_value) self.expect("expr $bndstatus", substrs = ['vector_type']) else: - self.runCmd("register read bnd0") + self.expect("register read bnd0", substrs=["Invalid register name 'bnd0'"], + error=True) def convenience_registers(self): """Test convenience registers.""" @@ -450,7 +457,7 @@ class RegisterCommandsTestCase(TestBase): # Now write rax with a unique bit pattern and test that eax indeed # represents the lower half of rax. self.runCmd("register write rax 0x1234567887654321") - self.expect("register read rax 0x1234567887654321", + self.expect("register read rax", substrs=['0x1234567887654321']) def convenience_registers_with_process_attach(self, test_16bit_regs): diff --git a/lldb/test/Shell/Commands/command-backtrace-parser-1.test b/lldb/test/Shell/Commands/command-backtrace-parser-1.test new file mode 100644 index 0000000..339c666 --- /dev/null +++ b/lldb/test/Shell/Commands/command-backtrace-parser-1.test @@ -0,0 +1,6 @@ +# RUN: %lldb -s %s 2>&1 | FileCheck %s + +# Make sure this is not rejected by the parser as invalid syntax. +# Blank characters after the '1' are important, as we're testing the parser. +bt 1 +# CHECK: error: invalid target diff --git a/lldb/test/Shell/Commands/command-backtrace.test b/lldb/test/Shell/Commands/command-backtrace-parser-2.test similarity index 50% rename from lldb/test/Shell/Commands/command-backtrace.test rename to lldb/test/Shell/Commands/command-backtrace-parser-2.test index 2816f5f..5f91cf3 100644 --- a/lldb/test/Shell/Commands/command-backtrace.test +++ b/lldb/test/Shell/Commands/command-backtrace-parser-2.test @@ -1,12 +1,6 @@ -# Check basic functionality of command bt. # RUN: %lldb -s %s 2>&1 | FileCheck %s # Make sure this is not rejected by the parser as invalid syntax. -# Blank characters after the '1' are important, as we're testing the parser. -bt 1 -# CHECK: error: invalid target - -# Make sure this is not rejected by the parser as invalid syntax. # Blank characters after the 'all' are important, as we're testing the parser. bt all # CHECK: error: invalid target