From: Grigori Goronzy <greg@chown.ath.cx>
Date: Tue, 11 Oct 2016 22:47:20 +0000 (+0200)
Subject: radv: fix strict aliasing violation
X-Git-Tag: upstream/17.1.0~5695
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a22b5f28fbcc3cda9c756dec339c7e729d1d10f3;p=platform%2Fupstream%2Fmesa.git

radv: fix strict aliasing violation

Signed-off-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c
index 032a7e4..85a2b6d 100644
--- a/src/amd/vulkan/radv_pipeline_cache.c
+++ b/src/amd/vulkan/radv_pipeline_cache.c
@@ -28,7 +28,10 @@
 #include "ac_nir_to_llvm.h"
 
 struct cache_entry {
-	unsigned char sha1[20];
+	union {
+		unsigned char sha1[20];
+		uint32_t sha1_dw[5];
+	};
 	uint32_t code_size;
 	struct ac_shader_variant_info variant_info;
 	struct ac_shader_config config;
@@ -185,7 +188,7 @@ radv_pipeline_cache_set_entry(struct radv_pipeline_cache *cache,
 			      struct cache_entry *entry)
 {
 	const uint32_t mask = cache->table_size - 1;
-	const uint32_t start = (*(uint32_t *) entry->sha1);
+	const uint32_t start = entry->sha1_dw[0];
 
 	/* We'll always be able to insert when we get here. */
 	assert(cache->kernel_count < cache->table_size / 2);