From: Alvin Lee Date: Sun, 5 Apr 2020 20:41:05 +0000 (-0400) Subject: drm/amd/display: Revert to old formula in set_vtg_params X-Git-Tag: v5.15~3606^2~20^2~134 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a1a0e61f3c43c610f0a3c109348c14ce930c1977;p=platform%2Fkernel%2Flinux-starfive.git drm/amd/display: Revert to old formula in set_vtg_params [Why] New formula + cursor change causing underflow on certain configs [How] Rever to old formula Signed-off-by: Alvin Lee Reviewed-by: Yongqiang Sun Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c index 17d96ec6..ec0ab42 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c @@ -299,6 +299,7 @@ void optc1_set_vtg_params(struct timing_generator *optc, uint32_t asic_blank_end; uint32_t v_init; uint32_t v_fp2 = 0; + int32_t vertical_line_start; struct optc *optc1 = DCN10TG_FROM_TG(optc); @@ -315,8 +316,9 @@ void optc1_set_vtg_params(struct timing_generator *optc, patched_crtc_timing.v_border_top; /* if VSTARTUP is before VSYNC, FP2 is the offset, otherwise 0 */ - if (optc1->vstartup_start > asic_blank_end) - v_fp2 = optc1->vstartup_start - asic_blank_end; + vertical_line_start = asic_blank_end - optc1->vstartup_start + 1; + if (vertical_line_start < 0) + v_fp2 = -vertical_line_start; /* Interlace */ if (REG(OTG_INTERLACE_CONTROL)) {