From: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Date: Fri, 11 Mar 2022 08:41:14 +0000 (+0530)
Subject: ARM: dts: bcm-cygnus: Update spi clock properties
X-Git-Tag: v6.6.17~7444^2~29^2~20
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a14a56a3dd6bb45aa7c0ef1a665839656f2bcce3;p=platform%2Fkernel%2Flinux-rpi.git

ARM: dts: bcm-cygnus: Update spi clock properties

PL022 binding require two clocks to be defined but broadcom cygnus
platform doesn't comply with bindings and define only one clock.

Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.

CC: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index ad65be8..f9f79ed 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -397,8 +397,8 @@
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&spi_0>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "sspclk", "apb_pclk";
 			status = "disabled";
 		};
 
@@ -409,8 +409,8 @@
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&spi_1>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "sspclk", "apb_pclk";
 			status = "disabled";
 		};
 
@@ -421,8 +421,8 @@
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&spi_2>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "sspclk", "apb_pclk";
 			status = "disabled";
 		};