From: yroux Date: Tue, 13 May 2014 13:08:40 +0000 (+0000) Subject: Merge branches/gcc-4_9-branch rev 210052 X-Git-Tag: upstream/4.9.2.0~244 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a132f1a5c35bf5662236f0d5b5f31175ddc7b798;p=platform%2Fupstream%2Fgcc49.git Merge branches/gcc-4_9-branch rev 210052 git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@210370 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3ac3c81..6ea494b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,384 @@ +2014-05-03 Joey Ye + + Backport from mainline r209463 + 2014-04-17 Joey Ye + + * opts.c (OPT_fif_conversion, OPT_fif_conversion2): Disable for Og. + +2014-05-03 Oleg Endo + + Back port from mainline + PR target/61026 + * config/sh/sh.c: Include stdlib headers before everything else. + +2014-05-02 Bill Schmidt + + PR tree-optimization/60930 + * gimple-ssa-strength-reduction.c (create_mul_imm_cand): Reject + creating a multiply candidate by folding two constant + multiplicands when the result overflows. + +2014-05-02 Jakub Jelinek + + * gimplify.c (gimplify_adjust_omp_clauses_1): Handle + GOVD_FIRSTPRIVATE | GOVD_LASTPRIVATE. + (gimplify_adjust_omp_clauses): Simd region is never + directly nested in combined parallel. Instead, for linear + with copyin/copyout, if in combined for simd loop, make decl + firstprivate/lastprivate on OMP_FOR. + * omp-low.c (expand_omp_for_generic, expand_omp_for_static_nochunk, + expand_omp_for_static_chunk): When setting endvar, also set + fd->loop.v to the same value. + +2014-05-02 Kyrylo Tkachov + + Back port from mainline + 2014-04-24 Kyrylo Tkachov + + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Check + TARGET_SIMD rather than TARGET_GENERAL_REGS_ONLY. + (TARGET_SIMD): Take AARCH64_ISA_SIMD into account. + (TARGET_FLOAT): Take AARCH64_ISA_FP into account. + (TARGET_CRYPTO): Take TARGET_SIMD into account. + +2014-04-30 Michael Meissner + + Back port from mainline + 2014-04-24 Michael Meissner + + * doc/extend.texi (PowerPC Built-in Functions): Document new + powerpc extended divide, bcd, pack/unpack 128-bit, builtin + functions. + (PowerPC AltiVec/VSX Built-in Functions): Likewise. + + * config/rs6000/predicates.md (const_0_to_3_operand): New + predicate to match 0..3 integer constants. + + * config/rs6000/rs6000-builtin.def (BU_DFP_MISC_1): Add new macros + to support adding miscellaneous builtin functions. + (BU_DFP_MISC_2): Likewise. + (BU_P7_MISC_1): Likewise. + (BU_P7_MISC_2): Likewise. + (BU_P8V_MISC_3): Likewise. + (BU_MISC_1): Likewise. + (BU_MISC_2): Likewise. + (DIVWE): Add extended divide builtin functions. + (DIVWEO): Likewise. + (DIVWEU): Likewise. + (DIVWEUO): Likewise. + (DIVDE): Likewise. + (DIVDEO): Likewise. + (DIVDEU): Likewise. + (DIVDEUO): Likewise. + (DXEX): Add decimal floating-point builtin functions. + (DXEXQ): Likewise. + (DDEDPD): Likewise. + (DDEDPDQ): Likewise. + (DENBCD): Likewise. + (DENBCDQ): Likewise. + (DIEX): Likewise. + (DIEXQ): Likewise. + (DSCLI): Likewise. + (DSCLIQ): Likewise. + (DSCRI): Likewise. + (DSCRIQ): Likewise. + (CDTBCD): Add new BCD builtin functions. + (CBCDTD): Likewise. + (ADDG6S): Likewise. + (BCDADD): Likewise. + (BCDADD_LT): Likewise. + (BCDADD_EQ): Likewise. + (BCDADD_GT): Likewise. + (BCDADD_OV): Likewise. + (BCDSUB): Likewise. + (BCDSUB_LT): Likewise. + (BCDSUB_EQ): Likewise. + (BCDSUB_GT): Likewise. + (BCDSUB_OV): Likewise. + (PACK_TD): Add new pack/unpack 128-bit type builtin functions. + (UNPACK_TD): Likewise. + (PACK_TF): Likewise. + (UNPACK_TF): Likewise. + (UNPACK_TF_0): Likewise. + (UNPACK_TF_1): Likewise. + (PACK_V1TI): Likewise. + (UNPACK_V1TI): Likewise. + + * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add + support for decimal floating point builtin functions. + (rs6000_expand_ternop_builtin): Add checks for the new builtin + functions that take constant arguments. + (rs6000_invalid_builtin): Add decimal floating point builtin + support. + (rs6000_init_builtins): Setup long double, _Decimal64, and + _Decimal128 types for new builtin functions. + (builtin_function_type): Set the unsigned flags appropriately for + the new builtin functions. + (rs6000_opt_masks): Add support for decimal floating point builtin + functions. + + * config/rs6000/rs6000.h (RS6000_BTM_DFP): Add support for decimal + floating point builtin functions. + (RS6000_BTM_COMMON): Likewise. + (RS6000_BTI_long_double): Likewise. + (RS6000_BTI_dfloat64): Likewise. + (RS6000_BTI_dfloat128): Likewise. + (long_double_type_internal_node): Likewise. + (dfloat64_type_internal_node): Likewise. + (dfloat128_type_internal_node): Likewise. + + * config/rs6000/altivec.h (UNSPEC_BCDADD): Add support for ISA + 2.07 bcd arithmetic instructions. + (UNSPEC_BCDSUB): Likewise. + (UNSPEC_BCD_OVERFLOW): Likewise. + (UNSPEC_BCD_ADD_SUB): Likewise. + (bcd_add_sub): Likewise. + (BCD_TEST): Likewise. + (bcd): Likewise. + (bcd_test): Likewise. + (bcd_test2): Likewise. + (bcd_): Likewise. + (peephole2 for combined bcd ops): Likewise. + + * config/rs6000/dfp.md (UNSPEC_DDEDPD): Add support for new + decimal floating point builtin functions. + (UNSPEC_DENBCD): Likewise. + (UNSPEC_DXEX): Likewise. + (UNSPEC_DIEX): Likewise. + (UNSPEC_DSCLI): Likewise. + (UNSPEC_DSCRI): Likewise. + (D64_D128): Likewise. + (dfp_suffix): Likewise. + (dfp_ddedpd_): Likewise. + (dfp_denbcd_): Likewise. + (dfp_dxex_): Likewise. + (dfp_diex_): Likewise. + (dfp_dscli_): Likewise. + (dfp_dscri_): Likewise. + + * config/rs6000/rs6000.md (UNSPEC_ADDG6S): Add support for new BCD + builtin functions. + (UNSPEC_CDTBCD): Likewise. + (UNSPEC_CBCDTD): Likewise. + (UNSPEC_DIVE): Add support for new extended divide builtin + functions. + (UNSPEC_DIVEO): Likewise. + (UNSPEC_DIVEU): Likewise. + (UNSPEC_DIVEUO): Likewise. + (UNSPEC_UNPACK_128BIT): Add support for new builtin functions to + pack/unpack 128-bit types. + (UNSPEC_PACK_128BIT): Likewise. + (idiv_ldiv): New mode attribute to set the 32/64-bit divide type. + (udiv3): Use idiv_ldiv mode attribute. + (div3): Likewise. + (addg6s): Add new BCD builtin functions. + (cdtbcd): Likewise. + (cbcdtd): Likewise. + (UNSPEC_DIV_EXTEND): Add support for new extended divide + instructions. + (div_extend): Likewise. + (div_"): Likewise. + (FP128_64): Add support for new builtin functions to pack/unpack + 128-bit types. + (unpack): Likewise. + (unpacktf_0): Likewise. + (unpacktf_1): Likewise. + (unpack_dm): Likewise. + (unpack_nodm): Likewise. + (pack): Likewise. + (unpackv1ti): Likewise. + (packv1ti): Likewise. + +2014-04-29 Pat Haugen + + Backport from mainline + 2014-04-17 Pat Haugen + + * config/rs6000/rs6000.md (addti3, subti3): New. + +2014-04-29 Jakub Jelinek + + PR tree-optimization/60971 + * tree-tailcall.c (process_assignment): Reject conversions which + reduce precision. + +2014-04-29 Nick Clifton + + * config/msp430/msp430.md (umulsidi): Fix typo. + (mulhisi3): Enable even inside interrupt handlers. + * config/msp430/msp430.c (msp430_print_operand): %O: Allow for the + bigger return address pushed in large mode. + +2014-04-28 Pat Haugen + + * config/rs6000/sync.md (AINT mode_iterator): Move definition. + (loadsync_): Change mode. + (load_quadpti, store_quadpti): New. + (atomic_load, atomic_store): Add support for TI mode. + * config/rs6000/rs6000.md (unspec enum): Add UNSPEC_LSQ. + +2014-04-28 Eric Botcazou + + * configure.ac: Tweak GAS check for LEON instructions on SPARC. + * configure: Regenerate. + * config/sparc/sparc.opt (muser-mode): New option. + * config/sparc/sync.md (atomic_compare_and_swap_1): Do not enable + for LEON3. + (atomic_compare_and_swap_leon3_1): New instruction for LEON3. + * doc/invoke.texi (SPARC options): Document -muser-mode. + +2014-04-26 Markus Trippelsdorf + + * doc/install.texi (Building with profile feedback): Remove + outdated sentence. + +2014-04-26 Tom de Vries + + * config/i386/i386.md (define_expand "ldexpxf3"): Fix out-of-bounds + array accesses. + +2014-04-25 Jakub Jelinek + + PR tree-optimization/60960 + * tree-vect-generic.c (expand_vector_operation): Only call + expand_vector_divmod if type's mode satisfies VECTOR_MODE_P. + +2014-04-25 Eric Botcazou + + PR target/60941 + * config/sparc/sparc.md (ashlsi3_extend): Delete. + +2014-04-25 Richard Biener + + PR ipa/60912 + * tree-ssa-structalias.c (ipa_pta_execute): Compute direct + call stmt use/clobber sets during stmt walk instead of + walking the possibly incomplete set of caller edges. + +2014-04-25 Richard Biener + + PR ipa/60911 + * passes.c (apply_ipa_transforms): Inline into only caller ... + (execute_one_pass): ... here. Properly bring in function + bodies for nodes we want to apply IPA transforms to. + +2014-04-24 Jakub Jelinek + + * tree.h (OMP_CLAUSE_LINEAR_GIMPLE_SEQ): Define. + * gimplify.c (omp_is_private): Change last argument's type to int. + Only diagnose lastprivate if the simd argument is 1, only diagnose + linear if the simd argument is 2. + (gimplify_omp_for): Adjust omp_is_private callers. When adding + lastprivate or private, add the clause to OMP_FOR_CLAUSES. Pass + GOVD_EXPLICIT to omp_add_variable. For simd with collapse == 1 + create OMP_CLAUSE_LINEAR rather than OMP_CLAUSE_PRIVATE for var. + If var != decl and decl is in OMP_CLAUSE_LINEAR, gimplify decl + increment to OMP_CLAUSE_LINEAR_GIMPLE_SEQ. + * omp-low.c (scan_sharing_clauses, lower_lastprivate_clauses): Handle + OMP_CLAUSE_LINEAR_GIMPLE_SEQ. + * tree-nested.c (convert_nonlocal_omp_clauses, + convert_local_omp_clauses): Handle OMP_CLAUSE_LINEAR. + +2014-04-23 Uros Bizjak + + Backport from mainline + 2014-04-21 Uros Bizjak + + PR target/60909 + * config/i386/i386.c (ix86_expand_builtin) + : Use temporary + register for target RTX. + : Ditto. + +2014-04-23 Richard Biener + + PR tree-optimization/60903 + * tree-ssa-loop-im.c (analyze_memory_references): Remove + commented code block. + (execute_sm_if_changed): Properly apply IRREDUCIBLE_LOOP + loop flags to newly created BBs and edges. + +2014-04-23 Nick Clifton + + * config/msp430/msp430.c (msp430_handle_option): Move function + to msp430-common.c + (msp430_option_override): Simplify mcu and mcpu option handling. + (msp430_is_f5_mcu): Rename to msp430_use_f5_series_hwmult. Add + support for -mhwmult command line option. + (has_32bit_hwmult): Rename to use_32bit_hwmult. Add support for + -mhwmult command line option. + (msp430_hwmult_enabled): Delete. + (msp43o_output_labelref): Add support for -mhwmult command line + option. + * config/msp430/msp430.md (mulhisi3, umulhisi3, mulsidi3) + (umulsidi3): Likewise. + * config/msp430/msp430.opt (mmcu): Add Report attribute. + (mcpu, mlarge, msmall): Likewise. + (mhwmult): New option. + * config/msp430/msp430-protos.h (msp430_hwmult_enabled): Remove + prototype. + (msp430_is_f5_mcu): Remove prototype. + (msp430_use_f5_series_hwmult): Add prototype. + * config/msp430/msp430-opts.h: New file. + * common/config/msp430: New directory. + * common/config/msp430/msp430-common.c: New file. + * config.gcc (msp430): Remove target_has_targetm_common. + * doc/invoke.texi: Document -mhwmult command line option. + +2014-04-23 Nick Clifton + + * config/i386/cygwin.h (ENDFILE_SPEC): Include + default-manifest.o if it can be found in the search path. + * config/i386/mingw32.h (ENDFILE_SPEC): Likewise. + +2014-04-23 Richard Biener + + Backport from mainline + 2014-04-14 Richard Biener + + PR lto/60720 + * lto-streamer-out.c (wrap_refs): New function. + (lto_output): Wrap symbol references in global initializes in + type-preserving MEM_REFs. + +2014-04-23 Richard Biener + + PR middle-end/60895 + * tree-inline.c (declare_return_variable): Use mark_addressable. + +2014-04-23 Richard Biener + + PR middle-end/60891 + * loop-init.c (loop_optimizer_init): Make sure to apply + LOOPS_MAY_HAVE_MULTIPLE_LATCHES before fixing up loops. + +2014-04-22 Michael Meissner + + Backport from mainline + 2014-04-21 Michael Meissner + + PR target/60735 + * config/rs6000/rs6000.md (mov_softfloat32, FMOVE64 case): + If mode is DDmode and TARGET_E500_DOUBLE allow move. + + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some + more debug information for E500 if -mdebug=reg. + +2014-04-22 H.J. Lu + + Backport from mainline + 2014-04-22 H.J. Lu + + PR target/60868 + * config/i386/i386.c (ix86_expand_set_or_movmem): Call counter_mode + on count_exp to get mode. + +2014-04-22 Bill Schmidt + + * config/rs6000/vsx.md (vsx_xxmrghw_): Adjust for + little-endian. + (vsx_xxmrglw_): Likewise. + 2014-04-22 Richard Biener Backport from mainline @@ -153,8 +534,7 @@ 2014-04-11 Tobias Burnus PR other/59055 - * doc/bugreport.texi (Bugs): Remove nodes pointing to the - nirvana. + * doc/bugreport.texi (Bugs): Remove nodes pointing to the nirvana. * doc/gcc.texi (Service): Update description in the @menu * doc/invoke.texi (Option Summary): Remove misplaced and duplicated @menu. @@ -180,15 +560,14 @@ 2014-04-11 Jakub Jelinek PR rtl-optimization/60663 - * cse.c (cse_insn): Set src_volatile on ASM_OPERANDS in - PARALLEL. + * cse.c (cse_insn): Set src_volatile on ASM_OPERANDS in PARALLEL. 2014-04-10 Jan Hubicka Jakub Jelinek PR lto/60567 - * ipa.c (function_and_variable_visibility): Copy forced_by_abi flag from - decl_node to node. + * ipa.c (function_and_variable_visibility): Copy forced_by_abi + flag from decl_node to node. 2014-04-10 Ramana Radhakrishnan @@ -306,9 +685,10 @@ 2014-04-05 Pitchumani Sivanupandi - * config/avr/avr-arch.h (avr_mcu_t): Add dev_attribute field to have device - specific ISA/ feature information. Remove short_sp and errata_skip ds. - Add avr_device_specific_features enum to have device specific info. + * config/avr/avr-arch.h (avr_mcu_t): Add dev_attribute field to have + device specific ISA/ feature information. Remove short_sp and + errata_skip ds. Add avr_device_specific_features enum to have device + specific info. * config/avr/avr-c.c (avr_cpu_cpp_builtins): use dev_attribute to check errata_skip. Add __AVR_ISA_RMW__ builtin macro if RMW ISA available. * config/avr/avr-devices.c (avr_mcu_types): Update AVR_MCU macro for @@ -376,21 +756,21 @@ 2014-04-04 Martin Jambor PR ipa/60640 - * cgraph.h (cgraph_clone_node): New parameter added to declaration. - Adjust all callers. + * cgraph.h (cgraph_clone_node): New parameter added to declaration. + Adjust all callers. * cgraph.c (clone_of_p): Also return true if thunks match. (verify_edge_corresponds_to_fndecl): Removed extraneous call to cgraph_function_or_thunk_node and an obsolete comment. - * cgraphclones.c (build_function_type_skip_args): Moved upwards in the - file. - (build_function_decl_skip_args): Likewise. + * cgraphclones.c (build_function_type_skip_args): Moved upwards in the + file. + (build_function_decl_skip_args): Likewise. (set_new_clone_decl_and_node_flags): New function. - (duplicate_thunk_for_node): Likewise. - (redirect_edge_duplicating_thunks): Likewise. - (cgraph_clone_node): New parameter args_to_skip, pass it to - redirect_edge_duplicating_thunks which is called instead of - cgraph_redirect_edge_callee. - (cgraph_create_virtual_clone): Pass args_to_skip to cgraph_clone_node, + (duplicate_thunk_for_node): Likewise. + (redirect_edge_duplicating_thunks): Likewise. + (cgraph_clone_node): New parameter args_to_skip, pass it to + redirect_edge_duplicating_thunks which is called instead of + cgraph_redirect_edge_callee. + (cgraph_create_virtual_clone): Pass args_to_skip to cgraph_clone_node, moved setting of a lot of flags to set_new_clone_decl_and_node_flags. 2014-04-04 Jeff Law @@ -428,8 +808,8 @@ PR tree-optimization/60505 * tree-vectorizer.h (struct _stmt_vec_info): Add th field as the - threshold of number of iterations below which no vectorization will be - done. + threshold of number of iterations below which no vectorization + will be done. * tree-vect-loop.c (new_loop_vec_info): Initialize LOOP_VINFO_COST_MODEL_THRESHOLD. * tree-vect-loop.c (vect_analyze_loop_operations): @@ -441,8 +821,7 @@ 2014-04-03 Richard Biener - * tree-streamer.h (struct streamer_tree_cache_d): Add next_idx - member. + * tree-streamer.h (struct streamer_tree_cache_d): Add next_idx member. (streamer_tree_cache_create): Adjust. * tree-streamer.c (streamer_tree_cache_add_to_node_array): Adjust to allow optional nodes array. @@ -453,8 +832,7 @@ * lto-streamer-out.c (create_output_block): Avoid maintaining the node array in the writer cache. (DFS_write_tree): Remove assertion. - (produce_asm_for_decls): Free the out decl state hash table - early. + (produce_asm_for_decls): Free the out decl state hash table early. * lto-streamer-in.c (lto_data_in_create): Adjust for streamer_tree_cache_create prototype change. @@ -475,24 +853,6 @@ (Weffc++): Remove Scott's numbering, merge lists and reference Wnon-virtual-dtor. - c-family/ - - cp/ - * class.c (accessible_nvdtor_p): New. - (check_bases): Don't check base destructor here ... - (check_bases_and_members): ... check them here. Trigger on - Wnon-virtual-dtor flag. - (finish_struct_1): Use accessible_nvdtor_p. - - testsuite/ - * g++.dg/warn/Wnvdtor.C: Add non-polymorphic case. - * g++.dg/warn/Wnvdtor-2.C: New. - * g++.dg/warn/Wnvdtor-3.C: New. - * g++.dg/warn/Wnvdtor-4.C: New. - * g++.dg/warn/Weff1.C: Delete. - * g++.old-deja/g++.benjamin/15309-1.C: Delete. - * g++.old-deja/g++.benjamin/15309-2.C: Delete. - 2014-04-03 Nick Clifton * config/rl78/rl78-expand.md (movqi): Handle (SUBREG (SYMBOL_REF)) @@ -508,8 +868,8 @@ 2014-04-02 Jan Hubicka PR ipa/60659 - * ipa-devirt.c (get_polymorphic_call_info): Do not ICE on type inconsistent - code and instead mark the context inconsistent. + * ipa-devirt.c (get_polymorphic_call_info): Do not ICE on type + inconsistent code and instead mark the context inconsistent. (possible_polymorphic_call_targets): For inconsistent contexts return empty complete list. @@ -613,8 +973,7 @@ 2014-04-01 Richard Biener - * gimple.h (struct gimple_statement_base): Align subcode to - 16 bits. + * gimple.h (struct gimple_statement_base): Align subcode to 16 bits. 2014-04-01 Sebastian Huber diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 50894d1..d43065a 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20140422 +20140505 diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index f5e7179..5f4a207 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,15 @@ +2014-04-24 Jakub Jelinek + + * c-parser.c (c_parser_omp_atomic): Allow seq_cst before + atomic-clause, allow comma in between atomic-clause and + seq_cst. + +2014-04-22 Jakub Jelinek + + PR c/59073 + * c-parser.c (c_parser_omp_parallel): If c_parser_omp_for + fails, don't set OM_PARALLEL_COMBINED and return NULL. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/gcc/c/c-parser.c b/gcc/c/c-parser.c index 5653e49..6eb235c 100644 --- a/gcc/c/c-parser.c +++ b/gcc/c/c-parser.c @@ -11198,6 +11198,18 @@ c_parser_omp_atomic (location_t loc, c_parser *parser) if (c_parser_next_token_is (parser, CPP_NAME)) { const char *p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value); + if (!strcmp (p, "seq_cst")) + { + seq_cst = true; + c_parser_consume_token (parser); + if (c_parser_next_token_is (parser, CPP_COMMA) + && c_parser_peek_2nd_token (parser)->type == CPP_NAME) + c_parser_consume_token (parser); + } + } + if (c_parser_next_token_is (parser, CPP_NAME)) + { + const char *p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value); if (!strcmp (p, "read")) code = OMP_ATOMIC_READ; @@ -11212,13 +11224,21 @@ c_parser_omp_atomic (location_t loc, c_parser *parser) if (p) c_parser_consume_token (parser); } - if (c_parser_next_token_is (parser, CPP_NAME)) + if (!seq_cst) { - const char *p = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value); - if (!strcmp (p, "seq_cst")) + if (c_parser_next_token_is (parser, CPP_COMMA) + && c_parser_peek_2nd_token (parser)->type == CPP_NAME) + c_parser_consume_token (parser); + + if (c_parser_next_token_is (parser, CPP_NAME)) { - seq_cst = true; - c_parser_consume_token (parser); + const char *p + = IDENTIFIER_POINTER (c_parser_peek_token (parser)->value); + if (!strcmp (p, "seq_cst")) + { + seq_cst = true; + c_parser_consume_token (parser); + } } } c_parser_skip_to_pragma_eol (parser); @@ -12208,10 +12228,12 @@ c_parser_omp_parallel (location_t loc, c_parser *parser, if (!flag_openmp) /* flag_openmp_simd */ return c_parser_omp_for (loc, parser, p_name, mask, cclauses); block = c_begin_omp_parallel (); - c_parser_omp_for (loc, parser, p_name, mask, cclauses); + tree ret = c_parser_omp_for (loc, parser, p_name, mask, cclauses); stmt = c_finish_omp_parallel (loc, cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL], block); + if (ret == NULL_TREE) + return ret; OMP_PARALLEL_COMBINED (stmt) = 1; return stmt; } diff --git a/gcc/common/config/msp430/msp430-common.c b/gcc/common/config/msp430/msp430-common.c new file mode 100644 index 0000000..fc2c1f2 --- /dev/null +++ b/gcc/common/config/msp430/msp430-common.c @@ -0,0 +1,91 @@ +/* Common hooks for Texas Instruments MSP430. + Copyright (C) 2014 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "diagnostic-core.h" +#include "tm.h" +#include "common/common-target.h" +#include "common/common-target-def.h" +#include "opts.h" +#include "flags.h" + +/* Handle -mcpu= and -mmcu= here. We want to ensure that only one + of these two options - the last specified on the command line - + is passed on to the msp430 backend. */ + +static bool +msp430_handle_option (struct gcc_options *opts ATTRIBUTE_UNUSED, + struct gcc_options *opts_set ATTRIBUTE_UNUSED, + const struct cl_decoded_option *decoded, + location_t loc ATTRIBUTE_UNUSED) +{ + switch (decoded->opt_index) + { + case OPT_mcpu_: + if (strcasecmp (decoded->arg, "msp430x") == 0 + || strcasecmp (decoded->arg, "msp430xv2") == 0 + || strcasecmp (decoded->arg, "430x") == 0 + || strcasecmp (decoded->arg, "430xv2") == 0) + { + target_cpu = "msp430x"; + target_mcu = NULL; + } + else if (strcasecmp (decoded->arg, "msp430") == 0 + || strcasecmp (decoded->arg, "430") == 0) + { + target_cpu = "msp430"; + target_mcu = NULL; + } + else + { + error ("unrecognised argument of -mcpu: %s", decoded->arg); + return false; + } + break; + + case OPT_mmcu_: + /* For backwards compatibility we recognise two generic MCU + 430X names. However we want to be able to generate special C + preprocessor defines for them, which is why we set target_mcu + to NULL. */ + if (strcasecmp (decoded->arg, "msp430") == 0) + { + target_cpu = "msp430"; + target_mcu = NULL; + } + else if (strcasecmp (decoded->arg, "msp430x") == 0 + || strcasecmp (decoded->arg, "msp430xv2") == 0) + { + target_cpu = "msp430x"; + target_mcu = NULL; + } + else + target_cpu = NULL; + break; + } + + return true; +} + +#undef TARGET_HANDLE_OPTION +#define TARGET_HANDLE_OPTION msp430_handle_option + +struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; diff --git a/gcc/config.gcc b/gcc/config.gcc index 3c55c88..37d3e14 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -2131,7 +2131,6 @@ msp430*-*-*) tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file}" c_target_objs="msp430-c.o" cxx_target_objs="msp430-c.o" - target_has_targetm_common=no tmake_file="${tmake_file} msp430/t-msp430" ;; nds32le-*-*) diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 7962aa4..2fd6df4 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -32,7 +32,7 @@ else \ builtin_define ("__AARCH64EL__"); \ \ - if (!TARGET_GENERAL_REGS_ONLY) \ + if (TARGET_SIMD) \ builtin_define ("__ARM_NEON"); \ \ switch (aarch64_cmodel) \ @@ -83,9 +83,9 @@ #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) /* AdvSIMD is supported in the default configuration, unless disabled by - -mgeneral-regs-only. */ -#define TARGET_SIMD !TARGET_GENERAL_REGS_ONLY -#define TARGET_FLOAT !TARGET_GENERAL_REGS_ONLY + -mgeneral-regs-only or by the +nosimd extension. */ +#define TARGET_SIMD (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_SIMD) +#define TARGET_FLOAT (!TARGET_GENERAL_REGS_ONLY && AARCH64_ISA_FP) #define UNITS_PER_WORD 8 @@ -185,8 +185,8 @@ extern unsigned long aarch64_isa_flags; extern unsigned long aarch64_tune_flags; #define AARCH64_TUNE_SLOWMUL (aarch64_tune_flags & AARCH64_FL_SLOWMUL) -/* Crypto is an optional feature. */ -#define TARGET_CRYPTO AARCH64_ISA_CRYPTO +/* Crypto is an optional extension to AdvSIMD. */ +#define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO) /* Standard register usage. */ diff --git a/gcc/config/i386/cygwin.h b/gcc/config/i386/cygwin.h index f7b9a28..165d3aa 100644 --- a/gcc/config/i386/cygwin.h +++ b/gcc/config/i386/cygwin.h @@ -45,6 +45,7 @@ along with GCC; see the file COPYING3. If not see #undef ENDFILE_SPEC #define ENDFILE_SPEC \ "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s}\ + %{!shared:%:if-exists(default-manifest.o%s)}\ crtend.o%s" /* Normally, -lgcc is not needed since everything in it is in the DLL, but we diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 3eefe4a..ef18f24 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -24390,7 +24390,8 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp, if (jump_around_label == NULL_RTX) jump_around_label = gen_label_rtx (); emit_cmp_and_jump_insns (count_exp, GEN_INT (dynamic_check - 1), - LEU, 0, GET_MODE (count_exp), 1, hot_label); + LEU, 0, counter_mode (count_exp), + 1, hot_label); predict_jump (REG_BR_PROB_BASE * 90 / 100); if (issetmem) set_storage_via_libcall (dst, count_exp, val_exp, false); @@ -35406,7 +35407,8 @@ rdrand_step: else op2 = gen_rtx_SUBREG (SImode, op0, 0); - if (target == 0) + if (target == 0 + || !register_operand (target, SImode)) target = gen_reg_rtx (SImode); pat = gen_rtx_GEU (VOIDmode, gen_rtx_REG (CCCmode, FLAGS_REG), @@ -35448,7 +35450,8 @@ rdseed_step: const0_rtx); emit_insn (gen_rtx_SET (VOIDmode, op2, pat)); - if (target == 0) + if (target == 0 + || !register_operand (target, SImode)) target = gen_reg_rtx (SImode); emit_insn (gen_zero_extendqisi2 (target, op2)); diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 25e2e93..9f103cf 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -14427,15 +14427,16 @@ "TARGET_USE_FANCY_MATH_387 && flag_unsafe_math_optimizations" { + rtx tmp1, tmp2; if (optimize_insn_for_size_p ()) FAIL; - operands[3] = gen_reg_rtx (XFmode); - operands[4] = gen_reg_rtx (XFmode); + tmp1 = gen_reg_rtx (XFmode); + tmp2 = gen_reg_rtx (XFmode); - emit_insn (gen_floatsixf2 (operands[3], operands[2])); - emit_insn (gen_fscalexf4_i387 (operands[0], operands[4], - operands[1], operands[3])); + emit_insn (gen_floatsixf2 (tmp1, operands[2])); + emit_insn (gen_fscalexf4_i387 (operands[0], tmp2, + operands[1], tmp1)); DONE; }) diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index f563820..4cfd5f0 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -148,6 +148,7 @@ along with GCC; see the file COPYING3. If not see #undef ENDFILE_SPEC #define ENDFILE_SPEC \ "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} \ + %{!shared:%:if-exists(default-manifest.o%s)}\ crtend.o%s" /* Override startfile prefix defaults. */ diff --git a/gcc/config/msp430/msp430-opts.h b/gcc/config/msp430/msp430-opts.h new file mode 100644 index 0000000..119cfcb --- /dev/null +++ b/gcc/config/msp430/msp430-opts.h @@ -0,0 +1,32 @@ +/* GCC option-handling definitions for the TI MSP430 + Copyright (C) 2014 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + . */ + +#ifndef MSP430_OPTS_H +#define MSP430_OPTS_H + +enum msp430_hwmult_types +{ + NONE, + AUTO, + SMALL, + LARGE, + F5SERIES +}; + +#endif diff --git a/gcc/config/msp430/msp430-protos.h b/gcc/config/msp430/msp430-protos.h index 7f999ab..f0b8aea 100644 --- a/gcc/config/msp430/msp430-protos.h +++ b/gcc/config/msp430/msp430-protos.h @@ -30,11 +30,9 @@ const char * msp430x_extendhisi (rtx *); void msp430_fixup_compare_operands (enum machine_mode, rtx *); int msp430_hard_regno_mode_ok (int, enum machine_mode); int msp430_hard_regno_nregs (int, enum machine_mode); -bool msp430_hwmult_enabled (void); rtx msp430_incoming_return_addr_rtx (void); void msp430_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int); int msp430_initial_elimination_offset (int, int); -bool msp430_is_f5_mcu (void); bool msp430_is_interrupt_func (void); const char * msp430x_logical_shift_right (rtx); const char * msp430_mcu_name (void); @@ -45,5 +43,6 @@ rtx msp430_return_addr_rtx (int); void msp430_split_movsi (rtx *); void msp430_start_function (FILE *, const char *, tree); rtx msp430_subreg (enum machine_mode, rtx, enum machine_mode, int); +bool msp430_use_f5_series_hwmult (void); #endif /* GCC_MSP430_PROTOS_H */ diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c index 80a17a6..c844aa2 100644 --- a/gcc/config/msp430/msp430.c +++ b/gcc/config/msp430/msp430.c @@ -95,18 +95,6 @@ msp430_init_machine_status (void) return m; } -#undef TARGET_HANDLE_OPTION -#define TARGET_HANDLE_OPTION msp430_handle_option - -bool -msp430_handle_option (struct gcc_options *opts ATTRIBUTE_UNUSED, - struct gcc_options *opts_set ATTRIBUTE_UNUSED, - const struct cl_decoded_option *decoded ATTRIBUTE_UNUSED, - location_t loc ATTRIBUTE_UNUSED) -{ - return true; -} - #undef TARGET_OPTION_OVERRIDE #define TARGET_OPTION_OVERRIDE msp430_option_override @@ -196,19 +184,14 @@ msp430_option_override (void) if (target_cpu) { - if (strcasecmp (target_cpu, "msp430x") == 0 - || strcasecmp (target_cpu, "msp430xv2") == 0 - || strcasecmp (target_cpu, "430x") == 0 - || strcasecmp (target_cpu, "430xv2") == 0) + if (strcasecmp (target_cpu, "msp430x") == 0) msp430x = true; - else if (strcasecmp (target_cpu, "msp430") == 0 - || strcasecmp (target_cpu, "430") == 0) + else /* target_cpu == "msp430" - already handled by the front end. */ msp430x = false; - else - error ("unrecognised argument of -mcpu: %s", target_cpu); } - - if (target_mcu) + /* Note - the front end has already ensured at most + one of target_cpu and target_mcu will be set. */ + else if (target_mcu) { int i; @@ -217,25 +200,12 @@ msp430_option_override (void) supports 430. */ msp430x = true; - /* For backwards compatibility we recognise two generic MCU - 430X names. However we want to be able to generate special C - preprocessor defines for them, which is why we set target_mcu - to NULL. */ - if (strcasecmp (target_mcu, "msp430") == 0) - { - msp430x = false; - target_mcu = NULL; - } - else if (strcasecmp (target_mcu, "msp430x") == 0 - || strcasecmp (target_mcu, "msp430xv2") == 0) - target_mcu = NULL; - else - for (i = ARRAY_SIZE (msp430_mcu_names); i--;) - if (strcasecmp (msp430_mcu_names[i], target_mcu) == 0) - { - msp430x = false; - break; - } + for (i = ARRAY_SIZE (msp430_mcu_names); i--;) + if (strcasecmp (msp430_mcu_names[i], target_mcu) == 0) + { + msp430x = false; + break; + } /* It is not an error if we do not match the MCU name. There are hundreds of them. */ } @@ -1847,16 +1817,20 @@ static const struct /* Returns true if the current MCU is an F5xxx series. */ bool -msp430_is_f5_mcu (void) +msp430_use_f5_series_hwmult (void) { - if (target_mcu == NULL) + if (msp430_hwmult_type == F5SERIES) + return true; + + if (target_mcu == NULL || msp430_hwmult_type != AUTO) return false; + return strncasecmp (target_mcu, "msp430f5", 8) == 0; } /* Returns true id the current MCU has a second generation 32-bit hardware multiplier. */ static bool -has_32bit_hw_mult (void) +use_32bit_hwmult (void) { static const char * known_32bit_mult_mcus [] = { @@ -1868,7 +1842,11 @@ has_32bit_hw_mult (void) "msp430f47177", "msp430f47187", "msp430f47197" }; int i; - if (target_mcu == NULL) + + if (msp430_hwmult_type == LARGE) + return true; + + if (target_mcu == NULL || msp430_hwmult_type != AUTO) return false; for (i = ARRAY_SIZE (known_32bit_mult_mcus); i--;) @@ -1878,25 +1856,6 @@ has_32bit_hw_mult (void) return false; } -/* Returns true if hardware multiply is supported by the chosen MCU. */ -bool -msp430_hwmult_enabled (void) -{ - if (target_mcu == NULL) - return false; - - if (!ENABLE_HWMULT) - return false; - - if (msp430_is_interrupt_func ()) - return false; - - if (msp430_is_f5_mcu () || has_32bit_hw_mult ()) - return true; - - return false; -} - /* This function does the same as the default, but it will replace GCC function names with the MSPABI-specified ones. */ void @@ -1913,20 +1872,20 @@ msp430_output_labelref (FILE *file, const char *name) /* If we have been given a specific MCU name then we may be able to make use of its hardware multiply capabilities. */ - if (msp430_hwmult_enabled ()) + if (msp430_hwmult_type != NONE) { if (strcmp ("__mspabi_mpyi", name) == 0) { - if (msp430_is_f5_mcu ()) + if (msp430_use_f5_series_hwmult ()) name = "__mulhi2_f5"; else name = "__mulhi2"; } else if (strcmp ("__mspabi_mpyl", name) == 0) { - if (msp430_is_f5_mcu ()) + if (msp430_use_f5_series_hwmult ()) name = "__mulsi2_f5"; - else if (has_32bit_hw_mult ()) + else if (use_32bit_hwmult ()) name = "__mulsi2_hw32"; else name = "__mulsi2"; @@ -2203,7 +2162,7 @@ msp430_print_operand (FILE * file, rtx op, int letter) because builtins are expanded before the frame layout is determined. */ fprintf (file, "%d", msp430_initial_elimination_offset (ARG_POINTER_REGNUM, STACK_POINTER_REGNUM) - - 2); + - (TARGET_LARGE ? 4 : 2)); return; case 'J': diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md index c0c97da..74a98b4 100644 --- a/gcc/config/msp430/msp430.md +++ b/gcc/config/msp430/msp430.md @@ -1321,12 +1321,12 @@ [(set (match_operand:SI 0 "register_operand" "=r") (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0")) (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))] - "optimize > 2 && msp430_hwmult_enabled ()" + "optimize > 2 && msp430_hwmult_type != NONE" "* - if (msp430_is_f5_mcu ()) - return \"MOV.W %1, &0x04C2 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0\"; + if (msp430_use_f5_series_hwmult ()) + return \"PUSH.W sr { DINT { MOV.W %1, &0x04C2 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0 { POP.W sr\"; else - return \"MOV.W %1, &0x0132 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0\"; + return \"PUSH.W sr { DINT { MOV.W %1, &0x0132 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0 { POP.W sr\"; " ) @@ -1334,12 +1334,12 @@ [(set (match_operand:SI 0 "register_operand" "=r") (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "%0")) (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))] - "optimize > 2 && msp430_hwmult_enabled ()" + "optimize > 2 && msp430_hwmult_type != NONE" "* - if (msp430_is_f5_mcu ()) - return \"MOV.W %1, &0x04C0 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0\"; + if (msp430_use_f5_series_hwmult ()) + return \"PUSH.W sr { DINT { MOV.W %1, &0x04C0 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0 { POP.W sr\"; else - return \"MOV.W %1, &0x0130 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0\"; + return \"PUSH.W sr { DINT { MOV.W %1, &0x0130 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0 { POP.W sr\"; " ) @@ -1347,12 +1347,12 @@ [(set (match_operand:DI 0 "register_operand" "=r") (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%0")) (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))] - "optimize > 2 && msp430_hwmult_enabled ()" + "optimize > 2 && msp430_hwmult_type != NONE" "* - if (msp430_is_f5_mcu ()) - return \"MOV.W %L1, &0x04D4 { MOV.W %H1, &0x04D6 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0\"; + if (msp430_use_f5_series_hwmult ()) + return \"PUSH.W sr { DINT { MOV.W %L1, &0x04D4 { MOV.W %H1, &0x04D6 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0 { POP.W sr\"; else - return \"MOV.W %L1, &0x0144 { MOV.W %H1, &0x0146 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0\"; + return \"PUSH.W sr { DINT { MOV.W %L1, &0x0144 { MOV.W %H1, &0x0146 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0 { POP.W sr\"; " ) @@ -1360,11 +1360,11 @@ [(set (match_operand:DI 0 "register_operand" "=r") (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0")) (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))] - "optimize > 2 && msp430_hwmult_enabled ()" + "optimize > 2 && msp430_hwmult_type != NONE" "* - if (msp430_is_f5_mcu ()) - return \"MOV.W %L1, &0x04D0 { MOV.W %H1, &0x04D2 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0\"; + if (msp430_use_f5_series_hwmult ()) + return \"PUSH.W sr { DINT { MOV.W %L1, &0x04D0 { MOV.W %H1, &0x04D2 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0 { POP.W sr\"; else - return \"MOV.W %L1, &0x0140 { MOV.W %H1, &0x0141 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0\"; + return \"PUSH.W sr { DINT { MOV.W %L1, &0x0140 { MOV.W %H1, &0x0142 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0 { POP.W sr\"; " ) diff --git a/gcc/config/msp430/msp430.opt b/gcc/config/msp430/msp430.opt index 5a447c0..8215013 100644 --- a/gcc/config/msp430/msp430.opt +++ b/gcc/config/msp430/msp430.opt @@ -7,19 +7,19 @@ Target Mask(ASM_HEX) Force assembly output to always use hex constants mmcu= -Target ToLower Joined RejectNegative Var(target_mcu) +Target Report ToLower Joined RejectNegative Var(target_mcu) Specify the MCU to build for. mcpu= -Target Joined RejectNegative Var(target_cpu) +Target Report Joined RejectNegative Var(target_cpu) Specify the ISA to build for: msp430, mdsp430x, msp430xv2 mlarge -Target Mask(LARGE) RejectNegative +Target Report Mask(LARGE) RejectNegative Select large model - 20-bit addresses/pointers msmall -Target InverseMask(LARGE) RejectNegative +Target Report InverseMask(LARGE) RejectNegative Select small model - 16-bit addresses/pointers (default) mrelax @@ -33,6 +33,27 @@ minrt Target Report Mask(MINRT) RejectNegative Use a minimum runtime (no static initializers or ctors) for memory-constrained devices. -mhwmult -Target Report Var(ENABLE_HWMULT, 1) Init(1) -Enable hardware multiply (except in interrupt routines) +HeaderInclude +config/msp430/msp430-opts.h + +mhwmult= +Target Joined RejectNegative Report ToLower Var(msp430_hwmult_type) Enum(msp430_hwmult_types) Init(AUTO) +Specify the type of hardware multiply to support + +Enum +Name(msp430_hwmult_types) Type(enum msp430_hwmult_types) + +EnumValue +Enum(msp430_hwmult_types) String(none) Value(NONE) + +EnumValue +Enum(msp430_hwmult_types) String(auto) Value(AUTO) + +EnumValue +Enum(msp430_hwmult_types) String(16bit) Value(SMALL) + +EnumValue +Enum(msp430_hwmult_types) String(32bit) Value(LARGE) + +EnumValue +Enum(msp430_hwmult_types) String(f5series) Value(F5SERIES) diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 674cb40..a8cfcb7 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -143,6 +143,9 @@ UNSPEC_VSUBEUQM UNSPEC_VSUBECUQ UNSPEC_VBPERMQ + UNSPEC_BCDADD + UNSPEC_BCDSUB + UNSPEC_BCD_OVERFLOW ]) (define_c_enum "unspecv" @@ -3334,3 +3337,112 @@ "vbpermq %0,%1,%2" [(set_attr "length" "4") (set_attr "type" "vecsimple")]) + +;; Decimal Integer operations +(define_int_iterator UNSPEC_BCD_ADD_SUB [UNSPEC_BCDADD UNSPEC_BCDSUB]) + +(define_int_attr bcd_add_sub [(UNSPEC_BCDADD "add") + (UNSPEC_BCDSUB "sub")]) + +(define_code_iterator BCD_TEST [eq lt gt unordered]) + +(define_insn "bcd" + [(set (match_operand:V1TI 0 "register_operand" "") + (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "") + (match_operand:V1TI 2 "register_operand" "") + (match_operand:QI 3 "const_0_to_1_operand" "")] + UNSPEC_BCD_ADD_SUB)) + (clobber (reg:CCFP 74))] + "TARGET_P8_VECTOR" + "bcd. %0,%1,%2,%3" + [(set_attr "length" "4") + (set_attr "type" "vecsimple")]) + +;; Use a floating point type (V2DFmode) for the compare to set CR6 so that we +;; can use the unordered test for BCD nans and add/subtracts that overflow. An +;; UNORDERED test on an integer type (like V1TImode) is not defined. The type +;; probably should be one that can go in the VMX (Altivec) registers, so we +;; can't use DDmode or DFmode. +(define_insn "*bcd_test" + [(set (reg:CCFP 74) + (compare:CCFP + (unspec:V2DF [(match_operand:V1TI 1 "register_operand" "v") + (match_operand:V1TI 2 "register_operand" "v") + (match_operand:QI 3 "const_0_to_1_operand" "i")] + UNSPEC_BCD_ADD_SUB) + (match_operand:V2DF 4 "zero_constant" "j"))) + (clobber (match_scratch:V1TI 0 "=v"))] + "TARGET_P8_VECTOR" + "bcd. %0,%1,%2,%3" + [(set_attr "length" "4") + (set_attr "type" "vecsimple")]) + +(define_insn "*bcd_test2" + [(set (match_operand:V1TI 0 "register_operand" "=v") + (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "v") + (match_operand:V1TI 2 "register_operand" "v") + (match_operand:QI 3 "const_0_to_1_operand" "i")] + UNSPEC_BCD_ADD_SUB)) + (set (reg:CCFP 74) + (compare:CCFP + (unspec:V2DF [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BCD_ADD_SUB) + (match_operand:V2DF 4 "zero_constant" "j")))] + "TARGET_P8_VECTOR" + "bcd. %0,%1,%2,%3" + [(set_attr "length" "4") + (set_attr "type" "vecsimple")]) + +(define_expand "bcd_" + [(parallel [(set (reg:CCFP 74) + (compare:CCFP + (unspec:V2DF [(match_operand:V1TI 1 "register_operand" "") + (match_operand:V1TI 2 "register_operand" "") + (match_operand:QI 3 "const_0_to_1_operand" "")] + UNSPEC_BCD_ADD_SUB) + (match_dup 4))) + (clobber (match_scratch:V1TI 5 ""))]) + (set (match_operand:SI 0 "register_operand" "") + (BCD_TEST:SI (reg:CCFP 74) + (const_int 0)))] + "TARGET_P8_VECTOR" +{ + operands[4] = CONST0_RTX (V2DFmode); +}) + +;; Peephole2 pattern to combine a bcdadd/bcdsub that calculates the value and +;; the bcdadd/bcdsub that tests the value. The combiner won't work since +;; CR6 is a hard coded register. Unfortunately, all of the Altivec predicate +;; support is hard coded to use the fixed register CR6 instead of creating +;; a register class for CR6. + +(define_peephole2 + [(parallel [(set (match_operand:V1TI 0 "register_operand" "") + (unspec:V1TI [(match_operand:V1TI 1 "register_operand" "") + (match_operand:V1TI 2 "register_operand" "") + (match_operand:QI 3 "const_0_to_1_operand" "")] + UNSPEC_BCD_ADD_SUB)) + (clobber (reg:CCFP 74))]) + (parallel [(set (reg:CCFP 74) + (compare:CCFP + (unspec:V2DF [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BCD_ADD_SUB) + (match_operand:V2DF 4 "zero_constant" ""))) + (clobber (match_operand:V1TI 5 "register_operand" ""))])] + "TARGET_P8_VECTOR" + [(parallel [(set (match_dup 0) + (unspec:V1TI [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BCD_ADD_SUB)) + (set (reg:CCFP 74) + (compare:CCFP + (unspec:V2DF [(match_dup 1) + (match_dup 2) + (match_dup 3)] + UNSPEC_BCD_ADD_SUB) + (match_dup 4)))])]) diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md index 8e99bc0..40e27e7 100644 --- a/gcc/config/rs6000/dfp.md +++ b/gcc/config/rs6000/dfp.md @@ -322,3 +322,72 @@ "TARGET_DFP" "dctfixq %0,%1" [(set_attr "type" "fp")]) + + +;; Decimal builtin support + +(define_c_enum "unspec" + [UNSPEC_DDEDPD + UNSPEC_DENBCD + UNSPEC_DXEX + UNSPEC_DIEX + UNSPEC_DSCLI + UNSPEC_DSCRI]) + +(define_mode_iterator D64_D128 [DD TD]) + +(define_mode_attr dfp_suffix [(DD "") + (TD "q")]) + +(define_insn "dfp_ddedpd_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") + (unspec:D64_D128 [(match_operand:QI 1 "const_0_to_3_operand" "i") + (match_operand:D64_D128 2 "gpc_reg_operand" "d")] + UNSPEC_DDEDPD))] + "TARGET_DFP" + "ddedpd %1,%0,%2" + [(set_attr "type" "fp")]) + +(define_insn "dfp_denbcd_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") + (unspec:D64_D128 [(match_operand:QI 1 "const_0_to_1_operand" "i") + (match_operand:D64_D128 2 "gpc_reg_operand" "d")] + UNSPEC_DENBCD))] + "TARGET_DFP" + "denbcd %1,%0,%2" + [(set_attr "type" "fp")]) + +(define_insn "dfp_dxex_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") + (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d")] + UNSPEC_DXEX))] + "TARGET_DFP" + "dxex %0,%1" + [(set_attr "type" "fp")]) + +(define_insn "dfp_diex_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") + (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d") + (match_operand:D64_D128 2 "gpc_reg_operand" "d")] + UNSPEC_DXEX))] + "TARGET_DFP" + "diex %0,%1,%2" + [(set_attr "type" "fp")]) + +(define_insn "dfp_dscli_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") + (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d") + (match_operand:QI 2 "immediate_operand" "i")] + UNSPEC_DSCLI))] + "TARGET_DFP" + "dscli %0,%1,%2" + [(set_attr "type" "fp")]) + +(define_insn "dfp_dscri_" + [(set (match_operand:D64_D128 0 "gpc_reg_operand" "=d") + (unspec:D64_D128 [(match_operand:D64_D128 1 "gpc_reg_operand" "d") + (match_operand:QI 2 "immediate_operand" "i")] + UNSPEC_DSCRI))] + "TARGET_DFP" + "dscri %0,%1,%2" + [(set_attr "type" "fp")]) diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 28f4f5d..8c384b3 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -171,6 +171,11 @@ (and (match_code "const_int") (match_test "IN_RANGE (INTVAL (op), 0, 1)"))) +;; Match op = 0..3. +(define_predicate "const_0_to_3_operand" + (and (match_code "const_int") + (match_test "IN_RANGE (INTVAL (op), 0, 3)"))) + ;; Match op = 2 or op = 3. (define_predicate "const_2_to_3_operand" (and (match_code "const_int") @@ -624,14 +629,14 @@ (match_test "offsettable_nonstrict_memref_p (op)"))) ;; Return 1 if the operand is suitable for load/store quad memory. -;; This predicate only checks for non-atomic loads/stores. +;; This predicate only checks for non-atomic loads/stores (not lqarx/stqcx). (define_predicate "quad_memory_operand" (match_code "mem") { rtx addr, op0, op1; int ret; - if (!TARGET_QUAD_MEMORY) + if (!TARGET_QUAD_MEMORY && !TARGET_SYNC_TI) ret = 0; else if (!memory_operand (op, mode)) diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 8335169..16793f5 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -570,6 +570,75 @@ MASK, /* MASK */ \ (ATTR | RS6000_BTC_SPECIAL), /* ATTR */ \ CODE_FOR_nothing) /* ICODE */ + + +/* Decimal floating point builtins for instructions. */ +#define BU_DFP_MISC_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_DFP, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_DFP_MISC_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_DFP, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + + +/* Miscellaneous builtins for instructions added in ISA 2.06. These + instructions don't require either the DFP or VSX options, just the basic ISA + 2.06 (popcntd) enablement since they operate on general purpose + registers. */ +#define BU_P7_MISC_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_1 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_POPCNTD, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_P7_MISC_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_POPCNTD, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + + +/* Miscellaneous builtins for instructions added in ISA 2.07. These + instructions do require the ISA 2.07 vector support, but they aren't vector + instructions. */ +#define BU_P8V_MISC_3(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_3 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_P8_VECTOR, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_TERNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +/* Miscellaneous builtins. */ +#define BU_MISC_1(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_ALWAYS, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_UNARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + +#define BU_MISC_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_ALWAYS, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + #endif /* Insure 0 is not a legitimate index. */ @@ -1412,10 +1481,10 @@ BU_P8V_AV_2 (ORC_V4SF, "orc_v4sf", CONST, orcv4sf3) BU_P8V_AV_2 (ORC_V2DF, "orc_v2df", CONST, orcv2df3) /* 3 argument altivec instructions added in ISA 2.07. */ -BU_P8V_AV_3 (VADDEUQM, "vaddeuqm", CONST, altivec_vaddeuqm) -BU_P8V_AV_3 (VADDECUQ, "vaddecuq", CONST, altivec_vaddecuq) -BU_P8V_AV_3 (VSUBEUQM, "vsubeuqm", CONST, altivec_vsubeuqm) -BU_P8V_AV_3 (VSUBECUQ, "vsubecuq", CONST, altivec_vsubecuq) +BU_P8V_AV_3 (VADDEUQM, "vaddeuqm", CONST, altivec_vaddeuqm) +BU_P8V_AV_3 (VADDECUQ, "vaddecuq", CONST, altivec_vaddecuq) +BU_P8V_AV_3 (VSUBEUQM, "vsubeuqm", CONST, altivec_vsubeuqm) +BU_P8V_AV_3 (VSUBECUQ, "vsubecuq", CONST, altivec_vsubecuq) /* Vector comparison instructions added in ISA 2.07. */ BU_P8V_AV_2 (VCMPEQUD, "vcmpequd", CONST, vector_eqv2di) @@ -1475,6 +1544,64 @@ BU_P8V_OVERLOAD_3 (VSUBECUQ, "vsubecuq") BU_P8V_OVERLOAD_3 (VSUBEUQM, "vsubeuqm") +/* 2 argument extended divide functions added in ISA 2.06. */ +BU_P7_MISC_2 (DIVWE, "divwe", CONST, dive_si) +BU_P7_MISC_2 (DIVWEO, "divweo", CONST, diveo_si) +BU_P7_MISC_2 (DIVWEU, "divweu", CONST, diveu_si) +BU_P7_MISC_2 (DIVWEUO, "divweuo", CONST, diveuo_si) +BU_P7_MISC_2 (DIVDE, "divde", CONST, dive_di) +BU_P7_MISC_2 (DIVDEO, "divdeo", CONST, diveo_di) +BU_P7_MISC_2 (DIVDEU, "divdeu", CONST, diveu_di) +BU_P7_MISC_2 (DIVDEUO, "divdeuo", CONST, diveuo_di) + +/* 1 argument DFP (decimal floating point) functions added in ISA 2.05. */ +BU_DFP_MISC_1 (DXEX, "dxex", CONST, dfp_dxex_dd) +BU_DFP_MISC_1 (DXEXQ, "dxexq", CONST, dfp_dxex_td) + +/* 2 argument DFP (decimal floating point) functions added in ISA 2.05. */ +BU_DFP_MISC_2 (DDEDPD, "ddedpd", CONST, dfp_ddedpd_dd) +BU_DFP_MISC_2 (DDEDPDQ, "ddedpdq", CONST, dfp_ddedpd_td) +BU_DFP_MISC_2 (DENBCD, "denbcd", CONST, dfp_denbcd_dd) +BU_DFP_MISC_2 (DENBCDQ, "denbcdq", CONST, dfp_denbcd_td) +BU_DFP_MISC_2 (DIEX, "diex", CONST, dfp_diex_dd) +BU_DFP_MISC_2 (DIEXQ, "diexq", CONST, dfp_diex_td) +BU_DFP_MISC_2 (DSCLI, "dscli", CONST, dfp_dscli_dd) +BU_DFP_MISC_2 (DSCLIQ, "dscliq", CONST, dfp_dscli_td) +BU_DFP_MISC_2 (DSCRI, "dscri", CONST, dfp_dscri_dd) +BU_DFP_MISC_2 (DSCRIQ, "dscriq", CONST, dfp_dscri_td) + +/* 1 argument BCD functions added in ISA 2.06. */ +BU_P7_MISC_1 (CDTBCD, "cdtbcd", CONST, cdtbcd) +BU_P7_MISC_1 (CBCDTD, "cbcdtd", CONST, cbcdtd) + +/* 2 argument BCD functions added in ISA 2.06. */ +BU_P7_MISC_2 (ADDG6S, "addg6s", CONST, addg6s) + +/* 3 argument BCD functions added in ISA 2.07. */ +BU_P8V_MISC_3 (BCDADD, "bcdadd", CONST, bcdadd) +BU_P8V_MISC_3 (BCDADD_LT, "bcdadd_lt", CONST, bcdadd_lt) +BU_P8V_MISC_3 (BCDADD_EQ, "bcdadd_eq", CONST, bcdadd_eq) +BU_P8V_MISC_3 (BCDADD_GT, "bcdadd_gt", CONST, bcdadd_gt) +BU_P8V_MISC_3 (BCDADD_OV, "bcdadd_ov", CONST, bcdadd_unordered) +BU_P8V_MISC_3 (BCDSUB, "bcdsub", CONST, bcdsub) +BU_P8V_MISC_3 (BCDSUB_LT, "bcdsub_lt", CONST, bcdsub_lt) +BU_P8V_MISC_3 (BCDSUB_EQ, "bcdsub_eq", CONST, bcdsub_eq) +BU_P8V_MISC_3 (BCDSUB_GT, "bcdsub_gt", CONST, bcdsub_gt) +BU_P8V_MISC_3 (BCDSUB_OV, "bcdsub_ov", CONST, bcdsub_unordered) + +/* 2 argument pack/unpack 128-bit floating point types. */ +BU_DFP_MISC_2 (PACK_TD, "pack_dec128", CONST, packtd) +BU_DFP_MISC_2 (UNPACK_TD, "unpack_dec128", CONST, unpacktd) + +BU_MISC_2 (PACK_TF, "pack_longdouble", CONST, packtf) +BU_MISC_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf) +BU_MISC_1 (UNPACK_TF_0, "longdouble_dw0", CONST, unpacktf_0) +BU_MISC_1 (UNPACK_TF_1, "longdouble_dw1", CONST, unpacktf_1) + +BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti) +BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti) + + /* 1 argument crypto functions. */ BU_CRYPTO_1 (VSBOX, "vsbox", CONST, crypto_vsbox) diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 494efc5..f4b34a2 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -2283,6 +2283,24 @@ rs6000_debug_reg_global (void) if (rs6000_float_gprs) fprintf (stderr, DEBUG_FMT_S, "float_gprs", "true"); + fprintf (stderr, DEBUG_FMT_S, "fprs", + (TARGET_FPRS ? "true" : "false")); + + fprintf (stderr, DEBUG_FMT_S, "single_float", + (TARGET_SINGLE_FLOAT ? "true" : "false")); + + fprintf (stderr, DEBUG_FMT_S, "double_float", + (TARGET_DOUBLE_FLOAT ? "true" : "false")); + + fprintf (stderr, DEBUG_FMT_S, "soft_float", + (TARGET_SOFT_FLOAT ? "true" : "false")); + + fprintf (stderr, DEBUG_FMT_S, "e500_single", + (TARGET_E500_SINGLE ? "true" : "false")); + + fprintf (stderr, DEBUG_FMT_S, "e500_double", + (TARGET_E500_DOUBLE ? "true" : "false")); + if (TARGET_LINK_STACK) fprintf (stderr, DEBUG_FMT_S, "link_stack", "true"); @@ -3017,7 +3035,8 @@ rs6000_builtin_mask_calculate (void) | ((rs6000_cpu == PROCESSOR_CELL) ? RS6000_BTM_CELL : 0) | ((TARGET_P8_VECTOR) ? RS6000_BTM_P8_VECTOR : 0) | ((TARGET_CRYPTO) ? RS6000_BTM_CRYPTO : 0) - | ((TARGET_HTM) ? RS6000_BTM_HTM : 0)); + | ((TARGET_HTM) ? RS6000_BTM_HTM : 0) + | ((TARGET_DFP) ? RS6000_BTM_DFP : 0)); } /* Override command line options. Mostly we process the processor type and @@ -12381,7 +12400,15 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) } } else if (icode == CODE_FOR_vsx_set_v2df - || icode == CODE_FOR_vsx_set_v2di) + || icode == CODE_FOR_vsx_set_v2di + || icode == CODE_FOR_bcdadd + || icode == CODE_FOR_bcdadd_lt + || icode == CODE_FOR_bcdadd_eq + || icode == CODE_FOR_bcdadd_gt + || icode == CODE_FOR_bcdsub + || icode == CODE_FOR_bcdsub_lt + || icode == CODE_FOR_bcdsub_eq + || icode == CODE_FOR_bcdsub_gt) { /* Only allow 1-bit unsigned literals. */ STRIP_NOPS (arg2); @@ -12392,6 +12419,44 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) return const0_rtx; } } + else if (icode == CODE_FOR_dfp_ddedpd_dd + || icode == CODE_FOR_dfp_ddedpd_td) + { + /* Only allow 2-bit unsigned literals where the value is 0 or 2. */ + STRIP_NOPS (arg0); + if (TREE_CODE (arg0) != INTEGER_CST + || TREE_INT_CST_LOW (arg2) & ~0x3) + { + error ("argument 1 must be 0 or 2"); + return const0_rtx; + } + } + else if (icode == CODE_FOR_dfp_denbcd_dd + || icode == CODE_FOR_dfp_denbcd_td) + { + /* Only allow 1-bit unsigned literals. */ + STRIP_NOPS (arg0); + if (TREE_CODE (arg0) != INTEGER_CST + || TREE_INT_CST_LOW (arg0) & ~0x1) + { + error ("argument 1 must be a 1-bit unsigned literal"); + return const0_rtx; + } + } + else if (icode == CODE_FOR_dfp_dscli_dd + || icode == CODE_FOR_dfp_dscli_td + || icode == CODE_FOR_dfp_dscri_dd + || icode == CODE_FOR_dfp_dscri_td) + { + /* Only allow 6-bit unsigned literals. */ + STRIP_NOPS (arg1); + if (TREE_CODE (arg1) != INTEGER_CST + || TREE_INT_CST_LOW (arg1) & ~0x3f) + { + error ("argument 2 must be a 6-bit unsigned literal"); + return const0_rtx; + } + } else if (icode == CODE_FOR_crypto_vshasigmaw || icode == CODE_FOR_crypto_vshasigmad) { @@ -13483,6 +13548,14 @@ rs6000_invalid_builtin (enum rs6000_builtins fncode) error ("Builtin function %s requires the -mpaired option", name); else if ((fnmask & RS6000_BTM_SPE) != 0) error ("Builtin function %s requires the -mspe option", name); + else if ((fnmask & (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR)) + == (RS6000_BTM_DFP | RS6000_BTM_P8_VECTOR)) + error ("Builtin function %s requires the -mhard-dfp and" + "-mpower8-vector options", name); + else if ((fnmask & RS6000_BTM_DFP) != 0) + error ("Builtin function %s requires the -mhard-dfp option", name); + else if ((fnmask & RS6000_BTM_P8_VECTOR) != 0) + error ("Builtin function %s requires the -mpower8-vector option", name); else error ("Builtin function %s is not supported with the current options", name); @@ -13762,6 +13835,9 @@ rs6000_init_builtins (void) uintTI_type_internal_node = unsigned_intTI_type_node; float_type_internal_node = float_type_node; double_type_internal_node = double_type_node; + long_double_type_internal_node = long_double_type_node; + dfloat64_type_internal_node = dfloat64_type_node; + dfloat128_type_internal_node = dfloat128_type_node; void_type_internal_node = void_type_node; /* Initialize the modes for builtin_function_type, mapping a machine mode to @@ -13776,6 +13852,9 @@ rs6000_init_builtins (void) builtin_mode_to_type[TImode][1] = unsigned_intTI_type_node; builtin_mode_to_type[SFmode][0] = float_type_node; builtin_mode_to_type[DFmode][0] = double_type_node; + builtin_mode_to_type[TFmode][0] = long_double_type_node; + builtin_mode_to_type[DDmode][0] = dfloat64_type_node; + builtin_mode_to_type[TDmode][0] = dfloat128_type_node; builtin_mode_to_type[V1TImode][0] = V1TI_type_node; builtin_mode_to_type[V1TImode][1] = unsigned_V1TI_type_node; builtin_mode_to_type[V2SImode][0] = V2SI_type_node; @@ -14868,6 +14947,8 @@ builtin_function_type (enum machine_mode mode_ret, enum machine_mode mode_arg0, /* unsigned 1 argument functions. */ case CRYPTO_BUILTIN_VSBOX: case P8V_BUILTIN_VGBBD: + case MISC_BUILTIN_CDTBCD: + case MISC_BUILTIN_CBCDTD: h.uns_p[0] = 1; h.uns_p[1] = 1; break; @@ -14886,6 +14967,11 @@ builtin_function_type (enum machine_mode mode_ret, enum machine_mode mode_arg0, case CRYPTO_BUILTIN_VPMSUMW: case CRYPTO_BUILTIN_VPMSUMD: case CRYPTO_BUILTIN_VPMSUM: + case MISC_BUILTIN_ADDG6S: + case MISC_BUILTIN_DIVWEU: + case MISC_BUILTIN_DIVWEUO: + case MISC_BUILTIN_DIVDEU: + case MISC_BUILTIN_DIVDEUO: h.uns_p[0] = 1; h.uns_p[1] = 1; h.uns_p[2] = 1; @@ -14947,9 +15033,18 @@ builtin_function_type (enum machine_mode mode_ret, enum machine_mode mode_arg0, /* signed args, unsigned return. */ case VSX_BUILTIN_XVCVDPUXDS_UNS: case ALTIVEC_BUILTIN_FIXUNS_V4SF_V4SI: + case MISC_BUILTIN_UNPACK_TD: + case MISC_BUILTIN_UNPACK_V1TI: h.uns_p[0] = 1; break; + /* unsigned arguments for 128-bit pack instructions. */ + case MISC_BUILTIN_PACK_TD: + case MISC_BUILTIN_PACK_V1TI: + h.uns_p[1] = 1; + h.uns_p[2] = 1; + break; + default: break; } @@ -31203,6 +31298,7 @@ static struct rs6000_opt_mask const rs6000_builtin_mask_names[] = { "power8-vector", RS6000_BTM_P8_VECTOR, false, false }, { "crypto", RS6000_BTM_CRYPTO, false, false }, { "htm", RS6000_BTM_HTM, false, false }, + { "hard-dfp", RS6000_BTM_DFP, false, false }, }; /* Option variables that we want to support inside attribute((target)) and diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 9ec3647..5a96beb 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2516,6 +2516,7 @@ extern int frame_pointer_needed; #define RS6000_BTM_FRSQRTES MASK_POPCNTB /* FRSQRTES instruction. */ #define RS6000_BTM_POPCNTD MASK_POPCNTD /* Target supports ISA 2.06. */ #define RS6000_BTM_CELL MASK_FPRND /* Target is cell powerpc. */ +#define RS6000_BTM_DFP MASK_DFP /* Decimal floating point. */ #define RS6000_BTM_COMMON (RS6000_BTM_ALTIVEC \ | RS6000_BTM_VSX \ @@ -2527,7 +2528,8 @@ extern int frame_pointer_needed; | RS6000_BTM_FRSQRTES \ | RS6000_BTM_HTM \ | RS6000_BTM_POPCNTD \ - | RS6000_BTM_CELL) + | RS6000_BTM_CELL \ + | RS6000_BTM_DFP) /* Define builtin enum index. */ @@ -2622,6 +2624,9 @@ enum rs6000_builtin_type_index RS6000_BTI_UINTTI, /* unsigned_intTI_type_node */ RS6000_BTI_float, /* float_type_node */ RS6000_BTI_double, /* double_type_node */ + RS6000_BTI_long_double, /* long_double_type_node */ + RS6000_BTI_dfloat64, /* dfloat64_type_node */ + RS6000_BTI_dfloat128, /* dfloat128_type_node */ RS6000_BTI_void, /* void_type_node */ RS6000_BTI_MAX }; @@ -2673,6 +2678,9 @@ enum rs6000_builtin_type_index #define uintTI_type_internal_node (rs6000_builtin_types[RS6000_BTI_UINTTI]) #define float_type_internal_node (rs6000_builtin_types[RS6000_BTI_float]) #define double_type_internal_node (rs6000_builtin_types[RS6000_BTI_double]) +#define long_double_type_internal_node (rs6000_builtin_types[RS6000_BTI_long_double]) +#define dfloat64_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat64]) +#define dfloat128_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat128]) #define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void]) extern GTY(()) tree rs6000_builtin_types[RS6000_BTI_MAX]; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 64c9e7c..e853bc4 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -125,6 +125,16 @@ UNSPEC_P8V_MTVSRD UNSPEC_P8V_XXPERMDI UNSPEC_P8V_RELOAD_FROM_VSX + UNSPEC_ADDG6S + UNSPEC_CDTBCD + UNSPEC_CBCDTD + UNSPEC_DIVE + UNSPEC_DIVEO + UNSPEC_DIVEU + UNSPEC_DIVEUO + UNSPEC_UNPACK_128BIT + UNSPEC_PACK_128BIT + UNSPEC_LSQ ]) ;; @@ -481,6 +491,10 @@ (V2DF "X,X,X,X,X") (V1TI "X,X,X,X,X")]) +;; Mode attribute to give the correct type for integer divides +(define_mode_attr idiv_ldiv [(SI "idiv") + (DI "ldiv")]) + ;; Start with fixed-point load and store insns. Here we put only the more ;; complex forms. Basic data transfer is done later. @@ -2755,10 +2769,7 @@ (match_operand:GPR 2 "gpc_reg_operand" "r")))] "" "divu %0,%1,%2" - [(set (attr "type") - (cond [(match_operand:SI 0 "" "") - (const_string "idiv")] - (const_string "ldiv")))]) + [(set_attr "type" "")]) ;; For powers of two we can do srai/aze for divide and then adjust for @@ -2782,10 +2793,7 @@ (match_operand:GPR 2 "gpc_reg_operand" "r")))] "" "div %0,%1,%2" - [(set (attr "type") - (cond [(match_operand:SI 0 "" "") - (const_string "idiv")] - (const_string "ldiv")))]) + [(set_attr "type" "")]) (define_expand "mod3" [(use (match_operand:GPR 0 "gpc_reg_operand" "")) @@ -6534,6 +6542,49 @@ [(set_attr "length" "8") (set_attr "type" "fpload")]) +;; Define the TImode operations that can be done in a small number +;; of instructions. The & constraints are to prevent the register +;; allocator from allocating registers that overlap with the inputs +;; (for example, having an input in 7,8 and an output in 6,7). We +;; also allow for the output being the same as one of the inputs. + +(define_insn "addti3" + [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,&r,r,r") + (plus:TI (match_operand:TI 1 "gpc_reg_operand" "%r,r,0,0") + (match_operand:TI 2 "reg_or_short_operand" "r,I,r,I")))] + "TARGET_64BIT" +{ + if (WORDS_BIG_ENDIAN) + return (GET_CODE (operands[2])) != CONST_INT + ? \"addc %L0,%L1,%L2\;adde %0,%1,%2\" + : \"addic %L0,%L1,%2\;add%G2e %0,%1\"; + else + return (GET_CODE (operands[2])) != CONST_INT + ? \"addc %0,%1,%2\;adde %L0,%L1,%L2\" + : \"addic %0,%1,%2\;add%G2e %L0,%L1\"; +} + [(set_attr "type" "two") + (set_attr "length" "8")]) + +(define_insn "subti3" + [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,&r,r,r,r") + (minus:TI (match_operand:TI 1 "reg_or_short_operand" "r,I,0,r,I") + (match_operand:TI 2 "gpc_reg_operand" "r,r,r,0,0")))] + "TARGET_64BIT" +{ + if (WORDS_BIG_ENDIAN) + return (GET_CODE (operands[1]) != CONST_INT) + ? \"subfc %L0,%L2,%L1\;subfe %0,%2,%1\" + : \"subfic %L0,%L2,%1\;subf%G1e %0,%2\"; + else + return (GET_CODE (operands[1]) != CONST_INT) + ? \"subfc %0,%2,%1\;subfe %L0,%L2,%L1\" + : \"subfic %0,%2,%1\;subf%G1e %L0,%L2\"; +} + [(set_attr "type" "two") + (set_attr "length" "8")]) + + ;; Define the DImode operations that can be done in a small number ;; of instructions. The & constraints are to prevent the register ;; allocator from allocating registers that overlap with the inputs @@ -9395,7 +9446,8 @@ (match_operand:FMOVE64 1 "input_operand" "r,Y,r,G,H,F"))] "! TARGET_POWERPC64 && ((TARGET_FPRS && TARGET_SINGLE_FLOAT) - || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE) + || TARGET_SOFT_FLOAT || TARGET_E500_SINGLE + || (mode == DDmode && TARGET_E500_DOUBLE)) && (gpc_reg_operand (operands[0], mode) || gpc_reg_operand (operands[1], mode))" "#" @@ -15691,6 +15743,191 @@ }) +;; Miscellaneous ISA 2.06 (power7) instructions +(define_insn "addg6s" + [(set (match_operand:SI 0 "register_operand" "=r") + (unspec:SI [(match_operand:SI 1 "register_operand" "r") + (match_operand:SI 2 "register_operand" "r")] + UNSPEC_ADDG6S))] + "TARGET_POPCNTD" + "addg6s %0,%1,%2" + [(set_attr "type" "integer") + (set_attr "length" "4")]) + +(define_insn "cdtbcd" + [(set (match_operand:SI 0 "register_operand" "=r") + (unspec:SI [(match_operand:SI 1 "register_operand" "r")] + UNSPEC_CDTBCD))] + "TARGET_POPCNTD" + "cdtbcd %0,%1" + [(set_attr "type" "integer") + (set_attr "length" "4")]) + +(define_insn "cbcdtd" + [(set (match_operand:SI 0 "register_operand" "=r") + (unspec:SI [(match_operand:SI 1 "register_operand" "r")] + UNSPEC_CBCDTD))] + "TARGET_POPCNTD" + "cbcdtd %0,%1" + [(set_attr "type" "integer") + (set_attr "length" "4")]) + +(define_int_iterator UNSPEC_DIV_EXTEND [UNSPEC_DIVE + UNSPEC_DIVEO + UNSPEC_DIVEU + UNSPEC_DIVEUO]) + +(define_int_attr div_extend [(UNSPEC_DIVE "e") + (UNSPEC_DIVEO "eo") + (UNSPEC_DIVEU "eu") + (UNSPEC_DIVEUO "euo")]) + +(define_insn "div_" + [(set (match_operand:GPR 0 "register_operand" "=r") + (unspec:GPR [(match_operand:GPR 1 "register_operand" "r") + (match_operand:GPR 2 "register_operand" "r")] + UNSPEC_DIV_EXTEND))] + "TARGET_POPCNTD" + "div %0,%1,%2" + [(set_attr "type" "")]) + + +;; Pack/unpack 128-bit floating point types that take 2 scalar registers + +; Type of the 64-bit part when packing/unpacking 128-bit floating point types +(define_mode_attr FP128_64 [(TF "DF") (TD "DI")]) + +(define_expand "unpack" + [(set (match_operand: 0 "nonimmediate_operand" "") + (unspec: + [(match_operand:FMOVE128 1 "register_operand" "") + (match_operand:QI 2 "const_0_to_1_operand" "")] + UNSPEC_UNPACK_128BIT))] + "" + "") + +;; The Advance Toolchain 7.0-3 added private builtins: __builtin_longdouble_dw0 +;; and __builtin_longdouble_dw1 to optimize glibc. Add support for these +;; builtins here. + +(define_expand "unpacktf_0" + [(set (match_operand:DF 0 "nonimmediate_operand" "") + (unspec:DF [(match_operand:TF 1 "register_operand" "") + (const_int 0)] + UNSPEC_UNPACK_128BIT))] + "" + "") + +(define_expand "unpacktf_1" + [(set (match_operand:DF 0 "nonimmediate_operand" "") + (unspec:DF [(match_operand:TF 1 "register_operand" "") + (const_int 1)] + UNSPEC_UNPACK_128BIT))] + "" + "") + +(define_insn_and_split "unpack_dm" + [(set (match_operand: 0 "nonimmediate_operand" "=d,m,d,r,m") + (unspec: + [(match_operand:FMOVE128 1 "register_operand" "d,d,r,d,r") + (match_operand:QI 2 "const_0_to_1_operand" "i,i,i,i,i")] + UNSPEC_UNPACK_128BIT))] + "TARGET_POWERPC64 && TARGET_DIRECT_MOVE" + "#" + "&& reload_completed" + [(set (match_dup 0) (match_dup 3))] +{ + unsigned fp_regno = REGNO (operands[1]) + UINTVAL (operands[2]); + + if (REG_P (operands[0]) && REGNO (operands[0]) == fp_regno) + { + emit_note (NOTE_INSN_DELETED); + DONE; + } + + operands[3] = gen_rtx_REG (mode, fp_regno); +} + [(set_attr "type" "fp,fpstore,mffgpr,mftgpr,store") + (set_attr "length" "4")]) + +(define_insn_and_split "unpack_nodm" + [(set (match_operand: 0 "nonimmediate_operand" "=d,m") + (unspec: + [(match_operand:FMOVE128 1 "register_operand" "d,d") + (match_operand:QI 2 "const_0_to_1_operand" "i,i")] + UNSPEC_UNPACK_128BIT))] + "!TARGET_POWERPC64 || !TARGET_DIRECT_MOVE" + "#" + "&& reload_completed" + [(set (match_dup 0) (match_dup 3))] +{ + unsigned fp_regno = REGNO (operands[1]) + UINTVAL (operands[2]); + + if (REG_P (operands[0]) && REGNO (operands[0]) == fp_regno) + { + emit_note (NOTE_INSN_DELETED); + DONE; + } + + operands[3] = gen_rtx_REG (mode, fp_regno); +} + [(set_attr "type" "fp,fpstore") + (set_attr "length" "4")]) + +(define_insn_and_split "pack" + [(set (match_operand:FMOVE128 0 "register_operand" "=d,&d") + (unspec:FMOVE128 + [(match_operand: 1 "register_operand" "0,d") + (match_operand: 2 "register_operand" "d,d")] + UNSPEC_PACK_128BIT))] + "" + "@ + fmr %L0,%2 + #" + "&& reload_completed && REGNO (operands[0]) != REGNO (operands[1])" + [(set (match_dup 3) (match_dup 1)) + (set (match_dup 4) (match_dup 2))] +{ + unsigned dest_hi = REGNO (operands[0]); + unsigned dest_lo = dest_hi + 1; + + gcc_assert (!IN_RANGE (REGNO (operands[1]), dest_hi, dest_lo)); + gcc_assert (!IN_RANGE (REGNO (operands[2]), dest_hi, dest_lo)); + + operands[3] = gen_rtx_REG (mode, dest_hi); + operands[4] = gen_rtx_REG (mode, dest_lo); +} + [(set_attr "type" "fp,fp") + (set_attr "length" "4,8")]) + +(define_insn "unpackv1ti" + [(set (match_operand:DI 0 "register_operand" "=d,d") + (unspec:DI [(match_operand:V1TI 1 "register_operand" "0,wa") + (match_operand:QI 2 "const_0_to_1_operand" "O,i")] + UNSPEC_UNPACK_128BIT))] + "TARGET_VSX" +{ + if (REGNO (operands[0]) == REGNO (operands[1]) && INTVAL (operands[2]) == 0) + return ASM_COMMENT_START " xxpermdi to same register"; + + operands[3] = GEN_INT (INTVAL (operands[2]) == 0 ? 0 : 3); + return "xxpermdi %x0,%x1,%x1,%3"; +} + [(set_attr "type" "vecperm") + (set_attr "length" "4")]) + +(define_insn "packv1ti" + [(set (match_operand:V1TI 0 "register_operand" "=wa") + (unspec:V1TI + [(match_operand:DI 1 "register_operand" "d") + (match_operand:DI 2 "register_operand" "d")] + UNSPEC_PACK_128BIT))] + "TARGET_VSX" + "xxpermdi %x0,%x1,%x2,0" + [(set_attr "type" "vecperm") + (set_attr "length" "4")]) + + (include "sync.md") (include "vector.md") diff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md index 7db4390..63152ed 100644 --- a/gcc/config/rs6000/sync.md +++ b/gcc/config/rs6000/sync.md @@ -107,10 +107,17 @@ "isync" [(set_attr "type" "isync")]) +;; Types that we should provide atomic instructions for. +(define_mode_iterator AINT [QI + HI + SI + (DI "TARGET_POWERPC64") + (TI "TARGET_SYNC_TI")]) + ;; The control dependency used for load dependency described ;; in B.2.3 of the Power ISA 2.06B. (define_insn "loadsync_" - [(unspec_volatile:BLK [(match_operand:INT1 0 "register_operand" "r")] + [(unspec_volatile:BLK [(match_operand:AINT 0 "register_operand" "r")] UNSPECV_ISYNC) (clobber (match_scratch:CC 1 "=y"))] "" @@ -118,18 +125,56 @@ [(set_attr "type" "isync") (set_attr "length" "12")]) +(define_insn "load_quadpti" + [(set (match_operand:PTI 0 "quad_int_reg_operand" "=&r") + (unspec:PTI + [(match_operand:TI 1 "quad_memory_operand" "wQ")] UNSPEC_LSQ))] + "TARGET_SYNC_TI + && !reg_mentioned_p (operands[0], operands[1])" + "lq %0,%1" + [(set_attr "type" "load") + (set_attr "length" "4")]) + (define_expand "atomic_load" - [(set (match_operand:INT1 0 "register_operand" "") ;; output - (match_operand:INT1 1 "memory_operand" "")) ;; memory + [(set (match_operand:AINT 0 "register_operand" "") ;; output + (match_operand:AINT 1 "memory_operand" "")) ;; memory (use (match_operand:SI 2 "const_int_operand" ""))] ;; model "" { + if (mode == TImode && !TARGET_SYNC_TI) + FAIL; + enum memmodel model = (enum memmodel) INTVAL (operands[2]); if (model == MEMMODEL_SEQ_CST) emit_insn (gen_hwsync ()); - emit_move_insn (operands[0], operands[1]); + if (mode != TImode) + emit_move_insn (operands[0], operands[1]); + else + { + rtx op0 = operands[0]; + rtx op1 = operands[1]; + rtx pti_reg = gen_reg_rtx (PTImode); + + // Can't have indexed address for 'lq' + if (indexed_address (XEXP (op1, 0), TImode)) + { + rtx old_addr = XEXP (op1, 0); + rtx new_addr = force_reg (Pmode, old_addr); + operands[1] = op1 = replace_equiv_address (op1, new_addr); + } + + emit_insn (gen_load_quadpti (pti_reg, op1)); + + if (WORDS_BIG_ENDIAN) + emit_move_insn (op0, gen_lowpart (TImode, pti_reg)); + else + { + emit_move_insn (gen_lowpart (DImode, op0), gen_highpart (DImode, pti_reg)); + emit_move_insn (gen_highpart (DImode, op0), gen_lowpart (DImode, pti_reg)); + } + } switch (model) { @@ -146,12 +191,24 @@ DONE; }) +(define_insn "store_quadpti" + [(set (match_operand:PTI 0 "quad_memory_operand" "=wQ") + (unspec:PTI + [(match_operand:PTI 1 "quad_int_reg_operand" "r")] UNSPEC_LSQ))] + "TARGET_SYNC_TI" + "stq %1,%0" + [(set_attr "type" "store") + (set_attr "length" "4")]) + (define_expand "atomic_store" - [(set (match_operand:INT1 0 "memory_operand" "") ;; memory - (match_operand:INT1 1 "register_operand" "")) ;; input + [(set (match_operand:AINT 0 "memory_operand" "") ;; memory + (match_operand:AINT 1 "register_operand" "")) ;; input (use (match_operand:SI 2 "const_int_operand" ""))] ;; model "" { + if (mode == TImode && !TARGET_SYNC_TI) + FAIL; + enum memmodel model = (enum memmodel) INTVAL (operands[2]); switch (model) { @@ -166,7 +223,33 @@ default: gcc_unreachable (); } - emit_move_insn (operands[0], operands[1]); + if (mode != TImode) + emit_move_insn (operands[0], operands[1]); + else + { + rtx op0 = operands[0]; + rtx op1 = operands[1]; + rtx pti_reg = gen_reg_rtx (PTImode); + + // Can't have indexed address for 'stq' + if (indexed_address (XEXP (op0, 0), TImode)) + { + rtx old_addr = XEXP (op0, 0); + rtx new_addr = force_reg (Pmode, old_addr); + operands[0] = op0 = replace_equiv_address (op0, new_addr); + } + + if (WORDS_BIG_ENDIAN) + emit_move_insn (pti_reg, gen_lowpart (PTImode, op1)); + else + { + emit_move_insn (gen_lowpart (DImode, pti_reg), gen_highpart (DImode, op1)); + emit_move_insn (gen_highpart (DImode, pti_reg), gen_lowpart (DImode, op1)); + } + + emit_insn (gen_store_quadpti (gen_lowpart (PTImode, op0), pti_reg)); + } + DONE; }) @@ -180,14 +263,6 @@ SI (DI "TARGET_POWERPC64")]) -;; Types that we should provide atomic instructions for. - -(define_mode_iterator AINT [QI - HI - SI - (DI "TARGET_POWERPC64") - (TI "TARGET_SYNC_TI")]) - (define_insn "load_locked" [(set (match_operand:ATOMIC 0 "int_reg_operand" "=r") (unspec_volatile:ATOMIC diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index d83cdc3..23d85ab 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1891,7 +1891,12 @@ (parallel [(const_int 0) (const_int 4) (const_int 1) (const_int 5)])))] "VECTOR_MEM_VSX_P (mode)" - "xxmrghw %x0,%x1,%x2" +{ + if (BYTES_BIG_ENDIAN) + return "xxmrghw %x0,%x1,%x2"; + else + return "xxmrglw %x0,%x2,%x1"; +} [(set_attr "type" "vecperm")]) (define_insn "vsx_xxmrglw_" @@ -1903,7 +1908,12 @@ (parallel [(const_int 2) (const_int 6) (const_int 3) (const_int 7)])))] "VECTOR_MEM_VSX_P (mode)" - "xxmrglw %x0,%x1,%x2" +{ + if (BYTES_BIG_ENDIAN) + return "xxmrglw %x0,%x1,%x2"; + else + return "xxmrghw %x0,%x2,%x1"; +} [(set_attr "type" "vecperm")]) ;; Shift left double by word immediate diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 6d909c7..12724a2 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -19,6 +19,10 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see . */ +#include +#include +#include + #include "config.h" #include "system.h" #include "coretypes.h" @@ -70,10 +74,6 @@ along with GCC; see the file COPYING3. If not see #include "pass_manager.h" #include "context.h" -#include -#include -#include - int code_for_indirect_jump_scratch = CODE_FOR_indirect_jump_scratch; /* These are some macros to abstract register modes. */ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 8b6c647..e2a4669 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -5795,19 +5795,6 @@ } [(set_attr "type" "shift")]) -(define_insn "*ashlsi3_extend" - [(set (match_operand:DI 0 "register_operand" "=r") - (zero_extend:DI - (ashift:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "arith_operand" "rI"))))] - "TARGET_ARCH64" -{ - if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = GEN_INT (INTVAL (operands[2]) & 0x1f); - return "sll\t%1, %2, %0"; -} - [(set_attr "type" "shift")]) - (define_expand "ashldi3" [(set (match_operand:DI 0 "register_operand" "=r") (ashift:DI (match_operand:DI 1 "register_operand" "r") diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt index c02aec5..64e4095 100644 --- a/gcc/config/sparc/sparc.opt +++ b/gcc/config/sparc/sparc.opt @@ -113,6 +113,10 @@ mrelax Target Optimize tail call instructions in assembler and linker +muser-mode +Target Report Mask(USER_MODE) +Do not generate code that can only run in supervisor mode + mcpu= Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7) Use features of and schedule code for given CPU diff --git a/gcc/config/sparc/sync.md b/gcc/config/sparc/sync.md index fd5691f..e6e237f 100644 --- a/gcc/config/sparc/sync.md +++ b/gcc/config/sparc/sync.md @@ -200,10 +200,27 @@ [(match_operand:I48MODE 2 "register_operand" "r") (match_operand:I48MODE 3 "register_operand" "0")] UNSPECV_CAS))] - "(TARGET_V9 || TARGET_LEON3) && (mode != DImode || TARGET_ARCH64)" + "TARGET_V9 && (mode != DImode || TARGET_ARCH64)" "cas\t%1, %2, %0" [(set_attr "type" "multi")]) +(define_insn "*atomic_compare_and_swap_leon3_1" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operand:SI 1 "mem_noofs_operand" "+w")) + (set (match_dup 1) + (unspec_volatile:SI + [(match_operand:SI 2 "register_operand" "r") + (match_operand:SI 3 "register_operand" "0")] + UNSPECV_CAS))] + "TARGET_LEON3" +{ + if (TARGET_USER_MODE) + return "casa\t%1 0xa, %2, %0"; /* ASI for user data space. */ + else + return "casa\t%1 0xb, %2, %0"; /* ASI for supervisor data space. */ +} + [(set_attr "type" "multi")]) + (define_insn "*atomic_compare_and_swapdi_v8plus" [(set (match_operand:DI 0 "register_operand" "=h") (match_operand:DI 1 "mem_noofs_operand" "+w")) diff --git a/gcc/configure b/gcc/configure index 4058966..9238e8a 100755 --- a/gcc/configure +++ b/gcc/configure @@ -24498,7 +24498,7 @@ else .align 4 smac %g2, %g3, %g1 umac %g2, %g3, %g1 - cas [%g2], %g3, %g1' > conftest.s + casa [%g2] 0xb, %g3, %g1' > conftest.s if { ac_try='$gcc_cv_as $gcc_cv_as_flags -Aleon -o conftest.o conftest.s >&5' { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 (eval $ac_try) 2>&5 diff --git a/gcc/configure.ac b/gcc/configure.ac index 1df3664..6824f0c 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -3725,7 +3725,7 @@ foo: .align 4 smac %g2, %g3, %g1 umac %g2, %g3, %g1 - cas [[%g2]], %g3, %g1],, + casa [[%g2]] 0xb, %g3, %g1],, [AC_DEFINE(HAVE_AS_LEON, 1, [Define if your assembler supports LEON instructions.])]) ;; diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index f95944b..266547e 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,32 @@ +2014-05-02 Jason Merrill + + PR c++/60992 + * lambda.c (lambda_capture_field_type): Wrap anything dependent + other than 'this' or a VLA. + (is_this): New. + * pt.c (tsubst_copy) [VAR_DECL]: Also build a new VAR_DECL if + the operand was static or constant. + +2014-04-30 Jason Merrill + + PR c++/60980 + * init.c (build_value_init): Don't try to call an array constructor. + + PR c++/60951 + * typeck2.c (massage_init_elt): Use maybe_constant_init. + +2014-04-24 Jakub Jelinek + + * parser.c (cp_parser_omp_atomic): Allow seq_cst before + atomic-clause, allow comma in between atomic-clause and + seq_cst. + +2014-04-22 Jakub Jelinek + + PR c/59073 + * parser.c (cp_parser_omp_parallel): If cp_parser_omp_for + fails, don't set OM_PARALLEL_COMBINED and return NULL. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/gcc/cp/init.c b/gcc/cp/init.c index fdc1011..0fd165c 100644 --- a/gcc/cp/init.c +++ b/gcc/cp/init.c @@ -339,7 +339,8 @@ build_value_init (tree type, tsubst_flags_t complain) gcc_assert (!processing_template_decl || (SCALAR_TYPE_P (type) || TREE_CODE (type) == ARRAY_TYPE)); - if (type_build_ctor_call (type)) + if (CLASS_TYPE_P (type) + && type_build_ctor_call (type)) { tree ctor = build_aggr_init_expr (type, diff --git a/gcc/cp/lambda.c b/gcc/cp/lambda.c index 0b8b46a..3280644 100644 --- a/gcc/cp/lambda.c +++ b/gcc/cp/lambda.c @@ -201,6 +201,13 @@ lambda_function (tree lambda) return lambda; } +static inline bool +is_this (tree t) +{ + return (TREE_CODE (t) == PARM_DECL + && DECL_NAME (t) == this_identifier); +} + /* Returns the type to use for the FIELD_DECL corresponding to the capture of EXPR. The caller should add REFERENCE_TYPE for capture by reference. */ @@ -216,8 +223,9 @@ lambda_capture_field_type (tree expr, bool explicit_init_p) } else type = non_reference (unlowered_expr_type (expr)); - if (!type || WILDCARD_TYPE_P (type) || type_uses_auto (type) - || DECL_PACK_P (expr)) + if (type_dependent_expression_p (expr) + && !is_this (tree_strip_nop_conversions (expr)) + && !array_of_runtime_bound_p (type)) { type = cxx_make_type (DECLTYPE_TYPE); DECLTYPE_TYPE_EXPR (type) = expr; diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c index f386eed..aa00a7b 100644 --- a/gcc/cp/parser.c +++ b/gcc/cp/parser.c @@ -28530,6 +28530,20 @@ cp_parser_omp_atomic (cp_parser *parser, cp_token *pragma_tok) tree id = cp_lexer_peek_token (parser->lexer)->u.value; const char *p = IDENTIFIER_POINTER (id); + if (!strcmp (p, "seq_cst")) + { + seq_cst = true; + cp_lexer_consume_token (parser->lexer); + if (cp_lexer_next_token_is (parser->lexer, CPP_COMMA) + && cp_lexer_peek_nth_token (parser->lexer, 2)->type == CPP_NAME) + cp_lexer_consume_token (parser->lexer); + } + } + if (cp_lexer_next_token_is (parser->lexer, CPP_NAME)) + { + tree id = cp_lexer_peek_token (parser->lexer)->u.value; + const char *p = IDENTIFIER_POINTER (id); + if (!strcmp (p, "read")) code = OMP_ATOMIC_READ; else if (!strcmp (p, "write")) @@ -28543,16 +28557,22 @@ cp_parser_omp_atomic (cp_parser *parser, cp_token *pragma_tok) if (p) cp_lexer_consume_token (parser->lexer); } - - if (cp_lexer_next_token_is (parser->lexer, CPP_NAME)) + if (!seq_cst) { - tree id = cp_lexer_peek_token (parser->lexer)->u.value; - const char *p = IDENTIFIER_POINTER (id); + if (cp_lexer_next_token_is (parser->lexer, CPP_COMMA) + && cp_lexer_peek_nth_token (parser->lexer, 2)->type == CPP_NAME) + cp_lexer_consume_token (parser->lexer); - if (!strcmp (p, "seq_cst")) + if (cp_lexer_next_token_is (parser->lexer, CPP_NAME)) { - seq_cst = true; - cp_lexer_consume_token (parser->lexer); + tree id = cp_lexer_peek_token (parser->lexer)->u.value; + const char *p = IDENTIFIER_POINTER (id); + + if (!strcmp (p, "seq_cst")) + { + seq_cst = true; + cp_lexer_consume_token (parser->lexer); + } } } cp_parser_require_pragma_eol (parser, pragma_tok); @@ -29825,10 +29845,12 @@ cp_parser_omp_parallel (cp_parser *parser, cp_token *pragma_tok, return cp_parser_omp_for (parser, pragma_tok, p_name, mask, cclauses); block = begin_omp_parallel (); save = cp_parser_begin_omp_structured_block (parser); - cp_parser_omp_for (parser, pragma_tok, p_name, mask, cclauses); + tree ret = cp_parser_omp_for (parser, pragma_tok, p_name, mask, cclauses); cp_parser_end_omp_structured_block (parser, save); stmt = finish_omp_parallel (cclauses[C_OMP_CLAUSE_SPLIT_PARALLEL], block); + if (ret == NULL_TREE) + return ret; OMP_PARALLEL_COMBINED (stmt) = 1; return stmt; } diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index 318c325..18389e0 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -12638,13 +12638,17 @@ tsubst_copy (tree t, tree args, tsubst_flags_t complain, tree in_decl) } else { - /* This can happen for a variable used in a late-specified - return type of a local lambda. Just make a dummy decl - since it's only used for its type. */ - if (cp_unevaluated_operand) - return tsubst_decl (t, args, complain); - gcc_assert (errorcount || sorrycount); - return error_mark_node; + /* This can happen for a variable used in a + late-specified return type of a local lambda, or for a + local static or constant. Building a new VAR_DECL + should be OK in all those cases. */ + r = tsubst_decl (t, args, complain); + if (decl_constant_var_p (r)) + /* A use of a local constant must decay to its value. */ + return integral_constant_value (r); + gcc_assert (cp_unevaluated_operand || TREE_STATIC (r) + || errorcount || sorrycount); + return r; } } } diff --git a/gcc/cp/typeck2.c b/gcc/cp/typeck2.c index 68e518a..85696f6 100644 --- a/gcc/cp/typeck2.c +++ b/gcc/cp/typeck2.c @@ -1138,7 +1138,7 @@ massage_init_elt (tree type, tree init, tsubst_flags_t complain) /* When we defer constant folding within a statement, we may want to defer this folding as well. */ tree t = fold_non_dependent_expr_sfinae (init, complain); - t = maybe_constant_value (t); + t = maybe_constant_init (t); if (TREE_CONSTANT (t)) init = t; return init; diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 347a94a..9780d92 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -12787,9 +12787,12 @@ float __builtin_recipdivf (float, float); float __builtin_rsqrtf (float); double __builtin_recipdiv (double, double); double __builtin_rsqrt (double); -long __builtin_bpermd (long, long); uint64_t __builtin_ppc_get_timebase (); unsigned long __builtin_ppc_mftb (); +double __builtin_unpack_longdouble (long double, int); +double __builtin_longdouble_dw0 (long double); +double __builtin_longdouble_dw1 (long double); +long double __builtin_pack_longdouble (double, double); @end smallexample The @code{vec_rsqrt}, @code{__builtin_rsqrt}, and @@ -12809,6 +12812,57 @@ The @code{__builtin_ppc_mftb} function always generates one instruction and returns the Time Base Register value as an unsigned long, throwing away the most significant word on 32-bit environments. +The following built-in functions are available for the PowerPC family +of processors, starting with ISA 2.06 or later (@option{-mcpu=power7} +or @option{-mpopcntd}): +@smallexample +long __builtin_bpermd (long, long); +int __builtin_divwe (int, int); +int __builtin_divweo (int, int); +unsigned int __builtin_divweu (unsigned int, unsigned int); +unsigned int __builtin_divweuo (unsigned int, unsigned int); +long __builtin_divde (long, long); +long __builtin_divdeo (long, long); +unsigned long __builtin_divdeu (unsigned long, unsigned long); +unsigned long __builtin_divdeuo (unsigned long, unsigned long); +unsigned int cdtbcd (unsigned int); +unsigned int cbcdtd (unsigned int); +unsigned int addg6s (unsigned int, unsigned int); +@end smallexample + +The @code{__builtin_divde}, @code{__builtin_divdeo}, +@code{__builitin_divdeu}, @code{__builtin_divdeou} functions require a +64-bit environment support ISA 2.06 or later. + +The following built-in functions are available for the PowerPC family +of processors when hardware decimal floating point +(@option{-mhard-dfp}) is available: +@smallexample +_Decimal64 __builtin_dxex (_Decimal64); +_Decimal128 __builtin_dxexq (_Decimal128); +_Decimal64 __builtin_ddedpd (int, _Decimal64); +_Decimal128 __builtin_ddedpdq (int, _Decimal128); +_Decimal64 __builtin_denbcd (int, _Decimal64); +_Decimal128 __builtin_denbcdq (int, _Decimal128); +_Decimal64 __builtin_diex (_Decimal64, _Decimal64); +_Decimal128 _builtin_diexq (_Decimal128, _Decimal128); +_Decimal64 __builtin_dscli (_Decimal64, int); +_Decimal128 __builitn_dscliq (_Decimal128, int); +_Decimal64 __builtin_dscri (_Decimal64, int); +_Decimal128 __builitn_dscriq (_Decimal128, int); +unsigned long long __builtin_unpack_dec128 (_Decimal128, int); +_Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long); +@end smallexample + +The following built-in functions are available for the PowerPC family +of processors when the Vector Scalar (vsx) instruction set is +available: +@smallexample +unsigned long long __builtin_unpack_vector_int128 (vector __int128_t, int); +vector __int128_t __builtin_pack_vector_int128 (unsigned long long, + unsigned long long); +@end smallexample + @node PowerPC AltiVec/VSX Built-in Functions @subsection PowerPC AltiVec Built-in Functions @@ -15220,6 +15274,17 @@ vector __uint128_t vec_vsubcuq (vector __uint128_t, vector __uint128_t); __int128_t vec_vsubuqm (__int128_t, __int128_t); __uint128_t vec_vsubuqm (__uint128_t, __uint128_t); + +vector __int128_t __builtin_bcdadd (vector __int128_t, vector__int128_t); +int __builtin_bcdadd_lt (vector __int128_t, vector__int128_t); +int __builtin_bcdadd_eq (vector __int128_t, vector__int128_t); +int __builtin_bcdadd_gt (vector __int128_t, vector__int128_t); +int __builtin_bcdadd_ov (vector __int128_t, vector__int128_t); +vector __int128_t bcdsub (vector __int128_t, vector__int128_t); +int __builtin_bcdsub_lt (vector __int128_t, vector__int128_t); +int __builtin_bcdsub_eq (vector __int128_t, vector__int128_t); +int __builtin_bcdsub_gt (vector __int128_t, vector__int128_t); +int __builtin_bcdsub_ov (vector __int128_t, vector__int128_t); @end smallexample If the cryptographic instructions are enabled (@option{-mcrypto} or diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index c32f1f9..6b45e9d 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -2544,8 +2544,7 @@ Finally a @code{stagefeedback} compiler is built using the information collected Unlike standard bootstrap, several additional restrictions apply. The compiler used to build @code{stage1} needs to support a 64-bit integral type. -It is recommended to only use GCC for this. Also parallel make is currently -not supported since collisions in profile collecting may occur. +It is recommended to only use GCC for this. @html
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2d43457..5b7ce1a 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -825,7 +825,8 @@ Objective-C and Objective-C++ Dialects}. @gccoptlist{-meb -mel -mno-crt0} @emph{MSP430 Options} -@gccoptlist{-msim -masm-hex -mmcu= -mcpu= -mlarge -msmall -mrelax} +@gccoptlist{-msim -masm-hex -mmcu= -mcpu= -mlarge -msmall -mrelax @gol +-mhwmult=} @emph{NDS32 Options} @gccoptlist{-mbig-endian -mlittle-endian @gol @@ -991,6 +992,7 @@ See RS/6000 and PowerPC Options. -mhard-quad-float -msoft-quad-float @gol -mstack-bias -mno-stack-bias @gol -munaligned-doubles -mno-unaligned-doubles @gol +-muser-mode -mno-user-mode @gol -mv8plus -mno-v8plus -mvis -mno-vis @gol -mvis2 -mno-vis2 -mvis3 -mno-vis3 @gol -mcbcond -mno-cbcond @gol @@ -18214,6 +18216,28 @@ This option is passed to the assembler and linker, and allows the linker to perform certain optimizations that cannot be done until the final link. +@item mhwmult= +@opindex mhwmult= +Describes the type of hardware multiply supported by the target. +Accepted values are @code{none} for no hardware multiply, @code{16bit} +for the original 16-bit-only multiply supported by early MCUs. +@code{32bit} for the 16/32-bit multiply supported by later MCUs and +@code{f5series} for the 16/32-bit multiply supported by F5-series MCUs. +A value of @code{auto} can also be given. This tells GCC to deduce +the hardware multiply support based upon the MCU name provided by the +@option{-mmcu} option. If no @option{-mmcu} option is specified then +@code{32bit} hardware multiply support is assumed. @code{auto} is the +default setting. + +Hardware multiplies are normally performed by calling a library +routine. This saves space in the generated code. When compiling at +@code{-O3} or higher however the hardware multiplier is invoked +inline. This makes for bigger, but faster code. + +The hardware multiply routines disable interrupts whilst running and +restore the previous interrupt state when they finish. This makes +them safe to use inside interrupt handlers as well as in normal code. + @end table @node NDS32 Options @@ -20904,6 +20928,14 @@ Specifying this option avoids some rare compatibility problems with code generated by other compilers. It is not the default because it results in a performance loss, especially for floating-point code. +@item -muser-mode +@itemx -mno-user-mode +@opindex muser-mode +@opindex mno-user-mode +Do not generate code that can only run in supervisor mode. This is relevant +only for the @code{casa} instruction emitted for the LEON3 processor. The +default is @option{-mno-user-mode}. + @item -mno-faster-structs @itemx -mfaster-structs @opindex mno-faster-structs diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index eb33cc9..42f0321 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,13 @@ +2014-04-22 Tobias Burnus + + Backport from mainline + 2014-04-11 Tobias Burnus + + PR fortran/58880 + PR fortran/60495 + * resolve.c (gfc_resolve_finalizers): Ensure that vtables + and finalization wrappers are generated. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/gcc/fortran/resolve.c b/gcc/fortran/resolve.c index 6e23e57..38755fe 100644 --- a/gcc/fortran/resolve.c +++ b/gcc/fortran/resolve.c @@ -11200,15 +11200,36 @@ resolve_fl_procedure (gfc_symbol *sym, int mp_flag) the requirements of the standard for procedures used as finalizers. */ static bool -gfc_resolve_finalizers (gfc_symbol* derived) +gfc_resolve_finalizers (gfc_symbol* derived, bool *finalizable) { gfc_finalizer* list; gfc_finalizer** prev_link; /* For removing wrong entries from the list. */ bool result = true; bool seen_scalar = false; + gfc_symbol *vtab; + gfc_component *c; + /* Return early when not finalizable. Additionally, ensure that derived-type + components have a their finalizables resolved. */ if (!derived->f2k_derived || !derived->f2k_derived->finalizers) - return true; + { + bool has_final = false; + for (c = derived->components; c; c = c->next) + if (c->ts.type == BT_DERIVED + && !c->attr.pointer && !c->attr.proc_pointer && !c->attr.allocatable) + { + bool has_final2 = false; + if (!gfc_resolve_finalizers (c->ts.u.derived, &has_final)) + return false; /* Error. */ + has_final = has_final || has_final2; + } + if (!has_final) + { + if (finalizable) + *finalizable = false; + return true; + } + } /* Walk over the list of finalizer-procedures, check them, and if any one does not fit in with the standard's definition, print an error and remove @@ -11330,12 +11351,15 @@ gfc_resolve_finalizers (gfc_symbol* derived) /* Remove wrong nodes immediately from the list so we don't risk any troubles in the future when they might fail later expectations. */ error: - result = false; i = list; *prev_link = list->next; gfc_free_finalizer (i); + result = false; } + if (result == false) + return false; + /* Warn if we haven't seen a scalar finalizer procedure (but we know there were nodes in the list, must have been for arrays. It is surely a good idea to have a scalar version there if there's something to finalize. */ @@ -11344,8 +11368,14 @@ error: " defined at %L, suggest also scalar one", derived->name, &derived->declared_at); - gfc_find_derived_vtab (derived); - return result; + vtab = gfc_find_derived_vtab (derived); + c = vtab->ts.u.derived->components->next->next->next->next->next; + gfc_set_sym_referenced (c->initializer->symtree->n.sym); + + if (finalizable) + *finalizable = true; + + return true; } @@ -12513,7 +12543,7 @@ resolve_fl_derived (gfc_symbol *sym) return false; /* Resolve the finalizer procedures. */ - if (!gfc_resolve_finalizers (sym)) + if (!gfc_resolve_finalizers (sym, NULL)) return false; if (sym->attr.is_class && sym->ts.u.derived == NULL) diff --git a/gcc/gimple-ssa-strength-reduction.c b/gcc/gimple-ssa-strength-reduction.c index 9ad1b4f..cb19399 100644 --- a/gcc/gimple-ssa-strength-reduction.c +++ b/gcc/gimple-ssa-strength-reduction.c @@ -1114,15 +1114,18 @@ create_mul_imm_cand (gimple gs, tree base_in, tree stride_in, bool speed) X = Y * c ============================ X = (B + i') * (S * c) */ - base = base_cand->base_expr; - index = base_cand->index; temp = tree_to_double_int (base_cand->stride) * tree_to_double_int (stride_in); - stride = double_int_to_tree (TREE_TYPE (stride_in), temp); - ctype = base_cand->cand_type; - if (has_single_use (base_in)) - savings = (base_cand->dead_savings - + stmt_cost (base_cand->cand_stmt, speed)); + if (double_int_fits_to_tree_p (TREE_TYPE (stride_in), temp)) + { + base = base_cand->base_expr; + index = base_cand->index; + stride = double_int_to_tree (TREE_TYPE (stride_in), temp); + ctype = base_cand->cand_type; + if (has_single_use (base_in)) + savings = (base_cand->dead_savings + + stmt_cost (base_cand->cand_stmt, speed)); + } } else if (base_cand->kind == CAND_ADD && integer_onep (base_cand->stride)) { diff --git a/gcc/gimplify.c b/gcc/gimplify.c index 7441784..e2e7e24 100644 --- a/gcc/gimplify.c +++ b/gcc/gimplify.c @@ -5793,7 +5793,7 @@ omp_notice_variable (struct gimplify_omp_ctx *ctx, tree decl, bool in_code) to the contrary in the innermost scope, generate an error. */ static bool -omp_is_private (struct gimplify_omp_ctx *ctx, tree decl, bool simd) +omp_is_private (struct gimplify_omp_ctx *ctx, tree decl, int simd) { splay_tree_node n; @@ -5827,13 +5827,13 @@ omp_is_private (struct gimplify_omp_ctx *ctx, tree decl, bool simd) else if ((n->value & GOVD_REDUCTION) != 0) error ("iteration variable %qE should not be reduction", DECL_NAME (decl)); - else if (simd && (n->value & GOVD_LASTPRIVATE) != 0) + else if (simd == 1 && (n->value & GOVD_LASTPRIVATE) != 0) error ("iteration variable %qE should not be lastprivate", DECL_NAME (decl)); else if (simd && (n->value & GOVD_PRIVATE) != 0) error ("iteration variable %qE should not be private", DECL_NAME (decl)); - else if (simd && (n->value & GOVD_LINEAR) != 0) + else if (simd == 2 && (n->value & GOVD_LINEAR) != 0) error ("iteration variable %qE is predetermined linear", DECL_NAME (decl)); } @@ -6270,9 +6270,17 @@ gimplify_adjust_omp_clauses_1 (splay_tree_node n, void *data) OMP_CLAUSE_CHAIN (clause) = nc; } } + if (code == OMP_CLAUSE_FIRSTPRIVATE && (flags & GOVD_LASTPRIVATE) != 0) + { + tree nc = build_omp_clause (input_location, OMP_CLAUSE_LASTPRIVATE); + OMP_CLAUSE_DECL (nc) = decl; + OMP_CLAUSE_LASTPRIVATE_FIRSTPRIVATE (nc) = 1; + OMP_CLAUSE_CHAIN (nc) = *list_p; + OMP_CLAUSE_CHAIN (clause) = nc; + lang_hooks.decls.omp_finish_clause (nc); + } *list_p = clause; lang_hooks.decls.omp_finish_clause (clause); - return 0; } @@ -6311,18 +6319,17 @@ gimplify_adjust_omp_clauses (tree *list_p) if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINEAR && ctx->outer_context && !(OMP_CLAUSE_LINEAR_NO_COPYIN (c) - && OMP_CLAUSE_LINEAR_NO_COPYOUT (c)) - && !is_global_var (decl)) + && OMP_CLAUSE_LINEAR_NO_COPYOUT (c))) { - if (ctx->outer_context->region_type == ORT_COMBINED_PARALLEL) + if (ctx->outer_context->combined_loop + && !OMP_CLAUSE_LINEAR_NO_COPYIN (c)) { n = splay_tree_lookup (ctx->outer_context->variables, (splay_tree_key) decl); if (n == NULL || (n->value & GOVD_DATA_SHARE_CLASS) == 0) { - int flags = OMP_CLAUSE_LINEAR_NO_COPYIN (c) - ? GOVD_LASTPRIVATE : GOVD_SHARED; + int flags = GOVD_FIRSTPRIVATE | GOVD_LASTPRIVATE; if (n == NULL) omp_add_variable (ctx->outer_context, decl, flags | GOVD_SEEN); @@ -6330,7 +6337,7 @@ gimplify_adjust_omp_clauses (tree *list_p) n->value |= flags | GOVD_SEEN; } } - else + else if (!is_global_var (decl)) omp_notice_variable (ctx->outer_context, decl, true); } } @@ -6599,8 +6606,8 @@ gimplify_omp_for (tree *expr_p, gimple_seq *pre_p) orig_for_stmt = for_stmt = *expr_p; - simd = TREE_CODE (for_stmt) == OMP_SIMD - || TREE_CODE (for_stmt) == CILK_SIMD; + simd = (TREE_CODE (for_stmt) == OMP_SIMD + || TREE_CODE (for_stmt) == CILK_SIMD); gimplify_scan_omp_clauses (&OMP_FOR_CLAUSES (for_stmt), pre_p, simd ? ORT_SIMD : ORT_WORKSHARE); @@ -6656,13 +6663,16 @@ gimplify_omp_for (tree *expr_p, gimple_seq *pre_p) /* Make sure the iteration variable is private. */ tree c = NULL_TREE; + tree c2 = NULL_TREE; if (orig_for_stmt != for_stmt) /* Do this only on innermost construct for combined ones. */; else if (simd) { splay_tree_node n = splay_tree_lookup (gimplify_omp_ctxp->variables, (splay_tree_key)decl); - omp_is_private (gimplify_omp_ctxp, decl, simd); + omp_is_private (gimplify_omp_ctxp, decl, + 1 + (TREE_VEC_LENGTH (OMP_FOR_INIT (for_stmt)) + != 1)); if (n != NULL && (n->value & GOVD_DATA_SHARE_CLASS) != 0) omp_notice_variable (gimplify_omp_ctxp, decl, true); else if (TREE_VEC_LENGTH (OMP_FOR_INIT (for_stmt)) == 1) @@ -6688,13 +6698,14 @@ gimplify_omp_for (tree *expr_p, gimple_seq *pre_p) : OMP_CLAUSE_PRIVATE); OMP_CLAUSE_DECL (c) = decl; OMP_CLAUSE_CHAIN (c) = OMP_FOR_CLAUSES (for_stmt); + OMP_FOR_CLAUSES (for_stmt) = c; omp_add_variable (gimplify_omp_ctxp, decl, (lastprivate ? GOVD_LASTPRIVATE : GOVD_PRIVATE) - | GOVD_SEEN); + | GOVD_EXPLICIT | GOVD_SEEN); c = NULL_TREE; } } - else if (omp_is_private (gimplify_omp_ctxp, decl, simd)) + else if (omp_is_private (gimplify_omp_ctxp, decl, 0)) omp_notice_variable (gimplify_omp_ctxp, decl, true); else omp_add_variable (gimplify_omp_ctxp, decl, GOVD_PRIVATE | GOVD_SEEN); @@ -6711,7 +6722,25 @@ gimplify_omp_for (tree *expr_p, gimple_seq *pre_p) gimplify_seq_add_stmt (&for_body, gimple_build_assign (decl, var)); - omp_add_variable (gimplify_omp_ctxp, var, GOVD_PRIVATE | GOVD_SEEN); + if (simd && TREE_VEC_LENGTH (OMP_FOR_INIT (for_stmt)) == 1) + { + c2 = build_omp_clause (input_location, OMP_CLAUSE_LINEAR); + OMP_CLAUSE_LINEAR_NO_COPYIN (c2) = 1; + OMP_CLAUSE_LINEAR_NO_COPYOUT (c2) = 1; + OMP_CLAUSE_DECL (c2) = var; + OMP_CLAUSE_CHAIN (c2) = OMP_FOR_CLAUSES (for_stmt); + OMP_FOR_CLAUSES (for_stmt) = c2; + omp_add_variable (gimplify_omp_ctxp, var, + GOVD_LINEAR | GOVD_EXPLICIT | GOVD_SEEN); + if (c == NULL_TREE) + { + c = c2; + c2 = NULL_TREE; + } + } + else + omp_add_variable (gimplify_omp_ctxp, var, + GOVD_PRIVATE | GOVD_SEEN); } else var = decl; @@ -6814,13 +6843,22 @@ gimplify_omp_for (tree *expr_p, gimple_seq *pre_p) gcc_unreachable (); } + if (c2) + { + gcc_assert (c); + OMP_CLAUSE_LINEAR_STEP (c2) = OMP_CLAUSE_LINEAR_STEP (c); + } + if ((var != decl || TREE_VEC_LENGTH (OMP_FOR_INIT (for_stmt)) > 1) && orig_for_stmt == for_stmt) { for (c = OMP_FOR_CLAUSES (for_stmt); c ; c = OMP_CLAUSE_CHAIN (c)) - if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LASTPRIVATE - && OMP_CLAUSE_DECL (c) == decl - && OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c) == NULL) + if (((OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LASTPRIVATE + && OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c) == NULL) + || (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINEAR + && !OMP_CLAUSE_LINEAR_NO_COPYOUT (c) + && OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c) == NULL)) + && OMP_CLAUSE_DECL (c) == decl) { t = TREE_VEC_ELT (OMP_FOR_INCR (for_stmt), i); gcc_assert (TREE_CODE (t) == MODIFY_EXPR); @@ -6832,8 +6870,12 @@ gimplify_omp_for (tree *expr_p, gimple_seq *pre_p) gcc_assert (TREE_OPERAND (t, 0) == var); t = build2 (TREE_CODE (t), TREE_TYPE (decl), decl, TREE_OPERAND (t, 1)); - gimplify_assign (decl, t, - &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c)); + gimple_seq *seq; + if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LASTPRIVATE) + seq = &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c); + else + seq = &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c); + gimplify_assign (decl, t, seq); } } } diff --git a/gcc/go/gofrontend/import-archive.cc b/gcc/go/gofrontend/import-archive.cc index 9a1d5b3..34fb528 100644 --- a/gcc/go/gofrontend/import-archive.cc +++ b/gcc/go/gofrontend/import-archive.cc @@ -261,7 +261,7 @@ Archive_file::interpret_header(const Archive_header* hdr, off_t off, char size_string[size_string_size + 1]; memcpy(size_string, hdr->ar_size, size_string_size); char* ps = size_string + size_string_size; - while (ps[-1] == ' ') + while (ps > size_string && ps[-1] == ' ') --ps; *ps = '\0'; diff --git a/gcc/loop-init.c b/gcc/loop-init.c index 2c2c269..4cc561c 100644 --- a/gcc/loop-init.c +++ b/gcc/loop-init.c @@ -94,20 +94,15 @@ loop_optimizer_init (unsigned flags) else { bool recorded_exits = loops_state_satisfies_p (LOOPS_HAVE_RECORDED_EXITS); + bool needs_fixup = loops_state_satisfies_p (LOOPS_NEED_FIXUP); gcc_assert (cfun->curr_properties & PROP_loops); /* Ensure that the dominators are computed, like flow_loops_find does. */ calculate_dominance_info (CDI_DOMINATORS); - if (loops_state_satisfies_p (LOOPS_NEED_FIXUP)) - { - loops_state_clear (~0U); - fix_loop_structure (NULL); - } - #ifdef ENABLE_CHECKING - else + if (!needs_fixup) verify_loop_structure (); #endif @@ -115,6 +110,14 @@ loop_optimizer_init (unsigned flags) if (recorded_exits) release_recorded_exits (); loops_state_clear (~0U); + + if (needs_fixup) + { + /* Apply LOOPS_MAY_HAVE_MULTIPLE_LATCHES early as fix_loop_structure + re-applies flags. */ + loops_state_set (flags & LOOPS_MAY_HAVE_MULTIPLE_LATCHES); + fix_loop_structure (NULL); + } } /* Apply flags to loops. */ diff --git a/gcc/lto-streamer-out.c b/gcc/lto-streamer-out.c index 69b5a79..b193d73 100644 --- a/gcc/lto-streamer-out.c +++ b/gcc/lto-streamer-out.c @@ -2022,6 +2022,29 @@ copy_function (struct cgraph_node *node) lto_end_section (); } +/* Wrap symbol references in *TP inside a type-preserving MEM_REF. */ + +static tree +wrap_refs (tree *tp, int *ws, void *) +{ + tree t = *tp; + if (handled_component_p (t) + && TREE_CODE (TREE_OPERAND (t, 0)) == VAR_DECL) + { + tree decl = TREE_OPERAND (t, 0); + tree ptrtype = build_pointer_type (TREE_TYPE (decl)); + TREE_OPERAND (t, 0) = build2 (MEM_REF, TREE_TYPE (decl), + build1 (ADDR_EXPR, ptrtype, decl), + build_int_cst (ptrtype, 0)); + TREE_THIS_VOLATILE (TREE_OPERAND (t, 0)) = TREE_THIS_VOLATILE (decl); + *ws = 0; + } + else if (TREE_CODE (t) == CONSTRUCTOR) + ; + else if (!EXPR_P (t)) + *ws = 0; + return NULL_TREE; +} /* Main entry point from the pass manager. */ @@ -2043,24 +2066,33 @@ lto_output (void) for (i = 0; i < n_nodes; i++) { symtab_node *snode = lto_symtab_encoder_deref (encoder, i); - cgraph_node *node = dyn_cast (snode); - if (node - && lto_symtab_encoder_encode_body_p (encoder, node) - && !node->alias) + if (cgraph_node *node = dyn_cast (snode)) { + if (lto_symtab_encoder_encode_body_p (encoder, node) + && !node->alias) + { #ifdef ENABLE_CHECKING - gcc_assert (!bitmap_bit_p (output, DECL_UID (node->decl))); - bitmap_set_bit (output, DECL_UID (node->decl)); + gcc_assert (!bitmap_bit_p (output, DECL_UID (node->decl))); + bitmap_set_bit (output, DECL_UID (node->decl)); #endif - decl_state = lto_new_out_decl_state (); - lto_push_out_decl_state (decl_state); - if (gimple_has_body_p (node->decl) || !flag_wpa) - output_function (node); - else - copy_function (node); - gcc_assert (lto_get_out_decl_state () == decl_state); - lto_pop_out_decl_state (); - lto_record_function_out_decl_state (node->decl, decl_state); + decl_state = lto_new_out_decl_state (); + lto_push_out_decl_state (decl_state); + if (gimple_has_body_p (node->decl) || !flag_wpa) + output_function (node); + else + copy_function (node); + gcc_assert (lto_get_out_decl_state () == decl_state); + lto_pop_out_decl_state (); + lto_record_function_out_decl_state (node->decl, decl_state); + } + } + else if (varpool_node *node = dyn_cast (snode)) + { + /* Wrap symbol references inside the ctor in a type + preserving MEM_REF. */ + tree ctor = DECL_INITIAL (node->decl); + if (ctor && !in_lto_p) + walk_tree (&ctor, wrap_refs, NULL, NULL); } } diff --git a/gcc/omp-low.c b/gcc/omp-low.c index 69a7d7e..26e4849 100644 --- a/gcc/omp-low.c +++ b/gcc/omp-low.c @@ -1730,6 +1730,9 @@ scan_sharing_clauses (tree clauses, omp_context *ctx) if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_REDUCTION && OMP_CLAUSE_REDUCTION_PLACEHOLDER (c)) scan_array_reductions = true; + else if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINEAR + && OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c)) + scan_array_reductions = true; break; case OMP_CLAUSE_SHARED: @@ -1816,6 +1819,9 @@ scan_sharing_clauses (tree clauses, omp_context *ctx) else if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LASTPRIVATE && OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c)) scan_omp (&OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c), ctx); + else if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINEAR + && OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c)) + scan_omp (&OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c), ctx); } /* Create a new name for omp child function. Returns an identifier. */ @@ -3803,6 +3809,14 @@ lower_lastprivate_clauses (tree clauses, tree predicate, gimple_seq *stmt_list, OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c)); OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (c) = NULL; } + else if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_LINEAR + && OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c)) + { + lower_omp (&OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c), ctx); + gimple_seq_add_seq (stmt_list, + OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c)); + OMP_CLAUSE_LINEAR_GIMPLE_SEQ (c) = NULL; + } x = build_outer_var_ref (var, ctx); if (is_reference (var)) @@ -5570,6 +5584,12 @@ expand_omp_for_generic (struct omp_region *region, { stmt = gimple_build_assign (endvar, iend); gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING); + if (useless_type_conversion_p (TREE_TYPE (fd->loop.v), TREE_TYPE (iend))) + stmt = gimple_build_assign (fd->loop.v, iend); + else + stmt = gimple_build_assign_with_ops (NOP_EXPR, fd->loop.v, iend, + NULL_TREE); + gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING); } if (fd->collapse > 1) expand_omp_for_init_vars (fd, &gsi, counts, inner_stmt, startvar); @@ -5986,6 +6006,12 @@ expand_omp_for_static_nochunk (struct omp_region *region, { stmt = gimple_build_assign (endvar, e); gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING); + if (useless_type_conversion_p (TREE_TYPE (fd->loop.v), TREE_TYPE (e))) + stmt = gimple_build_assign (fd->loop.v, e); + else + stmt = gimple_build_assign_with_ops (NOP_EXPR, fd->loop.v, e, + NULL_TREE); + gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING); } if (fd->collapse > 1) expand_omp_for_init_vars (fd, &gsi, counts, inner_stmt, startvar); @@ -6371,6 +6397,12 @@ expand_omp_for_static_chunk (struct omp_region *region, { stmt = gimple_build_assign (endvar, e); gsi_insert_after (&si, stmt, GSI_CONTINUE_LINKING); + if (useless_type_conversion_p (TREE_TYPE (fd->loop.v), TREE_TYPE (e))) + stmt = gimple_build_assign (fd->loop.v, e); + else + stmt = gimple_build_assign_with_ops (NOP_EXPR, fd->loop.v, e, + NULL_TREE); + gsi_insert_after (&si, stmt, GSI_CONTINUE_LINKING); } if (fd->collapse > 1) expand_omp_for_init_vars (fd, &si, counts, inner_stmt, startvar); diff --git a/gcc/opts.c b/gcc/opts.c index fdc903f..3f3db1a 100644 --- a/gcc/opts.c +++ b/gcc/opts.c @@ -431,8 +431,8 @@ static const struct default_options default_options_table[] = { OPT_LEVELS_1_PLUS, OPT_fguess_branch_probability, NULL, 1 }, { OPT_LEVELS_1_PLUS, OPT_fcprop_registers, NULL, 1 }, { OPT_LEVELS_1_PLUS, OPT_fforward_propagate, NULL, 1 }, - { OPT_LEVELS_1_PLUS, OPT_fif_conversion, NULL, 1 }, - { OPT_LEVELS_1_PLUS, OPT_fif_conversion2, NULL, 1 }, + { OPT_LEVELS_1_PLUS_NOT_DEBUG, OPT_fif_conversion, NULL, 1 }, + { OPT_LEVELS_1_PLUS_NOT_DEBUG, OPT_fif_conversion2, NULL, 1 }, { OPT_LEVELS_1_PLUS, OPT_fipa_pure_const, NULL, 1 }, { OPT_LEVELS_1_PLUS, OPT_fipa_reference, NULL, 1 }, { OPT_LEVELS_1_PLUS, OPT_fipa_profile, NULL, 1 }, diff --git a/gcc/passes.c b/gcc/passes.c index 60fb135..377b247 100644 --- a/gcc/passes.c +++ b/gcc/passes.c @@ -2109,20 +2109,6 @@ execute_all_ipa_transforms (void) } } -/* Callback for do_per_function to apply all IPA transforms. */ - -static void -apply_ipa_transforms (void *data) -{ - struct cgraph_node *node = cgraph_get_node (current_function_decl); - if (!node->global.inlined_to && node->ipa_transforms_to_apply.exists ()) - { - *(bool *)data = true; - execute_all_ipa_transforms (); - rebuild_cgraph_edges (); - } -} - /* Check if PASS is explicitly disabled or enabled and return the gate status. FUNC is the function to be processed, and GATE_STATUS is the gate status determined by pass manager by @@ -2194,8 +2180,26 @@ execute_one_pass (opt_pass *pass) Apply all trnasforms first. */ if (pass->type == SIMPLE_IPA_PASS) { + struct cgraph_node *node; bool applied = false; - do_per_function (apply_ipa_transforms, (void *)&applied); + FOR_EACH_DEFINED_FUNCTION (node) + if (node->analyzed + && cgraph_function_with_gimple_body_p (node) + && (!node->clone_of || node->decl != node->clone_of->decl)) + { + if (!node->global.inlined_to + && node->ipa_transforms_to_apply.exists ()) + { + cgraph_get_body (node); + push_cfun (DECL_STRUCT_FUNCTION (node->decl)); + execute_all_ipa_transforms (); + rebuild_cgraph_edges (); + free_dominance_info (CDI_DOMINATORS); + free_dominance_info (CDI_POST_DOMINATORS); + pop_cfun (); + applied = true; + } + } if (applied) symtab_remove_unreachable_nodes (true, dump_file); /* Restore current_pass. */ diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index b7e3dfb..d9af0fe 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,7 @@ +2014-05-01 Joseph Myers + + * sv.po: Update. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/gcc/po/sv.po b/gcc/po/sv.po index 0bae3b6..b38f708 100644 --- a/gcc/po/sv.po +++ b/gcc/po/sv.po @@ -16,7 +16,7 @@ msgstr "" "Project-Id-Version: gcc 4.9-b20140202\n" "Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n" "POT-Creation-Date: 2014-02-02 17:35+0000\n" -"PO-Revision-Date: 2014-03-30 20:23+0200\n" +"PO-Revision-Date: 2014-04-11 20:56+0200\n" "Last-Translator: Göran Uddeborg \n" "Language-Team: Swedish \n" "Language: sv\n" @@ -1493,7 +1493,7 @@ msgstr "attributen för optimeringsnivåer stämmer inte" #: cif-code.def:125 msgid "callee refers to comdat-local symbols" -msgstr "den anropade referarar till comdat-lokala symboler" +msgstr "den anropade refererar till comdat-lokala symboler" #. The remainder are real diagnostic types. #: diagnostic.def:33 @@ -6065,7 +6065,7 @@ msgstr "Varna för missbruk av pragman" #: c-family/c.opt:653 msgid "Warn about __TIME__, __DATE__ and __TIMESTAMP__ usage" -msgstr "Warn för använding av __TIME__, __DATE__ och __TIMESTAMP__" +msgstr "Varna för användning av __TIME__, __DATE__ och __TIMESTAMP__" #: c-family/c.opt:657 msgid "Warn if a property for an Objective-C object has no assign semantics specified" @@ -12220,7 +12220,7 @@ msgstr "-dumpdir \tAnge katalognamn att användas för dumpar" #: common.opt:811 msgid "Aggressively optimize loops using language constraints" -msgstr "Optimera aggresivt slingor med användning av språkbegränsningar" +msgstr "Optimera aggressivt slingor med användning av språkbegränsningar" #: common.opt:815 msgid "Align the start of functions" @@ -13449,7 +13449,7 @@ msgstr "okänd kostnadsmodell för vektorisering %qs" #: common.opt:2332 msgid "Enables the dynamic vectorizer cost model. Preserved for backward compatibility." -msgstr "Aktivera den dynamiska kostnadsmodellen för vekoriseraren. Bevarad för bakåtkompatibilitet." +msgstr "Aktivera den dynamiska kostnadsmodellen för vektoriseraren. Bevarad för bakåtkompatibilitet." #: common.opt:2336 msgid "Enables the unlimited vectorizer cost model. Preserved for backward compatibility." @@ -19151,7 +19151,7 @@ msgstr "längden stämmer inte i uttryck" #: c/c-array-notation.c:721 cp/cp-array-notation.c:610 #, gcc-internal-format msgid "rank mismatch between %qE and %qE" -msgstr "ordingen stämmer inte mellan %qE och %qE" +msgstr "ordningen stämmer inte mellan %qE och %qE" #. Here the original expression is printed as a "heads-up" #. to the programmer. This is because since there is no @@ -25782,7 +25782,7 @@ msgstr "felaktig DISPOSE-konstruktion: %d" msgid "too much stack space to dispose of: %d" msgstr "för mycket stackutrymme att göra av med: %d" -# Förmodligen en felstavning i orginalet, men tills jag vet säkert +# Förmodligen en felstavning i originalet, men tills jag vet säkert # behåller jag den #: config/v850/v850.c:2788 #, gcc-internal-format, gfc-internal-format @@ -28130,7 +28130,7 @@ msgstr "den andra matchen är här" #: c/c-parser.c:6884 #, gcc-internal-format msgid "%<_Generic%> selector of type %qT is not compatible with any association" -msgstr "%<_Generic%>-väljare av typ %qT är inte kompatiblem med någon association" +msgstr "%<_Generic%>-väljare av typ %qT är inte kompatibel med någon association" #: c/c-parser.c:7039 c/c-parser.c:7519 c/c-parser.c:7538 #, gcc-internal-format @@ -28185,7 +28185,7 @@ msgstr "-fcilkplus måste vara aktiverat för att använda %<_Cilk_spawn%>" #: c/c-parser.c:7505 cp/parser.c:5807 #, gcc-internal-format msgid "consecutive %<_Cilk_spawn%> keywords are not permitted" -msgstr "konsektiva %<_Cilk_spawn%>-nyckelord är inte tillåtet" +msgstr "konsekutiva %<_Cilk_spawn%>-nyckelord är inte tillåtet" #: c/c-parser.c:7573 #, gcc-internal-format @@ -31055,7 +31055,7 @@ msgstr "%qD kan inte vara en skalär när %qD inte är det" #: cp/cp-array-notation.c:849 cp/cp-array-notation.c:855 #, gcc-internal-format msgid "rank mismatch with controlling expression of parent if-statement" -msgstr "ordingen stämmer inte med det styrande uttrycket i förälder-if-satsen" +msgstr "ordningen stämmer inte med det styrande uttrycket i förälder-if-satsen" #: cp/cp-array-notation.c:1250 #, gcc-internal-format @@ -31090,7 +31090,7 @@ msgstr "startindex och längdfält är nödvändiga för att använda vektornota #: cp/cp-array-notation.c:1422 #, gcc-internal-format msgid "array notation cannot be used with function type" -msgstr "vektornotation kan inte användas användas med en funktionstyp" +msgstr "vektornotation kan inte användas med en funktionstyp" #: cp/cp-array-notation.c:1432 #, gcc-internal-format @@ -31100,7 +31100,7 @@ msgstr "ordningen på en vektornotations trippels startindex är inte noll" #: cp/cp-array-notation.c:1438 #, gcc-internal-format msgid "rank of an array notation triplet%'s length is not zero" -msgstr "ordingen på en vektornotations trippels längd är inte noll" +msgstr "ordningen på en vektornotations trippels längd är inte noll" #: cp/cp-array-notation.c:1443 #, gcc-internal-format @@ -31450,7 +31450,7 @@ msgstr "standardtypkonvertering kan inte härleda mallargumentet för %qD" #: cp/cvt.c:1659 #, gcc-internal-format msgid "ambiguous default type conversion from %qT" -msgstr "tvetydig standartypkonvertering från %qT" +msgstr "tvetydig standardtypkonvertering från %qT" #: cp/cvt.c:1661 #, gcc-internal-format @@ -33747,7 +33747,7 @@ msgstr "%qD är redan definierad i klassen %qT" #: cp/decl.c:14531 cp/decl2.c:4673 #, gcc-internal-format msgid "use of %qD before deduction of %" -msgstr "använding av %qD före härledning av %" +msgstr "användning av %qD före härledning av %" #: cp/decl2.c:322 #, gcc-internal-format @@ -36027,7 +36027,7 @@ msgstr "användning av % i lambdaparameterdeklarationer är endast tillg #: cp/parser.c:14516 #, gcc-internal-format msgid "use of % in parameter declaration only available with -std=c++1y or -std=gnu++1y" -msgstr "använding av % i parameterdeklarationer är endast tillgängligt med -std=c++1y eller -std=gnu++1y" +msgstr "användning av % i parameterdeklarationer är endast tillgängligt med -std=c++1y eller -std=gnu++1y" #: cp/parser.c:14521 #, gcc-internal-format @@ -37288,7 +37288,7 @@ msgstr " men %d behövs" #: cp/pt.c:4861 #, gcc-internal-format msgid "template arguments to %qD do not match original template %qD" -msgstr "mallargument till %qD stämmer inte med orginalmallen %qD" +msgstr "mallargument till %qD stämmer inte med originalmallen %qD" #: cp/pt.c:4865 #, gcc-internal-format @@ -38326,7 +38326,7 @@ msgstr "det går inte att applicera % på destrueraren %<~%T%>" #: cp/semantics.c:3800 #, gcc-internal-format msgid "second operand of % is neither a single identifier nor a sequence of member accesses and array references" -msgstr "andra operanden till % är varken en ensam idientifierare eller en sekvens av medlemsåtkomster och vektorreferenser" +msgstr "andra operanden till % är varken en ensam identifierare eller en sekvens av medlemsåtkomster och vektorreferenser" #: cp/semantics.c:3808 #, gcc-internal-format @@ -48120,7 +48120,7 @@ msgstr "Variabeln ”%s” vid %L av TYPE(C_PTR) eller TYPE(C_FUNPTR) får inte #: fortran/resolve.c:13229 #, gcc-internal-format, gfc-internal-format msgid "Variable '%s' at %L with coarray component shall be a nonpointer, nonallocatable scalar, which is not a coarray" -msgstr "Variabeln ”%s” vid %L med co-vektorkomponent skall vara en skalär som inte är en pekare eller allokerbar och inte en co-vaktor" +msgstr "Variabeln ”%s” vid %L med co-vektorkomponent skall vara en skalär som inte är en pekare eller allokerbar och inte en co-vektor" #: fortran/resolve.c:13244 #, gcc-internal-format, gfc-internal-format @@ -49576,12 +49576,12 @@ msgstr "tidigare definition här" #: lto/lto-symtab.c:404 #, gcc-internal-format msgid "type of %qD does not match original declaration" -msgstr "typen på %qD stämmer inte med orginaldeklarationen" +msgstr "typen på %qD stämmer inte med originaldeklarationen" #: lto/lto-symtab.c:412 #, gcc-internal-format msgid "alignment of %qD is bigger than original declaration" -msgstr "justering av %qD är större än orginaldeklarationen" +msgstr "justering av %qD är större än originaldeklarationen" #: lto/lto-symtab.c:418 lto/lto-symtab.c:517 #, gcc-internal-format diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0c40684..1591a08 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,144 @@ +2014-05-02 Bill Schmidt + + PR tree-optimization/60930 + * gcc.dg/torture/pr60930.c: New test. + +2014-04-30 Michael Meissner + + Back port from mainline + 2014-04-24 Michael Meissner + + * gcc.target/powerpc/pack01.c: New test to test the new pack and + unpack builtin functionss for 128-bit types. + * gcc.target/powerpc/pack02.c: Likewise. + * gcc.target/powerpc/pack03.c: Likewise. + * gcc.target/powerpc/extend-divide-1.c: New test to test extended + divide builtin functionss. + * gcc.target/powerpc/extend-divide-2.c: Likewise. + * gcc.target/powerpc/bcd-1.c: New test for the new BCD builtin + functions. + * gcc.target/powerpc/bcd-2.c: Likewise. + * gcc.target/powerpc/bcd-3.c: Likewise. + * gcc.target/powerpc/dfp-builtin-1.c: New test for the new DFP + builtin functionss. + * gcc.target/powerpc/dfp-builtin-2.c: Likewise. + +2014-04-29 Pat Haugen + + Backport from mainline + 2014-04-17 Pat Haugen + + * gcc.target/powerpc/ti_math1.c: New. + * gcc.target/powerpc/ti_math2.c: New. + +2014-04-29 Jakub Jelinek + + PR tree-optimization/60971 + * c-c++-common/turtore/pr60971.c: New test. + +2014-04-26 Uros Bizjak + + * gcc.dg/tree-ssa/alias-30.c (dg-options): Dump only fre1 details. + * gcc.dg/vect/pr60505.c: Cleanup vect tree dump. + * g++.dg/ipa/devirt-27.C (dg-options): Remove -fdump-ipa-devirt. + +2014-04-25 Uros Bizjak + + * c-c++-common/gomp/pr60823-2.c: Require effective target + vect_simd_clones. + +2014-04-25 Jakub Jelinek + + PR tree-optimization/60960 + * gcc.c-torture/execute/pr60960.c: New test. + +2014-04-25 Eric Botcazou + + * gcc.c-torture/execute/20140425-1.c: New test. + +2014-04-25 Richard Biener + + PR ipa/60912 + * g++.dg/opt/pr60912.C: New testcase. + +2014-04-25 Richard Biener + + PR ipa/60911 + * gcc.dg/lto/pr60911_0.c: New testcase. + +2014-04-24 Jakub Jelinek + + * c-c++-common/gomp/atomic-16.c: Remove all dg-error directives. + Replace load with read and store with write. + +2014-04-23 Uros Bizjak + + Backport from mainline + 2014-04-21 Uros Bizjak + + PR target/60909 + * gcc.target/i386/pr60909-1.c: New test. + * gcc.target/i386/pr60909-2.c: Ditto. + +2014-04-23 Richard Biener + + PR tree-optimization/60903 + * gcc.dg/torture/pr60903.c: New testcase. + +2014-04-23 Richard Biener + + Backport from mainline + 2014-04-14 Richard Biener + + PR lto/60720 + * gcc.dg/lto/pr60720_0.c: New testcase. + * gcc.dg/lto/pr60720_1.c: Likewise. + +2014-04-23 Richard Biener + + PR middle-end/60895 + * g++.dg/torture/pr60895.C: New testcase. + +2014-04-23 Richard Biener + + PR middle-end/60891 + * gcc.dg/torture/pr60891.c: New testcase. + +2014-04-22 Michael Meissner + + Backport from mainline + 2014-04-21 Michael Meissner + + PR target/60735 + * gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does + not cause errors if -mspe. + +2014-04-22 Tobias Burnus + + Backport from mainline + 2014-04-11 Tobias Burnus + + PR fortran/58880 + PR fortran/60495 + * gfortran.dg/finalize_25.f90: New. + +2014-04-22 H.J. Lu + + Backport from mainline + 2014-04-22 H.J. Lu + + * gcc.target/i386/pr60868.c: New testcase. + +2014-04-22 Jakub Jelinek + + PR c/59073 + * c-c++-common/gomp/pr59073.c: New test. + +2014-04-22 Bill Schmidt + + * gcc.dg/vmx/merge-vsx.c: Add V4SI and V4SF tests. + * gcc.dg/vmx/merge-vsx-be-order.c: Likewise. + 2014-04-22 Richard Biener Backport from mainline @@ -116,7 +257,7 @@ 2014-04-12 Jerry DeLisle PR libfortran/60810 - gfortran.dg/arrayio_13.f90: New test. + * gfortran.dg/arrayio_13.f90: New test. 2014-04-11 Steve Ellcey Jakub Jelinek @@ -200,8 +341,7 @@ 2014-04-08 Jason Merrill - * lib/gcc-dg.exp (dg-build-dso): Reset dg-do-what-default to - compile. + * lib/gcc-dg.exp (dg-build-dso): Reset dg-do-what-default to compile. 2014-04-08 Andreas Krebbel @@ -321,10 +461,10 @@ 2014-04-04 Martin Jambor PR ipa/60640 - * g++.dg/ipa/pr60640-1.C: New test. - * g++.dg/ipa/pr60640-2.C: Likewise. - * g++.dg/ipa/pr60640-3.C: Likewise. - * g++.dg/ipa/pr60640-4.C: Likewise. + * g++.dg/ipa/pr60640-1.C: New test. + * g++.dg/ipa/pr60640-2.C: Likewise. + * g++.dg/ipa/pr60640-3.C: Likewise. + * g++.dg/ipa/pr60640-4.C: Likewise. 2014-04-04 Jeff Law @@ -436,7 +576,7 @@ 2014-04-01 Fabien Chêne - * g++.dg/init/ctor4.C: Adjust. + * g++.dg/init/ctor4.C: Adjust. * g++.dg/init/ctor4-1.C: New. * g++.dg/cpp0x/defaulted2.C: Adjust. @@ -524,8 +664,8 @@ 2014-03-27 Jeff Law - PR target/60648 - * g++.dg/pr60648.C: New test. + PR target/60648 + * g++.dg/pr60648.C: New test. 2014-03-28 Adam Butcher @@ -558,14 +698,13 @@ 2014-03-28 Andreas Krebbel - * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Remove s390 special - option. + * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Remove s390 special option. * lib/target-supports.exp: Return true for s390 - in check_effective_logical_op_short_circuit. + in check_effective_logical_op_short_circuit. 2014-03-28 Kirill Yukhin - * gcc.target/i386/avx512f-vshuff32x4-2.c: Fix initialization + * gcc.target/i386/avx512f-vshuff32x4-2.c: Fix initialization of second source operand. * gcc.target/i386/avx512f-vshuff64x2-2.c: Ditto. * gcc.target/i386/avx512f-vshufi32x4-2.c: Ditto. @@ -700,8 +839,8 @@ 2014-03-24 Marek Polacek - * c-c++-common/ubsan/div-by-zero-4.c: Don't include limits.h. Define - INT_MIN. + * c-c++-common/ubsan/div-by-zero-4.c: Don't include limits.h. + Define INT_MIN. * c-c++-common/ubsan/overflow-1.c: Check for unwanted output. * c-c++-common/ubsan/overflow-add-1.c: Likewise. * c-c++-common/ubsan/overflow-mul-1.c: Likewise. @@ -786,8 +925,7 @@ 2014-03-21 Tobias Burnus PR fortran/60599 - * lib/gcc-dg.exp (scan-module): Uncompress .mod files for - reading. + * lib/gcc-dg.exp (scan-module): Uncompress .mod files for reading. 2014-03-20 Jakub Jelinek @@ -1605,8 +1743,7 @@ 2014-02-19 Paul Pluzhnikov - * gcc.dg/vect/no-vfa-vect-depend-2.c (main1): Fix buffer - overflow. + * gcc.dg/vect/no-vfa-vect-depend-2.c (main1): Fix buffer overflow. 2014-02-19 Jakub Jelinek @@ -1915,8 +2052,7 @@ 2014-02-10 Jakub Jelinek - * gcc.dg/vect/pr59984.c: Require effective target - vect_simd_clones. + * gcc.dg/vect/pr59984.c: Require effective target vect_simd_clones. 2014-02-09 Paul Thomas @@ -3163,8 +3299,8 @@ * gfortran.dg/vect/fast-math-mgrid-resid.f: Change -fdump-tree-optimized to -fdump-tree-pcom-details in dg-options and cleanup-tree-dump from optimized to pcom. Remove scan-tree-dump-times - for vect_\[^\\n\]*\\+, add scan-tree-dump-times for no suitable chains and - Executing predictive commoning without unrolling. + for vect_\[^\\n\]*\\+, add scan-tree-dump-times for no suitable + chains and Executing predictive commoning without unrolling. 2014-01-14 Kirill Yukhin diff --git a/gcc/testsuite/c-c++-common/gomp/atomic-16.c b/gcc/testsuite/c-c++-common/gomp/atomic-16.c index 87fbaa2..9332396 100644 --- a/gcc/testsuite/c-c++-common/gomp/atomic-16.c +++ b/gcc/testsuite/c-c++-common/gomp/atomic-16.c @@ -7,28 +7,28 @@ void foo () { int v; - #pragma omp atomic seq_cst load /* { dg-error "expected end of line" } */ - v = x; /* { dg-error "invalid form" } */ - #pragma omp atomic seq_cst, load /* { dg-error "expected end of line" } */ - v = x; /* { dg-error "invalid form" } */ - #pragma omp atomic seq_cst store /* { dg-error "expected end of line" } */ - x = v; /* { dg-error "invalid form" } */ - #pragma omp atomic seq_cst ,store /* { dg-error "expected end of line" } */ - x = v; /* { dg-error "invalid form" } */ - #pragma omp atomic seq_cst update /* { dg-error "expected end of line" } */ + #pragma omp atomic seq_cst read + v = x; + #pragma omp atomic seq_cst, read + v = x; + #pragma omp atomic seq_cst write + x = v; + #pragma omp atomic seq_cst ,write + x = v; + #pragma omp atomic seq_cst update x += v; - #pragma omp atomic seq_cst , update /* { dg-error "expected end of line" } */ + #pragma omp atomic seq_cst , update x += v; - #pragma omp atomic seq_cst capture /* { dg-error "expected end of line" } */ - v = x += 2; /* { dg-error "invalid form" } */ - #pragma omp atomic seq_cst, capture /* { dg-error "expected end of line" } */ - v = x += 2; /* { dg-error "invalid form" } */ - #pragma omp atomic load , seq_cst /* { dg-error "expected end of line" } */ - v = x; /* { dg-error "invalid form" } */ - #pragma omp atomic store ,seq_cst /* { dg-error "expected end of line" } */ - x = v; /* { dg-error "invalid form" } */ - #pragma omp atomic update, seq_cst /* { dg-error "expected end of line" } */ + #pragma omp atomic seq_cst capture + v = x += 2; + #pragma omp atomic seq_cst, capture + v = x += 2; + #pragma omp atomic read , seq_cst + v = x; + #pragma omp atomic write ,seq_cst + x = v; + #pragma omp atomic update, seq_cst x += v; - #pragma omp atomic capture, seq_cst /* { dg-error "expected end of line" } */ + #pragma omp atomic capture, seq_cst v = x += 2; } diff --git a/gcc/testsuite/c-c++-common/gomp/pr59073.c b/gcc/testsuite/c-c++-common/gomp/pr59073.c new file mode 100644 index 0000000..543ff5d --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/pr59073.c @@ -0,0 +1,12 @@ +/* PR c/59073 */ +/* { dg-do compile } */ +/* { dg-options "-fopenmp" } */ + +void +foo () +{ + int i; +#pragma omp distribute parallel for + for (i = 0; i < 10; i) /* { dg-error "invalid increment expression" } */ + ; +} diff --git a/gcc/testsuite/c-c++-common/gomp/pr60823-2.c b/gcc/testsuite/c-c++-common/gomp/pr60823-2.c index e0bf570..4c87620 100644 --- a/gcc/testsuite/c-c++-common/gomp/pr60823-2.c +++ b/gcc/testsuite/c-c++-common/gomp/pr60823-2.c @@ -1,5 +1,6 @@ /* PR tree-optimization/60823 */ /* { dg-do run } */ +/* { dg-require-effective-target vect_simd_clones } */ /* { dg-options "-O2 -fopenmp-simd" } */ #pragma omp declare simd simdlen(4) notinbranch diff --git a/gcc/testsuite/c-c++-common/torture/pr60971.c b/gcc/testsuite/c-c++-common/torture/pr60971.c new file mode 100644 index 0000000..b7a967d --- /dev/null +++ b/gcc/testsuite/c-c++-common/torture/pr60971.c @@ -0,0 +1,34 @@ +/* PR tree-optimization/60971 */ +/* { dg-do run } */ + +#ifndef __cplusplus +#define bool _Bool +#endif + +volatile unsigned char c; + +__attribute__((noinline)) unsigned char +foo (void) +{ + return c; +} + +__attribute__((noinline)) bool +bar (void) +{ + return foo () & 1; +} + +int +main () +{ + c = 0x41; + c = bar (); + if (c != 1) + __builtin_abort (); + c = 0x20; + c = bar (); + if (c != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-aggr1.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-aggr1.C new file mode 100644 index 0000000..7e4da11 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-aggr1.C @@ -0,0 +1,17 @@ +// PR c++/60951 +// { dg-do compile { target c++11 } } + +struct Foo { + constexpr Foo(int x = 0) : memb(x) {} + int memb; +}; + +struct FooContainer { + Foo foo[2]; +}; + +void fubar() { + int nonConst = 0; + FooContainer fooContainer; + fooContainer = { { 0, nonConst } }; +} diff --git a/gcc/testsuite/g++.dg/cpp0x/defaulted49.C b/gcc/testsuite/g++.dg/cpp0x/defaulted49.C new file mode 100644 index 0000000..357be41 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/defaulted49.C @@ -0,0 +1,15 @@ +// PR c++/60980 +// { dg-do compile { target c++11 } } + +struct x0 +{ + x0 () = default; +}; +struct x1 +{ + x0 x2[2]; + void x3 () + { + x1 (); + } +}; diff --git a/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const3.C b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const3.C new file mode 100644 index 0000000..a1ffadd --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const3.C @@ -0,0 +1,38 @@ +// PR c++/60992 +// { dg-do compile { target c++11 } } + +struct ScopeGuardGenerator { }; + +struct FF +{ + template < class F, class ... Ts > + void + operator () (F & ...) + { + const int n = sizeof ... (Ts) + 1; + void *mutexes[n]; + auto _on_scope_exit_var_0 = + ScopeGuardGenerator () + [&mutexes] { }; + } +}; + +template < class F > +int operator+ (ScopeGuardGenerator, F) { return 1; } + +struct D +{ + template < class T0, class T1, class T2, class ... T > + void + operator () (T0, T1, const T2 & t2, T & ... t) + { + base (t2, t ...); + } + FF base; +}; + +D run_with_locks; + +void Fn () +{ + run_with_locks ([] { }, 0, 0); +} diff --git a/gcc/testsuite/g++.dg/ipa/devirt-27.C b/gcc/testsuite/g++.dg/ipa/devirt-27.C index 1dcf76c..749f40a 100644 --- a/gcc/testsuite/g++.dg/ipa/devirt-27.C +++ b/gcc/testsuite/g++.dg/ipa/devirt-27.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -fdump-ipa-devirt -fdump-tree-optimized" } */ +/* { dg-options "-O3 -fdump-tree-optimized" } */ struct A { int a; diff --git a/gcc/testsuite/g++.dg/opt/pr60912.C b/gcc/testsuite/g++.dg/opt/pr60912.C new file mode 100644 index 0000000..ad51ba7 --- /dev/null +++ b/gcc/testsuite/g++.dg/opt/pr60912.C @@ -0,0 +1,18 @@ +// { dg-do run } +// { dg-options "-O -fno-inline -fipa-pta" } + +struct IFoo +{ + virtual void Foo () = 0; +}; + +struct Bar:IFoo +{ + void Foo () {} +}; + +int main () +{ + (new Bar ())->Foo (); + return 0; +} diff --git a/gcc/testsuite/g++.dg/torture/pr60895.C b/gcc/testsuite/g++.dg/torture/pr60895.C new file mode 100644 index 0000000..0edd36a --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/pr60895.C @@ -0,0 +1,32 @@ +// { dg-do compile } + +struct C +{ + double elems[3]; +}; + +C +foo () +{ + C a; + double *f = a.elems; + int b; + for (; b;) + { + *f = 0; + ++f; + } + return a; +} + +struct J +{ + C c; + __attribute__((always_inline)) J () : c (foo ()) {} +}; + +void +bar () +{ + J (); +} diff --git a/gcc/testsuite/gcc.c-torture/execute/20140425-1.c b/gcc/testsuite/gcc.c-torture/execute/20140425-1.c new file mode 100644 index 0000000..c447ef9 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/20140425-1.c @@ -0,0 +1,23 @@ +/* PR target/60941 */ +/* Reported by Martin Husemann */ + +extern void abort (void); + +static void __attribute__((noinline)) +set (unsigned long *l) +{ + *l = 31; +} + +int main (void) +{ + unsigned long l; + int i; + + set (&l); + i = (int) l; + l = (unsigned long)(2U << i); + if (l != 0) + abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.c-torture/execute/pr60960.c b/gcc/testsuite/gcc.c-torture/execute/pr60960.c new file mode 100644 index 0000000..b4f08d4 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/pr60960.c @@ -0,0 +1,38 @@ +/* PR tree-optimization/60960 */ + +typedef unsigned char v4qi __attribute__ ((vector_size (4))); + +__attribute__((noinline, noclone)) v4qi +f1 (v4qi v) +{ + return v / 2; +} + +__attribute__((noinline, noclone)) v4qi +f2 (v4qi v) +{ + return v / (v4qi) { 2, 2, 2, 2 }; +} + +__attribute__((noinline, noclone)) v4qi +f3 (v4qi x, v4qi y) +{ + return x / y; +} + +int +main () +{ + v4qi x = { 5, 5, 5, 5 }; + v4qi y = { 2, 2, 2, 2 }; + v4qi z = f1 (x); + if (__builtin_memcmp (&y, &z, sizeof (y)) != 0) + __builtin_abort (); + z = f2 (x); + if (__builtin_memcmp (&y, &z, sizeof (y)) != 0) + __builtin_abort (); + z = f3 (x, y); + if (__builtin_memcmp (&y, &z, sizeof (y)) != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/lto/pr60720_0.c b/gcc/testsuite/gcc.dg/lto/pr60720_0.c new file mode 100644 index 0000000..79cef5d --- /dev/null +++ b/gcc/testsuite/gcc.dg/lto/pr60720_0.c @@ -0,0 +1,15 @@ +/* { dg-lto-do run } */ +/* { dg-extra-ld-options { -w } } */ + +/* ??? lto.exp does not allow to scan for + :1:12: warning: type of 'x' does not match original declaration + extern int x[]; + ^ + :1:5: note: previously declared here + int x; + ^ */ + +extern int x[]; +int *foo[] = { &x[0] }; + +int main() { return *foo[0]; } diff --git a/gcc/testsuite/gcc.dg/lto/pr60720_1.c b/gcc/testsuite/gcc.dg/lto/pr60720_1.c new file mode 100644 index 0000000..6d1a0d4 --- /dev/null +++ b/gcc/testsuite/gcc.dg/lto/pr60720_1.c @@ -0,0 +1 @@ +int x; diff --git a/gcc/testsuite/gcc.dg/lto/pr60911_0.c b/gcc/testsuite/gcc.dg/lto/pr60911_0.c new file mode 100644 index 0000000..e4820a2 --- /dev/null +++ b/gcc/testsuite/gcc.dg/lto/pr60911_0.c @@ -0,0 +1,21 @@ +// { dg-lto-do run } +// { dg-lto-options { { -O2 -flto -fipa-pta } } } + +int __attribute__ ((__noinline__)) f (unsigned *p, int *x) +{ + int y = *p++ & 0xfff; + *x++ = y; + *x = *p; + return y; +} + +int +main () +{ + unsigned u[2] = { 0x3aad, 0x5ad1 }; + int x[2] = { 17689, 23456 }; + + if (f (u, x) != 0xaad || x[0] != 0xaad || x[1] != 0x5ad1) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/torture/pr60891.c b/gcc/testsuite/gcc.dg/torture/pr60891.c new file mode 100644 index 0000000..c8fec87 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr60891.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-fno-tree-ch -fno-tree-cselim -fno-tree-dominator-opts" } */ + +int a, b, c, d, e, f; + +void foo (int x) +{ + for (;;) + { + int g = c; + if (x) + { + if (e) + while (a) + --f; + } + for (b = 5; b; b--) + { + } + if (!g) + x = 0; + } +} diff --git a/gcc/testsuite/gcc.dg/torture/pr60903.c b/gcc/testsuite/gcc.dg/torture/pr60903.c new file mode 100644 index 0000000..5d93ae3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr60903.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ + +extern int a, b, k, q; + +void +foo () +{ + if (a) + { + while (q) + { + lbl: + if (a) + { + a = 0; + goto lbl; + } + } + b = k; + } + goto lbl; +} diff --git a/gcc/testsuite/gcc.dg/torture/pr60930.c b/gcc/testsuite/gcc.dg/torture/pr60930.c new file mode 100644 index 0000000..5e35f19 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr60930.c @@ -0,0 +1,22 @@ +/* { dg-do run } */ + +int x = 1; + +__attribute__((noinline, noclone)) void +foo (unsigned long long t) +{ + asm volatile ("" : : "r" (&t)); + if (t == 1) + __builtin_abort (); +} + +int +main () +{ +#if __SIZEOF_LONG_LONG__ >= 8 + unsigned long long t = 0xffffffffffffffffULL * (0xffffffffUL * x); + if (t != 0xffffffff00000001ULL) + foo (t);; +#endif + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/alias-30.c b/gcc/testsuite/gcc.dg/tree-ssa/alias-30.c index addf128..7ef830d 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/alias-30.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/alias-30.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -fdump-tree-fre-details" } */ +/* { dg-options "-O -fdump-tree-fre1-details" } */ extern int posix_memalign(void **memptr, __SIZE_TYPE__ alignment, __SIZE_TYPE__ size); diff --git a/gcc/testsuite/gcc.dg/vect/pr60505.c b/gcc/testsuite/gcc.dg/vect/pr60505.c index 6940513..70e2ec0 100644 --- a/gcc/testsuite/gcc.dg/vect/pr60505.c +++ b/gcc/testsuite/gcc.dg/vect/pr60505.c @@ -10,3 +10,5 @@ void foo(char *in, char *out, int num) out[i] = (ovec[i] = in[i]); out[num] = ovec[num/2]; } + +/* { dg-final { cleanup-tree-dump "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c index 440ac9a..56e0b0e 100644 --- a/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c @@ -21,10 +21,19 @@ static void test() vector long long vlb = {0,1}; vector double vda = {-2.0,-1.0}; vector double vdb = {0.0,1.0}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; /* Result vectors. */ vector long long vlh, vll; vector double vdh, vdl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; /* Expected result vectors. */ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ @@ -32,20 +41,44 @@ static void test() vector long long vlrl = {0,-2}; vector double vdrh = {1.0,-1.0}; vector double vdrl = {0.0,-2.0}; + vector unsigned int vuirh = {6,2,7,3}; + vector unsigned int vuirl = {4,0,5,1}; + vector signed int vsirh = {2,-2,3,-1}; + vector signed int vsirl = {0,-4,1,-3}; + vector float vfrh = {2.0,-2.0,3.0,-1.0}; + vector float vfrl = {0.0,-4.0,1.0,-3.0}; #else vector long long vlrh = {-2,0}; vector long long vlrl = {-1,1}; vector double vdrh = {-2.0,0.0}; vector double vdrl = {-1.0,1.0}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; #endif vlh = vec_mergeh (vla, vlb); vll = vec_mergel (vla, vlb); vdh = vec_mergeh (vda, vdb); vdl = vec_mergel (vda, vdb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); check (vec_long_long_eq (vlh, vlrh), "vlh"); check (vec_long_long_eq (vll, vlrl), "vll"); check (vec_double_eq (vdh, vdrh), "vdh" ); check (vec_double_eq (vdl, vdrl), "vdl" ); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); } diff --git a/gcc/testsuite/gcc.dg/vmx/merge-vsx.c b/gcc/testsuite/gcc.dg/vmx/merge-vsx.c index 851f35b..40693e9 100644 --- a/gcc/testsuite/gcc.dg/vmx/merge-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/merge-vsx.c @@ -21,24 +21,51 @@ static void test() vector long long vlb = {0,1}; vector double vda = {-2.0,-1.0}; vector double vdb = {0.0,1.0}; + vector unsigned int vuia = {0,1,2,3}; + vector unsigned int vuib = {4,5,6,7}; + vector signed int vsia = {-4,-3,-2,-1}; + vector signed int vsib = {0,1,2,3}; + vector float vfa = {-4.0,-3.0,-2.0,-1.0}; + vector float vfb = {0.0,1.0,2.0,3.0}; /* Result vectors. */ vector long long vlh, vll; vector double vdh, vdl; + vector unsigned int vuih, vuil; + vector signed int vsih, vsil; + vector float vfh, vfl; /* Expected result vectors. */ vector long long vlrh = {-2,0}; vector long long vlrl = {-1,1}; vector double vdrh = {-2.0,0.0}; vector double vdrl = {-1.0,1.0}; + vector unsigned int vuirh = {0,4,1,5}; + vector unsigned int vuirl = {2,6,3,7}; + vector signed int vsirh = {-4,0,-3,1}; + vector signed int vsirl = {-2,2,-1,3}; + vector float vfrh = {-4.0,0.0,-3.0,1.0}; + vector float vfrl = {-2.0,2.0,-1.0,3.0}; vlh = vec_mergeh (vla, vlb); vll = vec_mergel (vla, vlb); vdh = vec_mergeh (vda, vdb); vdl = vec_mergel (vda, vdb); + vuih = vec_mergeh (vuia, vuib); + vuil = vec_mergel (vuia, vuib); + vsih = vec_mergeh (vsia, vsib); + vsil = vec_mergel (vsia, vsib); + vfh = vec_mergeh (vfa, vfb ); + vfl = vec_mergel (vfa, vfb ); check (vec_long_long_eq (vlh, vlrh), "vlh"); check (vec_long_long_eq (vll, vlrl), "vll"); check (vec_double_eq (vdh, vdrh), "vdh" ); check (vec_double_eq (vdl, vdrl), "vdl" ); + check (vec_all_eq (vuih, vuirh), "vuih"); + check (vec_all_eq (vuil, vuirl), "vuil"); + check (vec_all_eq (vsih, vsirh), "vsih"); + check (vec_all_eq (vsil, vsirl), "vsil"); + check (vec_all_eq (vfh, vfrh), "vfh"); + check (vec_all_eq (vfl, vfrl), "vfl"); } diff --git a/gcc/testsuite/gcc.target/i386/pr60868.c b/gcc/testsuite/gcc.target/i386/pr60868.c new file mode 100644 index 0000000..c30bbfc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr60868.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-options "-O0 -minline-all-stringops -minline-stringops-dynamically -march=core2" } */ + +void bar (float *); + +void foo (void) +{ + float b[256] = {0}; + bar(b); +} diff --git a/gcc/testsuite/gcc.target/i386/pr60909-1.c b/gcc/testsuite/gcc.target/i386/pr60909-1.c new file mode 100644 index 0000000..5a1ac3c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr60909-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mrdrnd" } */ + +extern void bar (int); + +void +foo (unsigned *u) +{ + int i = __builtin_ia32_rdrand32_step (u); + bar (i); +} diff --git a/gcc/testsuite/gcc.target/i386/pr60909-2.c b/gcc/testsuite/gcc.target/i386/pr60909-2.c new file mode 100644 index 0000000..dd35668 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr60909-2.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mrdseed" } */ + +extern void bar (int); + +void +foo (unsigned *u) +{ + int i = __builtin_ia32_rdseed_si_step (u); + bar (i); +} diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-1.c b/gcc/testsuite/gcc.target/powerpc/bcd-1.c new file mode 100644 index 0000000..c7496c2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/bcd-1.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "cdtbcd " 1 } } */ +/* { dg-final { scan-assembler-times "cbcdtd " 1 } } */ +/* { dg-final { scan-assembler-times "addg6s " 1 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ + +unsigned int +to_bcd (unsigned int a) +{ + return __builtin_cdtbcd (a); +} + +unsigned int +from_bcd (unsigned int a) +{ + return __builtin_cbcdtd (a); +} + +unsigned int +bcd_arith (unsigned int a, unsigned int b) +{ + return __builtin_addg6s (a, b); +} diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-2.c b/gcc/testsuite/gcc.target/powerpc/bcd-2.c new file mode 100644 index 0000000..d330b74 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/bcd-2.c @@ -0,0 +1,44 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler-times "bcdadd\[.\] " 2 } } */ +/* { dg-final { scan-assembler-times "bcdsub\[.\] " 2 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "mtvsr" } } */ +/* { dg-final { scan-assembler-not "mfvsr" } } */ +/* { dg-final { scan-assembler-not "lvx" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "stvx" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ + +typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; +typedef __int128_t scalar_128_t; +typedef unsigned long long scalar_64_t; + +vector_128_t +do_add_0 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdadd (a, b, 0); +} + +vector_128_t +do_add_1 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdadd (a, b, 1); +} + +vector_128_t +do_sub_0 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdsub (a, b, 0); +} + +vector_128_t +do_sub_1 (vector_128_t a, vector_128_t b) +{ + return __builtin_bcdsub (a, b, 1); +} diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-3.c b/gcc/testsuite/gcc.target/powerpc/bcd-3.c new file mode 100644 index 0000000..436cecf --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/bcd-3.c @@ -0,0 +1,103 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O2" } */ +/* { dg-final { scan-assembler-times "bcdadd\[.\] " 4 } } */ +/* { dg-final { scan-assembler-times "bcdsub\[.\] " 4 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "mtvsr" } } */ +/* { dg-final { scan-assembler-not "mfvsr" } } */ +/* { dg-final { scan-assembler-not "lvx" } } */ +/* { dg-final { scan-assembler-not "lxvw4x" } } */ +/* { dg-final { scan-assembler-not "lxvd2x" } } */ +/* { dg-final { scan-assembler-not "stvx" } } */ +/* { dg-final { scan-assembler-not "stxvw4x" } } */ +/* { dg-final { scan-assembler-not "stxvd2x" } } */ + +typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; +typedef __int128_t scalar_128_t; +typedef unsigned long long scalar_64_t; + +/* Test whether the peephole works to allow folding a bcdadd, with a + bcdadd_ into a single instruction. */ + +vector_128_t +do_add_lt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_lt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_add_eq (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_eq (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_add_gt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_gt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_add_ov (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdadd (a, b, 0); + if (__builtin_bcdadd_ov (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_lt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_lt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_eq (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_eq (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_gt (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_gt (a, b, 0)) + *p = 1; + + return ret; +} + +vector_128_t +do_sub_ov (vector_128_t a, vector_128_t b, int *p) +{ + vector_128_t ret = __builtin_bcdsub (a, b, 0); + if (__builtin_bcdsub_ov (a, b, 0)) + *p = 1; + + return ret; +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c new file mode 100644 index 0000000..614f272 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp-builtin-1.c @@ -0,0 +1,88 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "ddedpd " 4 } } */ +/* { dg-final { scan-assembler-times "denbcd " 2 } } */ +/* { dg-final { scan-assembler-times "dxex " 1 } } */ +/* { dg-final { scan-assembler-times "diex " 1 } } */ +/* { dg-final { scan-assembler-times "dscli " 2 } } */ +/* { dg-final { scan-assembler-times "dscri " 2 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "dctqpq" } } */ +/* { dg-final { scan-assembler-not "drdpq" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-not "lfd" } } */ + +_Decimal64 +do_dedpd_0 (_Decimal64 a) +{ + return __builtin_ddedpd (0, a); +} + +_Decimal64 +do_dedpd_1 (_Decimal64 a) +{ + return __builtin_ddedpd (1, a); +} + +_Decimal64 +do_dedpd_2 (_Decimal64 a) +{ + return __builtin_ddedpd (2, a); +} + +_Decimal64 +do_dedpd_3 (_Decimal64 a) +{ + return __builtin_ddedpd (3, a); +} + +_Decimal64 +do_enbcd_0 (_Decimal64 a) +{ + return __builtin_denbcd (0, a); +} + +_Decimal64 +do_enbcd_1 (_Decimal64 a) +{ + return __builtin_denbcd (1, a); +} + +_Decimal64 +do_xex (_Decimal64 a) +{ + return __builtin_dxex (a); +} + +_Decimal64 +do_iex (_Decimal64 a, _Decimal64 b) +{ + return __builtin_diex (a, b); +} + +_Decimal64 +do_scli_1 (_Decimal64 a) +{ + return __builtin_dscli (a, 1); +} + +_Decimal64 +do_scli_10 (_Decimal64 a) +{ + return __builtin_dscli (a, 10); +} + +_Decimal64 +do_scri_1 (_Decimal64 a) +{ + return __builtin_dscri (a, 1); +} + +_Decimal64 +do_scri_10 (_Decimal64 a) +{ + return __builtin_dscri (a, 10); +} diff --git a/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c new file mode 100644 index 0000000..189bc9a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/dfp-builtin-2.c @@ -0,0 +1,88 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "ddedpdq " 4 } } */ +/* { dg-final { scan-assembler-times "denbcdq " 2 } } */ +/* { dg-final { scan-assembler-times "dxexq " 1 } } */ +/* { dg-final { scan-assembler-times "diexq " 1 } } */ +/* { dg-final { scan-assembler-times "dscliq " 2 } } */ +/* { dg-final { scan-assembler-times "dscriq " 2 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ +/* { dg-final { scan-assembler-not "dctqpq" } } */ +/* { dg-final { scan-assembler-not "drdpq" } } */ +/* { dg-final { scan-assembler-not "stfd" } } */ +/* { dg-final { scan-assembler-not "lfd" } } */ + +_Decimal128 +do_dedpdq_0 (_Decimal128 a) +{ + return __builtin_ddedpdq (0, a); +} + +_Decimal128 +do_dedpdq_1 (_Decimal128 a) +{ + return __builtin_ddedpdq (1, a); +} + +_Decimal128 +do_dedpdq_2 (_Decimal128 a) +{ + return __builtin_ddedpdq (2, a); +} + +_Decimal128 +do_dedpdq_3 (_Decimal128 a) +{ + return __builtin_ddedpdq (3, a); +} + +_Decimal128 +do_enbcdq_0 (_Decimal128 a) +{ + return __builtin_denbcdq (0, a); +} + +_Decimal128 +do_enbcdq_1 (_Decimal128 a) +{ + return __builtin_denbcdq (1, a); +} + +_Decimal128 +do_xexq (_Decimal128 a) +{ + return __builtin_dxexq (a); +} + +_Decimal128 +do_iexq (_Decimal128 a, _Decimal128 b) +{ + return __builtin_diexq (a, b); +} + +_Decimal128 +do_scliq_1 (_Decimal128 a) +{ + return __builtin_dscliq (a, 1); +} + +_Decimal128 +do_scliq_10 (_Decimal128 a) +{ + return __builtin_dscliq (a, 10); +} + +_Decimal128 +do_scriq_1 (_Decimal128 a) +{ + return __builtin_dscriq (a, 1); +} + +_Decimal128 +do_scriq_10 (_Decimal128 a) +{ + return __builtin_dscriq (a, 10); +} diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c new file mode 100644 index 0000000..5f948b7 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c @@ -0,0 +1,34 @@ +/* { dg-do compile { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "divwe " 1 } } */ +/* { dg-final { scan-assembler-times "divweo " 1 } } */ +/* { dg-final { scan-assembler-times "divweu " 1 } } */ +/* { dg-final { scan-assembler-times "divweuo " 1 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ + +int +div_we (int a, int b) +{ + return __builtin_divwe (a, b); +} + +int +div_weo (int a, int b) +{ + return __builtin_divweo (a, b); +} + +unsigned int +div_weu (unsigned int a, unsigned int b) +{ + return __builtin_divweu (a, b); +} + +unsigned int +div_weuo (unsigned int a, unsigned int b) +{ + return __builtin_divweuo (a, b); +} diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c new file mode 100644 index 0000000..8ee6c8c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c @@ -0,0 +1,34 @@ +/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mcpu=power7 -O2" } */ +/* { dg-final { scan-assembler-times "divde " 1 } } */ +/* { dg-final { scan-assembler-times "divdeo " 1 } } */ +/* { dg-final { scan-assembler-times "divdeu " 1 } } */ +/* { dg-final { scan-assembler-times "divdeuo " 1 } } */ +/* { dg-final { scan-assembler-not "bl __builtin" } } */ + +long +div_de (long a, long b) +{ + return __builtin_divde (a, b); +} + +long +div_deo (long a, long b) +{ + return __builtin_divdeo (a, b); +} + +unsigned long +div_deu (unsigned long a, unsigned long b) +{ + return __builtin_divdeu (a, b); +} + +unsigned long +div_deuo (unsigned long a, unsigned long b) +{ + return __builtin_divdeuo (a, b); +} diff --git a/gcc/testsuite/gcc.target/powerpc/pack01.c b/gcc/testsuite/gcc.target/powerpc/pack01.c new file mode 100644 index 0000000..efac408 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pack01.c @@ -0,0 +1,91 @@ +/* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target p8vector_hw } */ +/* { dg-options "-mcpu=power8 -O2" } */ + +#include +#include +#include + +#ifdef DEBUG +#include +#endif + +typedef __int128_t __attribute__((__vector_size__(16))) vector_128_t; +typedef __int128_t scalar_128_t; +typedef unsigned long long scalar_64_t; + +volatile scalar_64_t one = 1; +volatile scalar_64_t two = 2; + +int +main (void) +{ + scalar_128_t a = (((scalar_128_t)one) << 64) | ((scalar_128_t)two); + vector_128_t v1 = (vector_128_t) { a }; + vector_128_t v2 = __builtin_pack_vector_int128 (one, two); + scalar_64_t x0 = __builtin_unpack_vector_int128 (v1, 0); + scalar_64_t x1 = __builtin_unpack_vector_int128 (v1, 1); + vector_128_t v3 = __builtin_pack_vector_int128 (x0, x1); + + size_t i; + union { + scalar_128_t i128; + vector_128_t v128; + scalar_64_t u64; + unsigned char uc[sizeof (scalar_128_t)]; + char c[sizeof (scalar_128_t)]; + } u, u2; + +#ifdef DEBUG + { + printf ("a = 0x"); + u.i128 = a; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nv1 = 0x"); + u.v128 = v1; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nv2 = 0x"); + u.v128 = v2; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nv3 = 0x"); + u.v128 = v3; + for (i = 0; i < sizeof (scalar_128_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nx0 = 0x"); + u.u64 = x0; + for (i = 0; i < sizeof (scalar_64_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nx1 = 0x"); + u.u64 = x1; + for (i = 0; i < sizeof (scalar_64_t); i++) + printf ("%.2x", u.uc[i]); + + printf ("\n"); + } +#endif + + u2.i128 = a; + u.v128 = v1; + if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0) + abort (); + + u.v128 = v2; + if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0) + abort (); + + u.v128 = v3; + if (memcmp (u.c, u2.c, sizeof (scalar_128_t)) != 0) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pack02.c b/gcc/testsuite/gcc.target/powerpc/pack02.c new file mode 100644 index 0000000..74b6cd0 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pack02.c @@ -0,0 +1,95 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target vsx_hw } */ +/* { dg-options "-O2" } */ + +#include +#include +#include + +#ifdef DEBUG +#include +#endif + +int +main (void) +{ + double high = pow (2.0, 60); + double low = 2.0; + long double a = ((long double)high) + ((long double)low); + double x0 = __builtin_unpack_longdouble (a, 0); + double x1 = __builtin_unpack_longdouble (a, 1); + long double b = __builtin_pack_longdouble (x0, x1); + +#ifdef DEBUG + { + size_t i; + union { + long double ld; + double d; + unsigned char uc[sizeof (long double)]; + char c[sizeof (long double)]; + } u; + + printf ("a = 0x"); + u.ld = a; + for (i = 0; i < sizeof (long double); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", a); + + printf ("b = 0x"); + u.ld = b; + for (i = 0; i < sizeof (long double); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", b); + + printf ("hi = 0x"); + u.d = high; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", high); + + printf ("lo = 0x"); + u.d = low; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", low); + + printf ("x0 = 0x"); + u.d = x0; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", x0); + + printf ("x1 = 0x"); + u.d = x1; + for (i = 0; i < sizeof (double); i++) + printf ("%.2x", u.uc[i]); + + printf (",%*s %g\n", (int)(2 * (sizeof (long double) - sizeof (double))), "", x1); + } +#endif + + if (high != x0) + abort (); + + if (low != x1) + abort (); + + if (a != b) + abort (); + + if (x0 != high) + abort (); + + if (x1 != low) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pack03.c b/gcc/testsuite/gcc.target/powerpc/pack03.c new file mode 100644 index 0000000..59f0e74 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pack03.c @@ -0,0 +1,88 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-require-effective-target vsx_hw } */ +/* { dg-options "-O2" } */ + +#include +#include +#include + +#ifdef DEBUG +#include +#endif + +int +main (void) +{ + _Decimal128 one = (_Decimal128)1.0; + _Decimal128 two = (_Decimal128)2.0; + _Decimal128 ten = (_Decimal128)10.0; + _Decimal128 a = one; + _Decimal128 b; + _Decimal128 c; + unsigned long long x0; + unsigned long long x1; + size_t i; + + for (i = 0; i < 25; i++) + a *= ten; + + a += two; + + x0 = __builtin_unpack_dec128 (a, 0); + x1 = __builtin_unpack_dec128 (a, 1); + b = __builtin_pack_dec128 (x0, x1); + c = __builtin_dscliq (one, 25) + two; + +#ifdef DEBUG + { + union { + _Decimal128 d; + unsigned long long ull; + unsigned char uc[sizeof (_Decimal128)]; + } u; + + printf ("a = 0x"); + u.d = a; + for (i = 0; i < sizeof (_Decimal128); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", (long double)a); + + printf ("b = 0x"); + u.d = b; + for (i = 0; i < sizeof (_Decimal128); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", (long double)b); + + printf ("c = 0x"); + u.d = c; + for (i = 0; i < sizeof (_Decimal128); i++) + printf ("%.2x", u.uc[i]); + + printf (", %Lg\n", (long double)c); + + printf ("x0 = 0x"); + u.ull = x0; + for (i = 0; i < sizeof (unsigned long long); i++) + printf ("%.2x", u.uc[i]); + + printf ("\nx1 = 0x"); + u.ull = x1; + for (i = 0; i < sizeof (unsigned long long); i++) + printf ("%.2x", u.uc[i]); + + printf ("\n"); + } +#endif + + if (a != b) + abort (); + + if (a != c) + abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr60735.c b/gcc/testsuite/gcc.target/powerpc/pr60735.c new file mode 100644 index 0000000..9bac30b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr60735.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mcpu=8548 -mspe -mabi=spe -O2" } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ + +/* In PR60735, the type _Decimal64 generated an insn not found message. */ + +void +pr60735 (_Decimal64 *p, _Decimal64 *q) +{ + *p = *q; +} diff --git a/gcc/testsuite/gcc.target/powerpc/ti_math1.c b/gcc/testsuite/gcc.target/powerpc/ti_math1.c new file mode 100644 index 0000000..cdf9251 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/ti_math1.c @@ -0,0 +1,20 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2" } */ +/* { dg-final { scan-assembler-times "addc" 1 } } */ +/* { dg-final { scan-assembler-times "adde" 1 } } */ +/* { dg-final { scan-assembler-times "subfc" 1 } } */ +/* { dg-final { scan-assembler-times "subfe" 1 } } */ +/* { dg-final { scan-assembler-not "subf " } } */ + +__int128 +add_128 (__int128 *ptr, __int128 val) +{ + return (*ptr + val); +} + +__int128 +sub_128 (__int128 *ptr, __int128 val) +{ + return (*ptr - val); +} + diff --git a/gcc/testsuite/gcc.target/powerpc/ti_math2.c b/gcc/testsuite/gcc.target/powerpc/ti_math2.c new file mode 100644 index 0000000..b9c0330 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/ti_math2.c @@ -0,0 +1,73 @@ +/* { dg-do run { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2 -fno-inline" } */ + +union U { + __int128 i128; + struct { + long l1; + long l2; + } s; +}; + +union U u1,u2; + +__int128 +create_128 (long most_sig, long least_sig) +{ + union U u; + +#if __LITTLE_ENDIAN__ + u.s.l1 = least_sig; + u.s.l2 = most_sig; +#else + u.s.l1 = most_sig; + u.s.l2 = least_sig; +#endif + return u.i128; +} + +long most_sig (union U * u) +{ +#if __LITTLE_ENDIAN__ + return (*u).s.l2; +#else + return (*u).s.l1; +#endif +} + +long least_sig (union U * u) +{ +#if __LITTLE_ENDIAN__ + return (*u).s.l1; +#else + return (*u).s.l2; +#endif +} + +__int128 +add_128 (__int128 *ptr, __int128 val) +{ + return (*ptr + val); +} + +__int128 +sub_128 (__int128 *ptr, __int128 val) +{ + return (*ptr - val); +} + +int +main (void) +{ + /* Do a simple add/sub to make sure carry is happening between the dwords + and that dwords are in correct endian order. */ + u1.i128 = create_128 (1, -1); + u2.i128 = add_128 (&u1.i128, 1); + if ((most_sig (&u2) != 2) || (least_sig (&u2) != 0)) + __builtin_abort (); + u2.i128 = sub_128 (&u2.i128, 1); + if ((most_sig (&u2) != 1) || (least_sig (&u2) != -1)) + __builtin_abort (); + return 0; +} + diff --git a/gcc/testsuite/gfortran.dg/finalize_25.f90 b/gcc/testsuite/gfortran.dg/finalize_25.f90 new file mode 100644 index 0000000..cdbec4c --- /dev/null +++ b/gcc/testsuite/gfortran.dg/finalize_25.f90 @@ -0,0 +1,55 @@ +! { dg-do run } +! +! PR fortran/58880 +! PR fortran/60495 +! +! Contributed by Andrew Benson and Janus Weil +! + +module gn + implicit none + type sl + integer, allocatable, dimension(:) :: lv + contains + final :: sld + end type + type :: nde + type(sl) :: r + end type nde + + integer :: cnt = 0 + +contains + + subroutine sld(s) + type(sl) :: s + cnt = cnt + 1 + ! print *,'Finalize sl' + end subroutine + subroutine ndm(s) + type(nde), intent(inout) :: s + type(nde) :: i + i=s + end subroutine ndm +end module + +program main + use gn + type :: nde2 + type(sl) :: r + end type nde2 + type(nde) :: x + + cnt = 0 + call ndm(x) + if (cnt /= 2) call abort() + + cnt = 0 + call ndm2() + if (cnt /= 3) call abort() +contains + subroutine ndm2 + type(nde2) :: s,i + i=s + end subroutine ndm2 +end program main diff --git a/gcc/tree-inline.c b/gcc/tree-inline.c index 4293241..c63b670 100644 --- a/gcc/tree-inline.c +++ b/gcc/tree-inline.c @@ -3119,7 +3119,8 @@ declare_return_variable (copy_body_data *id, tree return_slot, tree modify_dest, { var = return_slot; gcc_assert (TREE_CODE (var) != SSA_NAME); - TREE_ADDRESSABLE (var) |= TREE_ADDRESSABLE (result); + if (TREE_ADDRESSABLE (result)) + mark_addressable (var); } if ((TREE_CODE (TREE_TYPE (result)) == COMPLEX_TYPE || TREE_CODE (TREE_TYPE (result)) == VECTOR_TYPE) diff --git a/gcc/tree-nested.c b/gcc/tree-nested.c index df6923f..9c175de 100644 --- a/gcc/tree-nested.c +++ b/gcc/tree-nested.c @@ -1082,6 +1082,11 @@ convert_nonlocal_omp_clauses (tree *pclauses, struct walk_stmt_info *wi) need_stmts = true; goto do_decl_clause; + case OMP_CLAUSE_LINEAR: + if (OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause)) + need_stmts = true; + goto do_decl_clause; + case OMP_CLAUSE_PRIVATE: case OMP_CLAUSE_FIRSTPRIVATE: case OMP_CLAUSE_COPYPRIVATE: @@ -1157,6 +1162,12 @@ convert_nonlocal_omp_clauses (tree *pclauses, struct walk_stmt_info *wi) &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)); break; + case OMP_CLAUSE_LINEAR: + walk_body (convert_nonlocal_reference_stmt, + convert_nonlocal_reference_op, info, + &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause)); + break; + default: break; } @@ -1605,6 +1616,11 @@ convert_local_omp_clauses (tree *pclauses, struct walk_stmt_info *wi) need_stmts = true; goto do_decl_clause; + case OMP_CLAUSE_LINEAR: + if (OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause)) + need_stmts = true; + goto do_decl_clause; + case OMP_CLAUSE_PRIVATE: case OMP_CLAUSE_FIRSTPRIVATE: case OMP_CLAUSE_COPYPRIVATE: @@ -1685,6 +1701,12 @@ convert_local_omp_clauses (tree *pclauses, struct walk_stmt_info *wi) &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)); break; + case OMP_CLAUSE_LINEAR: + walk_body (convert_local_reference_stmt, + convert_local_reference_op, info, + &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause)); + break; + default: break; } diff --git a/gcc/tree-ssa-loop-im.c b/gcc/tree-ssa-loop-im.c index c75f257..1b40190 100644 --- a/gcc/tree-ssa-loop-im.c +++ b/gcc/tree-ssa-loop-im.c @@ -1544,15 +1544,6 @@ analyze_memory_references (void) struct loop *loop, *outer; unsigned i, n; -#if 0 - /* Initialize bb_loop_postorder with a mapping from loop->num to - its postorder index. */ - i = 0; - bb_loop_postorder = XNEWVEC (unsigned, number_of_loops (cfun)); - FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) - bb_loop_postorder[loop->num] = i++; -#endif - /* Collect all basic-blocks in loops and sort them after their loops postorder. */ i = 0; @@ -1807,6 +1798,7 @@ execute_sm_if_changed (edge ex, tree mem, tree tmp_var, tree flag) gimple_stmt_iterator gsi; gimple stmt; struct prev_flag_edges *prev_edges = (struct prev_flag_edges *) ex->aux; + bool irr = ex->flags & EDGE_IRREDUCIBLE_LOOP; /* ?? Insert store after previous store if applicable. See note below. */ @@ -1821,8 +1813,9 @@ execute_sm_if_changed (edge ex, tree mem, tree tmp_var, tree flag) old_dest = ex->dest; new_bb = split_edge (ex); then_bb = create_empty_bb (new_bb); - if (current_loops && new_bb->loop_father) - add_bb_to_loop (then_bb, new_bb->loop_father); + if (irr) + then_bb->flags = BB_IRREDUCIBLE_LOOP; + add_bb_to_loop (then_bb, new_bb->loop_father); gsi = gsi_start_bb (new_bb); stmt = gimple_build_cond (NE_EXPR, flag, boolean_false_node, @@ -1834,9 +1827,12 @@ execute_sm_if_changed (edge ex, tree mem, tree tmp_var, tree flag) stmt = gimple_build_assign (unshare_expr (mem), tmp_var); gsi_insert_after (&gsi, stmt, GSI_CONTINUE_LINKING); - make_edge (new_bb, then_bb, EDGE_TRUE_VALUE); - make_edge (new_bb, old_dest, EDGE_FALSE_VALUE); - then_old_edge = make_edge (then_bb, old_dest, EDGE_FALLTHRU); + make_edge (new_bb, then_bb, + EDGE_TRUE_VALUE | (irr ? EDGE_IRREDUCIBLE_LOOP : 0)); + make_edge (new_bb, old_dest, + EDGE_FALSE_VALUE | (irr ? EDGE_IRREDUCIBLE_LOOP : 0)); + then_old_edge = make_edge (then_bb, old_dest, + EDGE_FALLTHRU | (irr ? EDGE_IRREDUCIBLE_LOOP : 0)); set_immediate_dominator (CDI_DOMINATORS, then_bb, new_bb); diff --git a/gcc/tree-ssa-structalias.c b/gcc/tree-ssa-structalias.c index 8201cb4..347dba3 100644 --- a/gcc/tree-ssa-structalias.c +++ b/gcc/tree-ssa-structalias.c @@ -7264,10 +7264,7 @@ ipa_pta_execute (void) tree ptr; struct function *fn; unsigned i; - varinfo_t fi; basic_block bb; - struct pt_solution uses, clobbers; - struct cgraph_edge *e; /* Nodes without a body are not interesting. */ if (!cgraph_function_with_gimple_body_p (node) || node->clone_of) @@ -7283,21 +7280,6 @@ ipa_pta_execute (void) find_what_p_points_to (ptr); } - /* Compute the call-use and call-clobber sets for all direct calls. */ - fi = lookup_vi_for_tree (node->decl); - gcc_assert (fi->is_fn_info); - clobbers - = find_what_var_points_to (first_vi_for_offset (fi, fi_clobbers)); - uses = find_what_var_points_to (first_vi_for_offset (fi, fi_uses)); - for (e = node->callers; e; e = e->next_caller) - { - if (!e->call_stmt) - continue; - - *gimple_call_clobber_set (e->call_stmt) = clobbers; - *gimple_call_use_set (e->call_stmt) = uses; - } - /* Compute the call-use and call-clobber sets for indirect calls and calls to external functions. */ FOR_EACH_BB_FN (bb, fn) @@ -7308,17 +7290,27 @@ ipa_pta_execute (void) { gimple stmt = gsi_stmt (gsi); struct pt_solution *pt; - varinfo_t vi; + varinfo_t vi, fi; tree decl; if (!is_gimple_call (stmt)) continue; - /* Handle direct calls to external functions. */ + /* Handle direct calls to functions with body. */ decl = gimple_call_fndecl (stmt); if (decl - && (!(fi = lookup_vi_for_tree (decl)) - || !fi->is_fn_info)) + && (fi = lookup_vi_for_tree (decl)) + && fi->is_fn_info) + { + *gimple_call_clobber_set (stmt) + = find_what_var_points_to + (first_vi_for_offset (fi, fi_clobbers)); + *gimple_call_use_set (stmt) + = find_what_var_points_to + (first_vi_for_offset (fi, fi_uses)); + } + /* Handle direct calls to external functions. */ + else if (decl) { pt = gimple_call_use_set (stmt); if (gimple_call_flags (stmt) & ECF_CONST) @@ -7362,10 +7354,9 @@ ipa_pta_execute (void) pt->nonlocal = 1; } } - /* Handle indirect calls. */ - if (!decl - && (fi = get_fi_for_callee (stmt))) + else if (!decl + && (fi = get_fi_for_callee (stmt))) { /* We need to accumulate all clobbers/uses of all possible callees. */ diff --git a/gcc/tree-tailcall.c b/gcc/tree-tailcall.c index 3488c2f..0208631 100644 --- a/gcc/tree-tailcall.c +++ b/gcc/tree-tailcall.c @@ -285,9 +285,19 @@ process_assignment (gimple stmt, gimple_stmt_iterator call, tree *m, { /* Reject a tailcall if the type conversion might need additional code. */ - if (gimple_assign_cast_p (stmt) - && TYPE_MODE (TREE_TYPE (dest)) != TYPE_MODE (TREE_TYPE (src_var))) - return false; + if (gimple_assign_cast_p (stmt)) + { + if (TYPE_MODE (TREE_TYPE (dest)) != TYPE_MODE (TREE_TYPE (src_var))) + return false; + + /* Even if the type modes are the same, if the precision of the + type is smaller than mode's precision, + reduce_to_bit_field_precision would generate additional code. */ + if (INTEGRAL_TYPE_P (TREE_TYPE (dest)) + && (GET_MODE_PRECISION (TYPE_MODE (TREE_TYPE (dest))) + > TYPE_PRECISION (TREE_TYPE (dest)))) + return false; + } if (src_var != *ass_var) return false; diff --git a/gcc/tree-vect-generic.c b/gcc/tree-vect-generic.c index d00a4b4..a1de7be 100644 --- a/gcc/tree-vect-generic.c +++ b/gcc/tree-vect-generic.c @@ -971,7 +971,8 @@ expand_vector_operation (gimple_stmt_iterator *gsi, tree type, tree compute_type if (!optimize || !VECTOR_INTEGER_TYPE_P (type) - || TREE_CODE (rhs2) != VECTOR_CST) + || TREE_CODE (rhs2) != VECTOR_CST + || !VECTOR_MODE_P (TYPE_MODE (type))) break; ret = expand_vector_divmod (gsi, type, rhs1, rhs2, code); diff --git a/gcc/tree.h b/gcc/tree.h index 9fbc5c4..90e5e27 100644 --- a/gcc/tree.h +++ b/gcc/tree.h @@ -1330,6 +1330,9 @@ extern void protected_set_expr_location (tree, location_t); #define OMP_CLAUSE_LINEAR_STEP(NODE) \ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_LINEAR), 1) +#define OMP_CLAUSE_LINEAR_GIMPLE_SEQ(NODE) \ + (OMP_CLAUSE_CHECK (NODE))->omp_clause.gimple_reduction_init + #define OMP_CLAUSE_ALIGNED_ALIGNMENT(NODE) \ OMP_CLAUSE_OPERAND (OMP_CLAUSE_SUBCODE_CHECK (NODE, OMP_CLAUSE_ALIGNED), 1) diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 41db7d8..57a8371 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,10 @@ +2014-04-30 Bernd Edlinger + + Work around for current cygwin32 build problems. + * config/i386/cygming-crtbegin.c (__register_frame_info, + __deregister_frame_info, _Jv_RegisterClasses): Compile weak default + functions only for 64-bit systems. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/libgcc/config/i386/cygming-crtbegin.c b/libgcc/config/i386/cygming-crtbegin.c index eeb51d4..195b463 100644 --- a/libgcc/config/i386/cygming-crtbegin.c +++ b/libgcc/config/i386/cygming-crtbegin.c @@ -54,6 +54,11 @@ extern void __register_frame_info (__attribute__((unused)) const void *, TARGET_ATTRIBUTE_WEAK; extern void *__deregister_frame_info (__attribute__((unused)) const void *) TARGET_ATTRIBUTE_WEAK; + +/* Work around for current cygwin32 build problems (Bug gas/16858). + Compile weak default functions only for 64-bit systems, + when absolutely necessary. */ +#ifdef __x86_64__ TARGET_ATTRIBUTE_WEAK void __register_frame_info (__attribute__((unused)) const void *p, __attribute__((unused)) struct object *o) @@ -65,16 +70,19 @@ __deregister_frame_info (__attribute__((unused)) const void *p) { return (void*) 0; } +#endif #endif /* DWARF2_UNWIND_INFO */ #if TARGET_USE_JCR_SECTION extern void _Jv_RegisterClasses (__attribute__((unused)) const void *) TARGET_ATTRIBUTE_WEAK; +#ifdef __x86_64__ TARGET_ATTRIBUTE_WEAK void _Jv_RegisterClasses (__attribute__((unused)) const void *p) { } +#endif #endif /* TARGET_USE_JCR_SECTION */ #if defined(HAVE_LD_RO_RW_SECTION_MIXING) diff --git a/libgo/runtime/mheap.c b/libgo/runtime/mheap.c index fee493c..1b8ab79 100644 --- a/libgo/runtime/mheap.c +++ b/libgo/runtime/mheap.c @@ -387,7 +387,7 @@ forcegchelper(void *vnote) static uintptr scavengelist(MSpan *list, uint64 now, uint64 limit) { - uintptr released, sumreleased; + uintptr released, sumreleased, start, end, pagesize; MSpan *s; if(runtime_MSpanList_IsEmpty(list)) @@ -400,7 +400,17 @@ scavengelist(MSpan *list, uint64 now, uint64 limit) mstats.heap_released += released; sumreleased += released; s->npreleased = s->npages; - runtime_SysUnused((void*)(s->start << PageShift), s->npages << PageShift); + + start = s->start << PageShift; + end = start + (s->npages << PageShift); + + // Round start up and end down to ensure we + // are acting on entire pages. + pagesize = getpagesize(); + start = ROUND(start, pagesize); + end &= ~(pagesize - 1); + if(end > start) + runtime_SysUnused((void*)start, end - start); } } return sumreleased; diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog index 91fc2a2..819bfa1 100644 --- a/libgomp/ChangeLog +++ b/libgomp/ChangeLog @@ -1,3 +1,22 @@ +2014-05-02 Jakub Jelinek + + * testsuite/libgomp.c/simd-10.c: New test. + * testsuite/libgomp.c/simd-11.c: New test. + * testsuite/libgomp.c/simd-12.c: New test. + * testsuite/libgomp.c/simd-13.c: New test. + +2014-04-24 Jakub Jelinek + + * testsuite/libgomp.c++/atomic-14.C: Allow seq_cst and + atomic type clauses in any order and optional comma in between. + * testsuite/libgomp.c++/atomic-15.C: Likewise. + * testsuite/libgomp.c/atomic-17.c: Likewise. + + * testsuite/libgomp.c/simd-7.c: New test. + * testsuite/libgomp.c/simd-8.c: New test. + * testsuite/libgomp.c/simd-9.c: New test. + * testsuite/libgomp.c/loop-16.c: New test. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/libgomp/testsuite/libgomp.c++/atomic-14.C b/libgomp/testsuite/libgomp.c++/atomic-14.C index 4cd9df8..dccea3a 100644 --- a/libgomp/testsuite/libgomp.c++/atomic-14.C +++ b/libgomp/testsuite/libgomp.c++/atomic-14.C @@ -13,13 +13,13 @@ main () v = x; if (v != 3) abort (); - #pragma omp atomic update seq_cst + #pragma omp atomic seq_cst update x = 3 * 2 * 1 + x; - #pragma omp atomic read seq_cst + #pragma omp atomic read, seq_cst v = x; if (v != 9) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst, capture v = x = x | 16; if (v != 25) abort (); @@ -27,15 +27,15 @@ main () v = x = x + 14 * 2 / 4; if (v != 32) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture v = x = 5 | x; if (v != 37) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture, seq_cst v = x = 40 + 12 - 2 - 7 - x; if (v != 6) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic seq_cst read v = x; if (v != 6) abort (); @@ -43,7 +43,7 @@ main () { v = x; x = 3 + x; } if (v != 6) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { v = x; x = -1 * -1 * -1 * -1 - x; } if (v != 9) abort (); @@ -51,11 +51,11 @@ main () v = x; if (v != -8) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture, seq_cst { x = 2 * 2 - x; v = x; } if (v != 12) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { x = 7 & x; v = x; } if (v != 4) abort (); @@ -63,7 +63,7 @@ main () { v = x; x = 6; } if (v != 4) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic read, seq_cst v = x; if (v != 6) abort (); @@ -71,11 +71,11 @@ main () { v = x; x = 7 * 8 + 23; } if (v != 6) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic seq_cst, read v = x; if (v != 79) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture , seq_cst { v = x; x = 23 + 6 * 4; } if (v != 79) abort (); @@ -83,7 +83,7 @@ main () v = x; if (v != 47) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { v = x; x = l ? 17 : 12; } if (v != 47) abort (); diff --git a/libgomp/testsuite/libgomp.c++/atomic-15.C b/libgomp/testsuite/libgomp.c++/atomic-15.C index 1eabce7..9abefb6 100644 --- a/libgomp/testsuite/libgomp.c++/atomic-15.C +++ b/libgomp/testsuite/libgomp.c++/atomic-15.C @@ -14,13 +14,13 @@ foo () v = x; if (v != 3) abort (); - #pragma omp atomic update seq_cst + #pragma omp atomic seq_cst update x = 3 * 2 * 1 + x; - #pragma omp atomic read seq_cst + #pragma omp atomic read, seq_cst v = x; if (v != 9) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst, capture v = x = x | 16; if (v != 25) abort (); @@ -28,15 +28,15 @@ foo () v = x = x + 14 * 2 / 4; if (v != 32) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture v = x = 5 | x; if (v != 37) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture, seq_cst v = x = 40 + 12 - 2 - 7 - x; if (v != 6) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic seq_cst read v = x; if (v != 6) abort (); @@ -44,7 +44,7 @@ foo () { v = x; x = 3 + x; } if (v != 6) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { v = x; x = -1 * -1 * -1 * -1 - x; } if (v != 9) abort (); @@ -52,11 +52,11 @@ foo () v = x; if (v != -8) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture, seq_cst { x = 2 * 2 - x; v = x; } if (v != 12) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { x = 7 & x; v = x; } if (v != 4) abort (); @@ -64,7 +64,7 @@ foo () { v = x; x = 6; } if (v != 4) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic read, seq_cst v = x; if (v != 6) abort (); @@ -72,11 +72,11 @@ foo () { v = x; x = 7 * 8 + 23; } if (v != 6) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic seq_cst, read v = x; if (v != 79) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture , seq_cst { v = x; x = 23 + 6 * 4; } if (v != 79) abort (); @@ -84,7 +84,7 @@ foo () v = x; if (v != 47) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { v = x; x = l ? 17 : 12; } if (v != 47) abort (); diff --git a/libgomp/testsuite/libgomp.c/atomic-17.c b/libgomp/testsuite/libgomp.c/atomic-17.c index 2bd0e9b..147ab26 100644 --- a/libgomp/testsuite/libgomp.c/atomic-17.c +++ b/libgomp/testsuite/libgomp.c/atomic-17.c @@ -13,13 +13,13 @@ main () v = x; if (v != 3) abort (); - #pragma omp atomic update seq_cst + #pragma omp atomic seq_cst update x = 3 * 2 * 1 + x; - #pragma omp atomic read seq_cst + #pragma omp atomic read, seq_cst v = x; if (v != 9) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst, capture v = x = x | 16; if (v != 25) abort (); @@ -27,15 +27,15 @@ main () v = x = x + 14 * 2 / 4; if (v != 32) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture v = x = 5 | x; if (v != 37) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture, seq_cst v = x = 40 + 12 - 2 - 7 - x; if (v != 6) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic seq_cst read v = x; if (v != 6) abort (); @@ -43,7 +43,7 @@ main () { v = x; x = 3 + x; } if (v != 6) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { v = x; x = -1 * -1 * -1 * -1 - x; } if (v != 9) abort (); @@ -51,11 +51,11 @@ main () v = x; if (v != -8) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture, seq_cst { x = 2 * 2 - x; v = x; } if (v != 12) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { x = 7 & x; v = x; } if (v != 4) abort (); @@ -63,7 +63,7 @@ main () { v = x; x = 6; } if (v != 4) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic read, seq_cst v = x; if (v != 6) abort (); @@ -71,11 +71,11 @@ main () { v = x; x = 7 * 8 + 23; } if (v != 6) abort (); - #pragma omp atomic read seq_cst + #pragma omp atomic seq_cst, read v = x; if (v != 79) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic capture , seq_cst { v = x; x = 23 + 6 * 4; } if (v != 79) abort (); @@ -83,7 +83,7 @@ main () v = x; if (v != 47) abort (); - #pragma omp atomic capture seq_cst + #pragma omp atomic seq_cst capture { v = x; x = l ? 17 : 12; } if (v != 47) abort (); diff --git a/libgomp/testsuite/libgomp.c/loop-16.c b/libgomp/testsuite/libgomp.c/loop-16.c new file mode 100644 index 0000000..3ef2f64 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/loop-16.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ + +extern void abort (void); + +volatile int count; +static int test (void) +{ + return ++count > 0; +} + +int i; + +int +main () +{ + #pragma omp for lastprivate (i) + for (i = 0; i < 10; ++i) + { + int *p = &i; + if (test ()) + continue; + abort (); + } + if (i != count) + abort (); + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-10.c b/libgomp/testsuite/libgomp.c/simd-10.c new file mode 100644 index 0000000..70cd9f0 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-10.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +int s = 0, i, u; + +void +foo () +{ + #pragma omp for simd schedule(static, 32) reduction(+:s) lastprivate(u) + for (i = 0; i < 128; i++) + { + s++; + u = i; + } + if (i != 128 || s != 128 || u != 127) + __builtin_abort (); +} + +int +main () +{ + foo (); + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-11.c b/libgomp/testsuite/libgomp.c/simd-11.c new file mode 100644 index 0000000..b09f0dd --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-11.c @@ -0,0 +1,27 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +int s = 0, i, j, u; + +void +foo () +{ + #pragma omp for simd schedule(static, 32) reduction(+:s) lastprivate(u) collapse(2) + for (i = 0; i < 16; i++) + for (j = 0; j < 16; j++) + { + s++; + u = i + j; + } + if (i != 16 || j != 16 || s != 256 || u != 30) + __builtin_abort (); +} + +int +main () +{ + foo (); + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-12.c b/libgomp/testsuite/libgomp.c/simd-12.c new file mode 100644 index 0000000..6685111 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-12.c @@ -0,0 +1,19 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +int +main () +{ + int k = 0, i, s = 0; + #pragma omp parallel + #pragma omp for simd linear(k : 3) reduction(+: s) schedule (static, 16) + for (i = 0; i < 128; i++) + { + k = k + 3; + s = s + k; + } + if (s != 128 * 129 / 2 * 3) __builtin_abort (); + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-13.c b/libgomp/testsuite/libgomp.c/simd-13.c new file mode 100644 index 0000000..7c817b7 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-13.c @@ -0,0 +1,18 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +int +main () +{ + int k = 0, i, s = 0; + #pragma omp parallel for simd linear(k : 3) reduction(+: s) schedule (static, 16) + for (i = 0; i < 128; i++) + { + k = k + 3; + s = s + k; + } + if (s != 128 * 129 / 2 * 3) __builtin_abort (); + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-7.c b/libgomp/testsuite/libgomp.c/simd-7.c new file mode 100644 index 0000000..ab04fee --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-7.c @@ -0,0 +1,96 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +extern void abort (); +int a[1024] __attribute__((aligned (32))) = { 1 }; +int b[1024] __attribute__((aligned (32))) = { 1 }; +int k, m; +struct U { int u; }; +struct V { int v; }; + +__attribute__((noinline, noclone)) int +foo (int *p) +{ + int i, s = 0; + struct U u; + struct V v; + #pragma omp simd aligned(a, p : 32) linear(k: m + 1) \ + linear(i) reduction(+:s) lastprivate(u, v) + for (i = 0; i < 1024; i++) + { + int *q = &i; + a[i] *= p[i]; + u.u = p[i] + k; + k += m + 1; + v.v = p[i] + k; + s += p[i] + k; + } + if (u.u != 36 + 4 + 3 * 1023 || v.v != 36 + 4 + 3 * 1024 || i != 1024) + abort (); + return s; +} + +__attribute__((noinline, noclone)) int +bar (int *p) +{ + int i, s = 0; + struct U u; + struct V v; + #pragma omp simd aligned(a, p : 32) linear(k: m + 1) \ + reduction(+:s) lastprivate(u, v) + for (i = 0; i < 1024; i++) + { + int *q = &i; + a[i] *= p[i]; + u.u = p[i] + k; + k += m + 1; + v.v = p[i] + k; + s += p[i] + k; + } + if (u.u != 36 + 4 + 3 * 1023 || v.v != 36 + 4 + 3 * 1024 || i != 1024) + abort (); + return s; +} + +int +main () +{ +#if __SIZEOF_INT__ >= 4 + int i; + k = 4; + m = 2; + for (i = 0; i < 1024; i++) + { + a[i] = i - 512; + b[i] = (i - 51) % 39; + } + int s = foo (b); + for (i = 0; i < 1024; i++) + { + if (b[i] != (i - 51) % 39 + || a[i] != (i - 512) * b[i]) + abort (); + } + if (k != 4 + 3 * 1024 || s != 1596127) + abort (); + k = 4; + m = 2; + for (i = 0; i < 1024; i++) + { + a[i] = i - 512; + b[i] = (i - 51) % 39; + } + s = bar (b); + for (i = 0; i < 1024; i++) + { + if (b[i] != (i - 51) % 39 + || a[i] != (i - 512) * b[i]) + abort (); + } + if (k != 4 + 3 * 1024 || s != 1596127) + abort (); +#endif + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-8.c b/libgomp/testsuite/libgomp.c/simd-8.c new file mode 100644 index 0000000..13f40d5 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-8.c @@ -0,0 +1,44 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +extern void abort (); +int a[32][32] __attribute__((aligned (32))) = { { 1 } }; +struct S { int s; }; +#pragma omp declare reduction (+:struct S:omp_out.s += omp_in.s) +#pragma omp declare reduction (foo:struct S:omp_out.s += omp_in.s) +#pragma omp declare reduction (foo:int:omp_out += omp_in) + +__attribute__((noinline, noclone)) int +foo (void) +{ + int i, j, u = 0; + struct S s, t; + s.s = 0; t.s = 0; + #pragma omp simd aligned(a : 32) reduction(+:s) reduction(foo:t, u) collapse(2) + for (i = 0; i < 32; i++) + for (j = 0; j < 32; j++) + { + int x = a[i][j]; + s.s += x; + t.s += x; + u += x; + } + if (t.s != s.s || u != s.s) + abort (); + return s.s; +} + +int +main () +{ + int i, j; + for (i = 0; i < 32; i++) + for (j = 0; j < 32; j++) + a[i][j] = j + (i / 4); + int s = foo (); + if (s != 19456) + abort (); + return 0; +} diff --git a/libgomp/testsuite/libgomp.c/simd-9.c b/libgomp/testsuite/libgomp.c/simd-9.c new file mode 100644 index 0000000..b64dd25 --- /dev/null +++ b/libgomp/testsuite/libgomp.c/simd-9.c @@ -0,0 +1,70 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target sse2_runtime } } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +extern void abort (); +int a[32][32] __attribute__((aligned (32))) = { { 1 } }; +struct S { int s; }; +#pragma omp declare reduction (+:struct S:omp_out.s += omp_in.s) +#pragma omp declare reduction (foo:struct S:omp_out.s += omp_in.s) +#pragma omp declare reduction (foo:int:omp_out += omp_in) + +__attribute__((noinline, noclone)) int +foo (void) +{ + int i, j, u = 0; + struct S s, t; + s.s = 0; t.s = 0; + #pragma omp simd aligned(a : 32) lastprivate (i, j) reduction(+:s) reduction(foo:t, u) collapse(2) + for (i = 0; i < 32; i++) + for (j = 0; j < 32; j++) + { + int *q = &i; + int *r = &j; + int x = a[i][j]; + s.s += x; + t.s += x; + u += x; + } + if (t.s != s.s || u != s.s || i != 32 || j != 32) + abort (); + return s.s; +} + +__attribute__((noinline, noclone)) int +bar (void) +{ + int i, j, u = 0; + struct S s, t; + s.s = 0; t.s = 0; + #pragma omp simd aligned(a:32)reduction(+:s)reduction(foo:t,u)collapse(2) + for (i = 0; i < 32; i++) + for (j = 0; j < 32; j++) + { + int *q = &i; + int *r = &j; + int x = a[i][j]; + s.s += x; + t.s += x; + u += x; + } + if (t.s != s.s || u != s.s || i != 32 || j != 32) + abort (); + return s.s; +} + +int +main () +{ + int i, j; + for (i = 0; i < 32; i++) + for (j = 0; j < 32; j++) + a[i][j] = j + (i / 4); + int s = foo (); + if (s != 19456) + abort (); + if (bar () != 19456) + abort (); + return 0; +} diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index a88c29a..12e6b5c 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,41 @@ +2014-05-02 Jonathan Wakely + + PR libstdc++/59476 + * python/libstdcxx/v6/printers.py (get_value_from_Rb_tree_node): New + function to handle both C++03 and C++11 _Rb_tree_node implementations. + (StdRbtreeIteratorPrinter, StdMapPrinter, StdSetPrinter): Use it. + * testsuite/libstdc++-prettyprinters/simple.cc: Update comment to + refer to... + * testsuite/libstdc++-prettyprinters/simple11.cc: New. + + PR libstdc++/61036 + * include/bits/shared_ptr_base.h (__shared_ptr::__shared_ptr(_Tp1*)): + Check the correct type in the static assertion. + * testsuite/20_util/shared_ptr/cons/61036.cc: New. + +2014-04-27 Lars Gullik Bjønnes + + PR libstdc++/60710 + * include/experimental/optional (operator!=): Implement in terms of + operator==. + * testsuite/experimental/optional/relops/1.cc: Remove operator!=. + * testsuite/experimental/optional/relops/2.cc: Likewise. + * testsuite/experimental/optional/relops/3.cc: Likewise. + * testsuite/experimental/optional/relops/4.cc: Likewise. + * testsuite/experimental/optional/relops/5.cc: Likewise. + * testsuite/experimental/optional/relops/6.cc: Likewise. + +2014-04-27 Jonathan Wakely + + PR libstdc++/60497 + * include/std/tuple (get): Qualify calls to prevent ADL. + * testsuite/20_util/tuple/60497.cc: New. + + * include/std/tuple (tuple_element_t): Define. + * testsuite/20_util/tuple/tuple_element.cc: Change to compile-only + test. + * testsuite/20_util/tuple/tuple_element_t.cc: New. + 2014-04-22 Release Manager * GCC 4.9.0 released. diff --git a/libstdc++-v3/include/bits/shared_ptr_base.h b/libstdc++-v3/include/bits/shared_ptr_base.h index 536df01..026c597 100644 --- a/libstdc++-v3/include/bits/shared_ptr_base.h +++ b/libstdc++-v3/include/bits/shared_ptr_base.h @@ -871,7 +871,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION : _M_ptr(__p), _M_refcount(__p) { __glibcxx_function_requires(_ConvertibleConcept<_Tp1*, _Tp*>) - static_assert( !is_void<_Tp>::value, "incomplete type" ); + static_assert( !is_void<_Tp1>::value, "incomplete type" ); static_assert( sizeof(_Tp1) > 0, "incomplete type" ); __enable_shared_from_this_helper(_M_refcount, __p, __p); } diff --git a/libstdc++-v3/include/experimental/optional b/libstdc++-v3/include/experimental/optional index 5f2d93f..2a3f29d 100644 --- a/libstdc++-v3/include/experimental/optional +++ b/libstdc++-v3/include/experimental/optional @@ -736,12 +736,12 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION template constexpr bool operator!=(const optional<_Tp>& __lhs, _Tp const& __rhs) - { return !__lhs || *__lhs != __rhs; } + { return !__lhs || !(*__lhs == __rhs); } template constexpr bool operator!=(const _Tp& __lhs, const optional<_Tp>& __rhs) - { return !__rhs || __lhs != *__rhs; } + { return !__rhs || !(__lhs == *__rhs); } template constexpr bool diff --git a/libstdc++-v3/include/std/tuple b/libstdc++-v3/include/std/tuple index 92ecdb9..03d87d7 100644 --- a/libstdc++-v3/include/std/tuple +++ b/libstdc++-v3/include/std/tuple @@ -710,6 +710,11 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION add_cv::type>::type type; }; +#if __cplusplus > 201103L + template + using tuple_element_t = typename tuple_element<__i, _Tp>::type; +#endif + /// Finds the size of a given tuple type. template struct tuple_size; @@ -755,14 +760,14 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION typename tuple_element<__i, tuple<_Elements...>>::type >::type get(tuple<_Elements...>& __t) noexcept - { return __get_helper<__i>(__t); } + { return std::__get_helper<__i>(__t); } template constexpr typename __add_c_ref< typename tuple_element<__i, tuple<_Elements...>>::type >::type get(const tuple<_Elements...>& __t) noexcept - { return __get_helper<__i>(__t); } + { return std::__get_helper<__i>(__t); } template constexpr typename __add_r_ref< @@ -786,17 +791,17 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION template constexpr _Tp& get(tuple<_Types...>& __t) noexcept - { return __get_helper2<_Tp>(__t); } + { return std::__get_helper2<_Tp>(__t); } template constexpr _Tp&& get(tuple<_Types...>&& __t) noexcept - { return std::move(__get_helper2<_Tp>(__t)); } + { return std::move(std::__get_helper2<_Tp>(__t)); } template constexpr const _Tp& get(const tuple<_Types...>& __t) noexcept - { return __get_helper2<_Tp>(__t); } + { return std::__get_helper2<_Tp>(__t); } #endif // This class helps construct the various comparison operations on tuples diff --git a/libstdc++-v3/python/libstdcxx/v6/printers.py b/libstdc++-v3/python/libstdcxx/v6/printers.py index 05da17b..1f1f860 100644 --- a/libstdc++-v3/python/libstdcxx/v6/printers.py +++ b/libstdc++-v3/python/libstdcxx/v6/printers.py @@ -375,6 +375,22 @@ class RbtreeIterator: self.node = node return result +def get_value_from_Rb_tree_node(node): + """Returns the value held in an _Rb_tree_node<_Val>""" + try: + member = node.type.fields()[1].name + if member == '_M_value_field': + # C++03 implementation, node contains the value as a member + return node['_M_value_field'] + elif member == '_M_storage': + # C++11 implementation, node stores value in __aligned_buffer + p = node['_M_storage']['_M_storage'].address + p = p.cast(node.type.template_argument(0).pointer()) + return p.dereference() + except: + pass + raise ValueError, "Unsupported implementation for %s" % str(node.type) + # This is a pretty printer for std::_Rb_tree_iterator (which is # std::map::iterator), and has nothing to do with the RbtreeIterator # class above. @@ -387,7 +403,8 @@ class StdRbtreeIteratorPrinter: def to_string (self): typename = str(self.val.type.strip_typedefs()) + '::_Link_type' nodetype = gdb.lookup_type(typename).strip_typedefs() - return self.val.cast(nodetype).dereference()['_M_value_field'] + node = self.val.cast(nodetype).dereference() + return get_value_from_Rb_tree_node(node) class StdDebugIteratorPrinter: "Print a debug enabled version of an iterator" @@ -417,7 +434,8 @@ class StdMapPrinter: def next(self): if self.count % 2 == 0: n = self.rbiter.next() - n = n.cast(self.type).dereference()['_M_value_field'] + n = n.cast(self.type).dereference() + n = get_value_from_Rb_tree_node(n) self.pair = n item = n['first'] else: @@ -458,7 +476,8 @@ class StdSetPrinter: def next(self): item = self.rbiter.next() - item = item.cast(self.type).dereference()['_M_value_field'] + item = item.cast(self.type).dereference() + item = get_value_from_Rb_tree_node(item) # FIXME: this is weird ... what to do? # Maybe a 'set' display hint? result = ('[%d]' % self.count, item) diff --git a/libstdc++-v3/testsuite/20_util/shared_ptr/cons/61036.cc b/libstdc++-v3/testsuite/20_util/shared_ptr/cons/61036.cc new file mode 100644 index 0000000..9cade66 --- /dev/null +++ b/libstdc++-v3/testsuite/20_util/shared_ptr/cons/61036.cc @@ -0,0 +1,28 @@ +// { dg-options "-std=gnu++11" } +// { dg-do compile } + +// Copyright (C) 2014 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// . + +// 20.8.2.2 Template class shared_ptr [util.smartptr.shared] + +#include + +void test01() +{ + std::shared_ptr p(new int); +} diff --git a/libstdc++-v3/testsuite/20_util/tuple/60497.cc b/libstdc++-v3/testsuite/20_util/tuple/60497.cc new file mode 100644 index 0000000..76d4223 --- /dev/null +++ b/libstdc++-v3/testsuite/20_util/tuple/60497.cc @@ -0,0 +1,37 @@ +// { dg-options "-std=gnu++14" } +// { dg-do compile } + +// Copyright (C) 2014 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// . + +// libstdc++/60497 + +#include + +struct A; +template struct B { T t; }; + +using element_type = B*; +using tuple_type = std::tuple; + +tuple_type t; +const tuple_type ct; + +auto a = std::get<0>(t); +auto b = std::get<0>(ct); +auto c = std::get(t); +auto d = std::get(ct); diff --git a/libstdc++-v3/testsuite/20_util/tuple/tuple_element.cc b/libstdc++-v3/testsuite/20_util/tuple/tuple_element.cc index 0dbdf10..3ff8e82 100644 --- a/libstdc++-v3/testsuite/20_util/tuple/tuple_element.cc +++ b/libstdc++-v3/testsuite/20_util/tuple/tuple_element.cc @@ -1,4 +1,5 @@ -// { dg-options "-std=gnu++0x" } +// { dg-options "-std=gnu++11" } +// { dg-do compile } // Copyright (C) 2007-2014 Free Software Foundation, Inc. // diff --git a/libstdc++-v3/testsuite/20_util/tuple/tuple_element_t.cc b/libstdc++-v3/testsuite/20_util/tuple/tuple_element_t.cc new file mode 100644 index 0000000..e46af5c --- /dev/null +++ b/libstdc++-v3/testsuite/20_util/tuple/tuple_element_t.cc @@ -0,0 +1,36 @@ +// { dg-options "-std=gnu++14" } +// { dg-do compile } + +// Copyright (C) 2014 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// . + +#include + +using namespace std; + +struct foo +{ }; + +int +main() +{ + // As foo isn't constructible from anything else, this + // lets us check if the alias is returning foo when it should + foo q1; + tuple_element_t<0,tuple > q2(q1); + tuple_element_t<2,tuple > q3(q1); +} diff --git a/libstdc++-v3/testsuite/experimental/optional/relops/1.cc b/libstdc++-v3/testsuite/experimental/optional/relops/1.cc index f140880..3f1ee9c 100644 --- a/libstdc++-v3/testsuite/experimental/optional/relops/1.cc +++ b/libstdc++-v3/testsuite/experimental/optional/relops/1.cc @@ -37,10 +37,6 @@ namespace ns { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); } bool - operator!=(value_type const& lhs, value_type const& rhs) - { return !(lhs == rhs); } - - bool operator<(value_type const& lhs, value_type const& rhs) { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); } diff --git a/libstdc++-v3/testsuite/experimental/optional/relops/2.cc b/libstdc++-v3/testsuite/experimental/optional/relops/2.cc index c7fc848..6ee9cba 100644 --- a/libstdc++-v3/testsuite/experimental/optional/relops/2.cc +++ b/libstdc++-v3/testsuite/experimental/optional/relops/2.cc @@ -37,10 +37,6 @@ namespace ns { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); } bool - operator!=(value_type const& lhs, value_type const& rhs) - { return !(lhs == rhs); } - - bool operator<(value_type const& lhs, value_type const& rhs) { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); } diff --git a/libstdc++-v3/testsuite/experimental/optional/relops/3.cc b/libstdc++-v3/testsuite/experimental/optional/relops/3.cc index 9729000..581d016 100644 --- a/libstdc++-v3/testsuite/experimental/optional/relops/3.cc +++ b/libstdc++-v3/testsuite/experimental/optional/relops/3.cc @@ -37,10 +37,6 @@ namespace ns { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); } bool - operator!=(value_type const& lhs, value_type const& rhs) - { return !(lhs == rhs); } - - bool operator<(value_type const& lhs, value_type const& rhs) { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); } diff --git a/libstdc++-v3/testsuite/experimental/optional/relops/4.cc b/libstdc++-v3/testsuite/experimental/optional/relops/4.cc index 45378f6..ce16fcb 100644 --- a/libstdc++-v3/testsuite/experimental/optional/relops/4.cc +++ b/libstdc++-v3/testsuite/experimental/optional/relops/4.cc @@ -37,10 +37,6 @@ namespace ns { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); } bool - operator!=(value_type const& lhs, value_type const& rhs) - { return !(lhs == rhs); } - - bool operator<(value_type const& lhs, value_type const& rhs) { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); } diff --git a/libstdc++-v3/testsuite/experimental/optional/relops/5.cc b/libstdc++-v3/testsuite/experimental/optional/relops/5.cc index 008409e..c01bba5 100644 --- a/libstdc++-v3/testsuite/experimental/optional/relops/5.cc +++ b/libstdc++-v3/testsuite/experimental/optional/relops/5.cc @@ -37,10 +37,6 @@ namespace ns { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); } bool - operator!=(value_type const& lhs, value_type const& rhs) - { return !(lhs == rhs); } - - bool operator<(value_type const& lhs, value_type const& rhs) { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); } diff --git a/libstdc++-v3/testsuite/experimental/optional/relops/6.cc b/libstdc++-v3/testsuite/experimental/optional/relops/6.cc index b179140..a24622b 100644 --- a/libstdc++-v3/testsuite/experimental/optional/relops/6.cc +++ b/libstdc++-v3/testsuite/experimental/optional/relops/6.cc @@ -37,10 +37,6 @@ namespace ns { return std::tie(lhs.i, lhs.s) == std::tie(rhs.i, rhs.s); } bool - operator!=(value_type const& lhs, value_type const& rhs) - { return !(lhs == rhs); } - - bool operator<(value_type const& lhs, value_type const& rhs) { return std::tie(lhs.i, lhs.s) < std::tie(rhs.i, rhs.s); } diff --git a/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple.cc b/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple.cc index 66ae8f7..030207a 100644 --- a/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple.cc +++ b/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple.cc @@ -1,4 +1,4 @@ -// If you modify this, please update debug.cc as well. +// If you modify this, please update simple11.cc and debug.cc as well. // { dg-do run } // { dg-options "-g -O0" } diff --git a/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple11.cc b/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple11.cc new file mode 100644 index 0000000..e94bea6 --- /dev/null +++ b/libstdc++-v3/testsuite/libstdc++-prettyprinters/simple11.cc @@ -0,0 +1,92 @@ +// If you modify this, please update simple.cc and debug.cc as well. + +// { dg-do run } +// { dg-options "-g -O0 -std=gnu++11" } + +// Copyright (C) 2011-2014 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// You should have received a copy of the GNU General Public License along +// with this library; see the file COPYING3. If not see +// . + +#include +#include +#include +#include +#include +#include +#include +#include + +int +main() +{ + std::string tem; + std::string str = "zardoz"; +// { dg-final { note-test str "\"zardoz\"" } } + + std::bitset<10> bs; + bs[0] = 1; + bs[5] = 1; + bs[7] = 1; +// { dg-final { note-test bs {std::bitset = {[0] = 1, [5] = 1, [7] = 1}} } } + + std::deque deq; + deq.push_back("one"); + deq.push_back("two"); +// { dg-final { note-test deq {std::deque with 2 elements = {"one", "two"}} } } + + std::deque::iterator deqiter = deq.begin(); +// { dg-final { note-test deqiter {"one"} } } + + std::list lst; + lst.push_back("one"); + lst.push_back("two"); +// { dg-final { note-test lst {std::list = {[0] = "one", [1] = "two"}} } } + + std::list::iterator lstiter = lst.begin(); + tem = *lstiter; +// { dg-final { note-test lstiter {"one"}} } + + std::list::const_iterator lstciter = lst.begin(); + tem = *lstciter; +// { dg-final { note-test lstciter {"one"}} } + + std::map mp; + mp["zardoz"] = 23; +// { dg-final { note-test mp {std::map with 1 elements = {["zardoz"] = 23}} } } + + std::map::iterator mpiter = mp.begin(); +// { dg-final { note-test mpiter {{first = "zardoz", second = 23}} } } + + std::set sp; + sp.insert("clownfish"); + sp.insert("barrel"); +// { dg-final { note-test sp {std::set with 2 elements = {[0] = "barrel", [1] = "clownfish"}} } } + + std::set::const_iterator spciter = sp.begin(); +// { dg-final { note-test spciter {"barrel"} } } + + __gnu_cxx::slist sll; + sll.push_front(23); + sll.push_front(47); +// { dg-final { note-test sll {__gnu_cxx::slist = {[0] = 47, [1] = 23}} } } + + __gnu_cxx::slist::iterator slliter = sll.begin(); +// { dg-final { note-test slliter {47} } } + + return 0; // Mark SPOT +} + +// { dg-final { gdb-test SPOT } }