From: Ville Syrjälä Date: Fri, 21 Mar 2014 17:07:43 +0000 (-0700) Subject: quick_dump: chv: add full dpio phy dumps X-Git-Tag: intel-gpu-tools-1.7~22 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a115c4820802508733cdf7100f4de63c8d3dc50f;p=profile%2Fextras%2Fintel-gpu-tools.git quick_dump: chv: add full dpio phy dumps Signed-off-by: Ville Syrjälä Reviewed-by: Imre Deak --- diff --git a/tools/quick_dump/cherryview b/tools/quick_dump/cherryview index fb31879..3e24311 100644 --- a/tools/quick_dump/cherryview +++ b/tools/quick_dump/cherryview @@ -2,3 +2,5 @@ vlv_pipe_a.txt vlv_pipe_b.txt chv_pipe_c.txt chv_display_base.txt +chv_dpio_phy_x2.txt +chv_dpio_phy_x1.txt diff --git a/tools/quick_dump/chv_dpio_phy_x1.txt b/tools/quick_dump/chv_dpio_phy_x1.txt new file mode 100644 index 0000000..7b08a2d --- /dev/null +++ b/tools/quick_dump/chv_dpio_phy_x1.txt @@ -0,0 +1,216 @@ +('PLL1_DW0', '0x8000', 'DPIO') +('PLL1_DW1', '0x8004', 'DPIO') +('PLL1_DW2', '0x8008', 'DPIO') +('PLL1_DW3', '0x800C', 'DPIO') +('PLL1_DW4', '0x8010', 'DPIO') +('PLL1_DW5', '0x8014', 'DPIO') +('PLL1_DW6', '0x8018', 'DPIO') +('PLL1_DW7', '0x801C', 'DPIO') +('PLL1_DW8', '0x8020', 'DPIO') +('PLL1_DW9', '0x8024', 'DPIO') +('PLL1_DW10', '0x8028', 'DPIO') +('PLL1_DW11', '0x802C', 'DPIO') +('PLL1_DW12', '0x8030', 'DPIO') +('PLL1_DW13', '0x8034', 'DPIO') +('PLL1_DW14', '0x8038', 'DPIO') +('PLL1_DW15', '0x803C', 'DPIO') +('PLL1_DW16', '0x8040', 'DPIO') +('PLL1_DW17', '0x8044', 'DPIO') +('PLL1_DW18', '0x8048', 'DPIO') +('PLL1_DW19', '0x804C', 'DPIO') +('PLL1_DW20', '0x8050', 'DPIO') +('PLL1_DW21', '0x8054', 'DPIO') +('PLL1_DW22', '0x8058', 'DPIO') +('PLL1_DW23', '0x805C', 'DPIO') +('PLL1_DW24', '0x8060', 'DPIO') +('PLL1_DW25', '0x8064', 'DPIO') +('PLL1_DW26', '0x8068', 'DPIO') +('PLL1_DW27', '0x806C', 'DPIO') +('PLL1_DW28', '0x8070', 'DPIO') +('PLL1_DW29', '0x8074', 'DPIO') +('PLL1_DW30', '0x8078', 'DPIO') +('PLL1_DW31', '0x807C', 'DPIO') +('REF_DW0', '0x80A0', 'DPIO') +('REF_DW1', '0x80A4', 'DPIO') +('REF_DW2', '0x80A8', 'DPIO') +('REF_DW3', '0x80AC', 'DPIO') +('REF_DW4', '0x80B0', 'DPIO') +('REF_DW5', '0x80B4', 'DPIO') +('REF_DW6', '0x80B8', 'DPIO') +('REF_DW7', '0x80BC', 'DPIO') +('REF_DW8', '0x80C0', 'DPIO') +('REF_DW9', '0x80C4', 'DPIO') +('REF_DW10', '0x80C8', 'DPIO') +('REF_DW11', '0x80CC', 'DPIO') +('REF_DW12', '0x80D0', 'DPIO') +('REF_DW13', '0x80D4', 'DPIO') +('REF_DW14', '0x80D8', 'DPIO') +('REF_DW15', '0x80DC', 'DPIO') +('CL1_DW0', '0x8100', 'DPIO') +('CL1_DW1', '0x8104', 'DPIO') +('CL1_DW2', '0x8108', 'DPIO') +('CL1_DW3', '0x810C', 'DPIO') +('CL1_DW4', '0x8110', 'DPIO') +('CL1_DW5', '0x8114', 'DPIO') +('CL1_DW6', '0x8118', 'DPIO') +('CL1_DW7', '0x811C', 'DPIO') +('CL1_DW8', '0x8120', 'DPIO') +('CL1_DW9', '0x8124', 'DPIO') +('CL1_DW10', '0x8128', 'DPIO') +('CL1_DW11', '0x812C', 'DPIO') +('CL1_DW12', '0x8130', 'DPIO') +('CL1_DW13', '0x8134', 'DPIO') +('CL1_DW14', '0x8138', 'DPIO') +('CL1_DW15', '0x813C', 'DPIO') +('CL1_DW16', '0x8140', 'DPIO') +('CL1_DW17', '0x8144', 'DPIO') +('CL1_DW18', '0x8148', 'DPIO') +('CL1_DW19', '0x814C', 'DPIO') +('CL1_DW20', '0x8150', 'DPIO') +('CL1_DW21', '0x8154', 'DPIO') +('CL1_DW22', '0x8158', 'DPIO') +('CL1_DW23', '0x815C', 'DPIO') +('CL1_DW24', '0x8160', 'DPIO') +('CL1_DW25', '0x8164', 'DPIO') +('CL1_DW26', '0x8168', 'DPIO') +('CL1_DW27', '0x816C', 'DPIO') +('CL1_DW28', '0x8170', 'DPIO') +('CL1_DW29', '0x8174', 'DPIO') +('CL1_DW30', '0x8178', 'DPIO') +('CL1_DW31', '0x817C', 'DPIO') +('PCS01_CH0_DW0', '0x0200', 'DPIO') +('PCS01_CH0_DW1', '0x0204', 'DPIO') +('PCS01_CH0_DW2', '0x0208', 'DPIO') +('PCS01_CH0_DW3', '0x020C', 'DPIO') +('PCS01_CH0_DW4', '0x0210', 'DPIO') +('PCS01_CH0_DW5', '0x0214', 'DPIO') +('PCS01_CH0_DW6', '0x0218', 'DPIO') +('PCS01_CH0_DW7', '0x021C', 'DPIO') +('PCS01_CH0_DW8', '0x0220', 'DPIO') +('PCS01_CH0_DW9', '0x0224', 'DPIO') +('PCS01_CH0_DW10', '0x0228', 'DPIO') +('PCS01_CH0_DW11', '0x022C', 'DPIO') +('PCS01_CH0_DW12', '0x0230', 'DPIO') +('PCS01_CH0_DW13', '0x0234', 'DPIO') +('PCS01_CH0_DW14', '0x0238', 'DPIO') +('PCS01_CH0_DW15', '0x023C', 'DPIO') +('PCS01_CH0_DW16', '0x0240', 'DPIO') +('PCS01_CH0_DW17', '0x0244', 'DPIO') +('PCS01_CH0_DW18', '0x0248', 'DPIO') +('PCS01_CH0_DW19', '0x024C', 'DPIO') +('PCS01_CH0_DW20', '0x0250', 'DPIO') +('PCS01_CH0_DW21', '0x0254', 'DPIO') +('PCS01_CH0_DW22', '0x0258', 'DPIO') +('PCS01_CH0_DW23', '0x025C', 'DPIO') +('PCS01_CH0_DW24', '0x0260', 'DPIO') +('PCS01_CH0_DW25', '0x0264', 'DPIO') +('TX0_CH0_DW0', '0x0080', 'DPIO') +('TX0_CH0_DW1', '0x0084', 'DPIO') +('TX0_CH0_DW2', '0x0088', 'DPIO') +('TX0_CH0_DW3', '0x008C', 'DPIO') +('TX0_CH0_DW4', '0x0090', 'DPIO') +('TX0_CH0_DW5', '0x0094', 'DPIO') +('TX0_CH0_DW6', '0x0098', 'DPIO') +('TX0_CH0_DW7', '0x009C', 'DPIO') +('TX0_CH0_DW8', '0x00A0', 'DPIO') +('TX0_CH0_DW9', '0x00A4', 'DPIO') +('TX0_CH0_DW10', '0x00A8', 'DPIO') +('TX0_CH0_DW11', '0x00AC', 'DPIO') +('TX0_CH0_DW12', '0x00B0', 'DPIO') +('TX0_CH0_DW13', '0x00B4', 'DPIO') +('TX0_CH0_DW14', '0x00B8', 'DPIO') +('TX0_CH0_DW15', '0x00BC', 'DPIO') +('TX0_CH0_DW16', '0x00C0', 'DPIO') +('TX0_CH0_DW17', '0x00C4', 'DPIO') +('TX0_CH0_DW18', '0x00C8', 'DPIO') +('TX0_CH0_DW19', '0x00CC', 'DPIO') +('TX0_CH0_DW20', '0x00D0', 'DPIO') +('TX1_CH0_DW0', '0x0280', 'DPIO') +('TX1_CH0_DW1', '0x0284', 'DPIO') +('TX1_CH0_DW2', '0x0288', 'DPIO') +('TX1_CH0_DW3', '0x028C', 'DPIO') +('TX1_CH0_DW4', '0x0290', 'DPIO') +('TX1_CH0_DW5', '0x0294', 'DPIO') +('TX1_CH0_DW6', '0x0298', 'DPIO') +('TX1_CH0_DW7', '0x029C', 'DPIO') +('TX1_CH0_DW8', '0x02A0', 'DPIO') +('TX1_CH0_DW9', '0x02A4', 'DPIO') +('TX1_CH0_DW10', '0x02A8', 'DPIO') +('TX1_CH0_DW11', '0x02AC', 'DPIO') +('TX1_CH0_DW12', '0x02B0', 'DPIO') +('TX1_CH0_DW13', '0x02B4', 'DPIO') +('TX1_CH0_DW14', '0x02B8', 'DPIO') +('TX1_CH0_DW15', '0x02BC', 'DPIO') +('TX1_CH0_DW16', '0x02C0', 'DPIO') +('TX1_CH0_DW17', '0x02C4', 'DPIO') +('TX1_CH0_DW18', '0x02C8', 'DPIO') +('TX1_CH0_DW19', '0x02CC', 'DPIO') +('TX1_CH0_DW20', '0x02D0', 'DPIO') +('PCS23_CH0_DW0', '0x0400', 'DPIO') +('PCS23_CH0_DW1', '0x0404', 'DPIO') +('PCS23_CH0_DW2', '0x0408', 'DPIO') +('PCS23_CH0_DW3', '0x040C', 'DPIO') +('PCS23_CH0_DW4', '0x0410', 'DPIO') +('PCS23_CH0_DW5', '0x0414', 'DPIO') +('PCS23_CH0_DW6', '0x0418', 'DPIO') +('PCS23_CH0_DW7', '0x041C', 'DPIO') +('PCS23_CH0_DW8', '0x0420', 'DPIO') +('PCS23_CH0_DW9', '0x0424', 'DPIO') +('PCS23_CH0_DW10', '0x0428', 'DPIO') +('PCS23_CH0_DW11', '0x042C', 'DPIO') +('PCS23_CH0_DW12', '0x0430', 'DPIO') +('PCS23_CH0_DW13', '0x0434', 'DPIO') +('PCS23_CH0_DW14', '0x0438', 'DPIO') +('PCS23_CH0_DW15', '0x043C', 'DPIO') +('PCS23_CH0_DW16', '0x0440', 'DPIO') +('PCS23_CH0_DW17', '0x0444', 'DPIO') +('PCS23_CH0_DW18', '0x0448', 'DPIO') +('PCS23_CH0_DW19', '0x044C', 'DPIO') +('PCS23_CH0_DW20', '0x0450', 'DPIO') +('PCS23_CH0_DW21', '0x0454', 'DPIO') +('PCS23_CH0_DW22', '0x0458', 'DPIO') +('PCS23_CH0_DW23', '0x045C', 'DPIO') +('PCS23_CH0_DW24', '0x0460', 'DPIO') +('PCS23_CH0_DW25', '0x0464', 'DPIO') +('TX2_CH0_DW0', '0x0480', 'DPIO') +('TX2_CH0_DW1', '0x0484', 'DPIO') +('TX2_CH0_DW2', '0x0488', 'DPIO') +('TX2_CH0_DW3', '0x048C', 'DPIO') +('TX2_CH0_DW4', '0x0490', 'DPIO') +('TX2_CH0_DW5', '0x0494', 'DPIO') +('TX2_CH0_DW6', '0x0498', 'DPIO') +('TX2_CH0_DW7', '0x049C', 'DPIO') +('TX2_CH0_DW8', '0x04A0', 'DPIO') +('TX2_CH0_DW9', '0x04A4', 'DPIO') +('TX2_CH0_DW10', '0x04A8', 'DPIO') +('TX2_CH0_DW11', '0x04AC', 'DPIO') +('TX2_CH0_DW12', '0x04B0', 'DPIO') +('TX2_CH0_DW13', '0x04B4', 'DPIO') +('TX2_CH0_DW14', '0x04B8', 'DPIO') +('TX2_CH0_DW15', '0x04BC', 'DPIO') +('TX2_CH0_DW16', '0x04C0', 'DPIO') +('TX2_CH0_DW17', '0x04C4', 'DPIO') +('TX2_CH0_DW18', '0x04C8', 'DPIO') +('TX2_CH0_DW19', '0x04CC', 'DPIO') +('TX2_CH0_DW20', '0x04D0', 'DPIO') +('TX3_CH0_DW0', '0x0680', 'DPIO') +('TX3_CH0_DW1', '0x0684', 'DPIO') +('TX3_CH0_DW2', '0x0688', 'DPIO') +('TX3_CH0_DW3', '0x068C', 'DPIO') +('TX3_CH0_DW4', '0x0690', 'DPIO') +('TX3_CH0_DW5', '0x0694', 'DPIO') +('TX3_CH0_DW6', '0x0698', 'DPIO') +('TX3_CH0_DW7', '0x069C', 'DPIO') +('TX3_CH0_DW8', '0x06A0', 'DPIO') +('TX3_CH0_DW9', '0x06A4', 'DPIO') +('TX3_CH0_DW10', '0x06A8', 'DPIO') +('TX3_CH0_DW11', '0x06AC', 'DPIO') +('TX3_CH0_DW12', '0x06B0', 'DPIO') +('TX3_CH0_DW13', '0x06B4', 'DPIO') +('TX3_CH0_DW14', '0x06B8', 'DPIO') +('TX3_CH0_DW15', '0x06BC', 'DPIO') +('TX3_CH0_DW16', '0x06C0', 'DPIO') +('TX3_CH0_DW17', '0x06C4', 'DPIO') +('TX3_CH0_DW18', '0x06C8', 'DPIO') +('TX3_CH0_DW19', '0x06CC', 'DPIO') +('TX3_CH0_DW20', '0x06D0', 'DPIO') diff --git a/tools/quick_dump/chv_dpio_phy_x2.txt b/tools/quick_dump/chv_dpio_phy_x2.txt new file mode 100644 index 0000000..1dd8f68 --- /dev/null +++ b/tools/quick_dump/chv_dpio_phy_x2.txt @@ -0,0 +1,392 @@ +('PLL1_DW0', '0x8000', 'DPIO2') +('PLL1_DW1', '0x8004', 'DPIO2') +('PLL1_DW2', '0x8008', 'DPIO2') +('PLL1_DW3', '0x800C', 'DPIO2') +('PLL1_DW4', '0x8010', 'DPIO2') +('PLL1_DW5', '0x8014', 'DPIO2') +('PLL1_DW6', '0x8018', 'DPIO2') +('PLL1_DW7', '0x801C', 'DPIO2') +('PLL1_DW8', '0x8020', 'DPIO2') +('PLL1_DW9', '0x8024', 'DPIO2') +('PLL1_DW10', '0x8028', 'DPIO2') +('PLL1_DW11', '0x802C', 'DPIO2') +('PLL1_DW12', '0x8030', 'DPIO2') +('PLL1_DW13', '0x8034', 'DPIO2') +('PLL1_DW14', '0x8038', 'DPIO2') +('PLL1_DW15', '0x803C', 'DPIO2') +('PLL1_DW16', '0x8040', 'DPIO2') +('PLL1_DW17', '0x8044', 'DPIO2') +('PLL1_DW18', '0x8048', 'DPIO2') +('PLL1_DW19', '0x804C', 'DPIO2') +('PLL1_DW20', '0x8050', 'DPIO2') +('PLL1_DW21', '0x8054', 'DPIO2') +('PLL1_DW22', '0x8058', 'DPIO2') +('PLL1_DW23', '0x805C', 'DPIO2') +('PLL1_DW24', '0x8060', 'DPIO2') +('PLL1_DW25', '0x8064', 'DPIO2') +('PLL1_DW26', '0x8068', 'DPIO2') +('PLL1_DW27', '0x806C', 'DPIO2') +('PLL1_DW28', '0x8070', 'DPIO2') +('PLL1_DW29', '0x8074', 'DPIO2') +('PLL1_DW30', '0x8078', 'DPIO2') +('PLL1_DW31', '0x807C', 'DPIO2') +('CL2_DW0', '0x8080', 'DPIO2') +('CL2_DW1', '0x8084', 'DPIO2') +('CL2_DW2', '0x8088', 'DPIO2') +('CL2_DW3', '0x808C', 'DPIO2') +('CL2_DW4', '0x8090', 'DPIO2') +('CL2_DW5', '0x8094', 'DPIO2') +('CL2_DW6', '0x8098', 'DPIO2') +('CL2_DW7', '0x809C', 'DPIO2') +('REF_DW0', '0x80A0', 'DPIO2') +('REF_DW1', '0x80A4', 'DPIO2') +('REF_DW2', '0x80A8', 'DPIO2') +('REF_DW3', '0x80AC', 'DPIO2') +('REF_DW4', '0x80B0', 'DPIO2') +('REF_DW5', '0x80B4', 'DPIO2') +('REF_DW6', '0x80B8', 'DPIO2') +('REF_DW7', '0x80BC', 'DPIO2') +('REF_DW8', '0x80C0', 'DPIO2') +('REF_DW9', '0x80C4', 'DPIO2') +('REF_DW10', '0x80C8', 'DPIO2') +('REF_DW11', '0x80CC', 'DPIO2') +('REF_DW12', '0x80D0', 'DPIO2') +('REF_DW13', '0x80D4', 'DPIO2') +('REF_DW14', '0x80D8', 'DPIO2') +('REF_DW15', '0x80DC', 'DPIO2') +('CL1_DW0', '0x8100', 'DPIO2') +('CL1_DW1', '0x8104', 'DPIO2') +('CL1_DW2', '0x8108', 'DPIO2') +('CL1_DW3', '0x810C', 'DPIO2') +('CL1_DW4', '0x8110', 'DPIO2') +('CL1_DW5', '0x8114', 'DPIO2') +('CL1_DW6', '0x8118', 'DPIO2') +('CL1_DW7', '0x811C', 'DPIO2') +('CL1_DW8', '0x8120', 'DPIO2') +('CL1_DW9', '0x8124', 'DPIO2') +('CL1_DW10', '0x8128', 'DPIO2') +('CL1_DW11', '0x812C', 'DPIO2') +('CL1_DW12', '0x8130', 'DPIO2') +('CL1_DW13', '0x8134', 'DPIO2') +('CL1_DW14', '0x8138', 'DPIO2') +('CL1_DW15', '0x813C', 'DPIO2') +('CL1_DW16', '0x8140', 'DPIO2') +('CL1_DW17', '0x8144', 'DPIO2') +('CL1_DW18', '0x8148', 'DPIO2') +('CL1_DW19', '0x814C', 'DPIO2') +('CL1_DW20', '0x8150', 'DPIO2') +('CL1_DW21', '0x8154', 'DPIO2') +('CL1_DW22', '0x8158', 'DPIO2') +('CL1_DW23', '0x815C', 'DPIO2') +('CL1_DW24', '0x8160', 'DPIO2') +('CL1_DW25', '0x8164', 'DPIO2') +('CL1_DW26', '0x8168', 'DPIO2') +('CL1_DW27', '0x816C', 'DPIO2') +('CL1_DW28', '0x8170', 'DPIO2') +('CL1_DW29', '0x8174', 'DPIO2') +('CL1_DW30', '0x8178', 'DPIO2') +('CL1_DW31', '0x817C', 'DPIO2') +('PLL2_DW0', '0x8180', 'DPIO2') +('PLL2_DW1', '0x8184', 'DPIO2') +('PLL2_DW2', '0x8188', 'DPIO2') +('PLL2_DW3', '0x818C', 'DPIO2') +('PLL2_DW4', '0x8190', 'DPIO2') +('PLL2_DW5', '0x8194', 'DPIO2') +('PLL2_DW6', '0x8198', 'DPIO2') +('PLL2_DW7', '0x819C', 'DPIO2') +('PLL2_DW8', '0x81A0', 'DPIO2') +('PLL2_DW9', '0x81A4', 'DPIO2') +('PLL2_DW10', '0x81A8', 'DPIO2') +('PLL2_DW11', '0x81AC', 'DPIO2') +('PLL2_DW12', '0x81B0', 'DPIO2') +('PLL2_DW13', '0x81B4', 'DPIO2') +('PLL2_DW14', '0x81B8', 'DPIO2') +('PLL2_DW15', '0x81BC', 'DPIO2') +('PLL2_DW16', '0x81C0', 'DPIO2') +('PLL2_DW17', '0x81C4', 'DPIO2') +('PLL2_DW18', '0x81C8', 'DPIO2') +('PLL2_DW19', '0x81CC', 'DPIO2') +('PLL2_DW20', '0x81D0', 'DPIO2') +('PLL2_DW21', '0x81D4', 'DPIO2') +('PLL2_DW22', '0x81D8', 'DPIO2') +('PLL2_DW23', '0x81DC', 'DPIO2') +('PLL2_DW24', '0x81E0', 'DPIO2') +('PLL2_DW25', '0x81E4', 'DPIO2') +('PLL2_DW26', '0x81E8', 'DPIO2') +('PLL2_DW27', '0x81EC', 'DPIO2') +('PLL2_DW28', '0x81F0', 'DPIO2') +('PLL2_DW29', '0x81F4', 'DPIO2') +('PLL2_DW30', '0x81F8', 'DPIO2') +('PLL2_DW31', '0x81FC', 'DPIO2') +('PCS01_CH0_DW0', '0x0200', 'DPIO2') +('PCS01_CH0_DW1', '0x0204', 'DPIO2') +('PCS01_CH0_DW2', '0x0208', 'DPIO2') +('PCS01_CH0_DW3', '0x020C', 'DPIO2') +('PCS01_CH0_DW4', '0x0210', 'DPIO2') +('PCS01_CH0_DW5', '0x0214', 'DPIO2') +('PCS01_CH0_DW6', '0x0218', 'DPIO2') +('PCS01_CH0_DW7', '0x021C', 'DPIO2') +('PCS01_CH0_DW8', '0x0220', 'DPIO2') +('PCS01_CH0_DW9', '0x0224', 'DPIO2') +('PCS01_CH0_DW10', '0x0228', 'DPIO2') +('PCS01_CH0_DW11', '0x022C', 'DPIO2') +('PCS01_CH0_DW12', '0x0230', 'DPIO2') +('PCS01_CH0_DW13', '0x0234', 'DPIO2') +('PCS01_CH0_DW14', '0x0238', 'DPIO2') +('PCS01_CH0_DW15', '0x023C', 'DPIO2') +('PCS01_CH0_DW16', '0x0240', 'DPIO2') +('PCS01_CH0_DW17', '0x0244', 'DPIO2') +('PCS01_CH0_DW18', '0x0248', 'DPIO2') +('PCS01_CH0_DW19', '0x024C', 'DPIO2') +('PCS01_CH0_DW20', '0x0250', 'DPIO2') +('PCS01_CH0_DW21', '0x0254', 'DPIO2') +('PCS01_CH0_DW22', '0x0258', 'DPIO2') +('PCS01_CH0_DW23', '0x025C', 'DPIO2') +('PCS01_CH0_DW24', '0x0260', 'DPIO2') +('PCS01_CH0_DW25', '0x0264', 'DPIO2') +('TX0_CH0_DW0', '0x0080', 'DPIO2') +('TX0_CH0_DW1', '0x0084', 'DPIO2') +('TX0_CH0_DW2', '0x0088', 'DPIO2') +('TX0_CH0_DW3', '0x008C', 'DPIO2') +('TX0_CH0_DW4', '0x0090', 'DPIO2') +('TX0_CH0_DW5', '0x0094', 'DPIO2') +('TX0_CH0_DW6', '0x0098', 'DPIO2') +('TX0_CH0_DW7', '0x009C', 'DPIO2') +('TX0_CH0_DW8', '0x00A0', 'DPIO2') +('TX0_CH0_DW9', '0x00A4', 'DPIO2') +('TX0_CH0_DW10', '0x00A8', 'DPIO2') +('TX0_CH0_DW11', '0x00AC', 'DPIO2') +('TX0_CH0_DW12', '0x00B0', 'DPIO2') +('TX0_CH0_DW13', '0x00B4', 'DPIO2') +('TX0_CH0_DW14', '0x00B8', 'DPIO2') +('TX0_CH0_DW15', '0x00BC', 'DPIO2') +('TX0_CH0_DW16', '0x00C0', 'DPIO2') +('TX0_CH0_DW17', '0x00C4', 'DPIO2') +('TX0_CH0_DW18', '0x00C8', 'DPIO2') +('TX0_CH0_DW19', '0x00CC', 'DPIO2') +('TX0_CH0_DW20', '0x00D0', 'DPIO2') +('TX1_CH0_DW0', '0x0280', 'DPIO2') +('TX1_CH0_DW1', '0x0284', 'DPIO2') +('TX1_CH0_DW2', '0x0288', 'DPIO2') +('TX1_CH0_DW3', '0x028C', 'DPIO2') +('TX1_CH0_DW4', '0x0290', 'DPIO2') +('TX1_CH0_DW5', '0x0294', 'DPIO2') +('TX1_CH0_DW6', '0x0298', 'DPIO2') +('TX1_CH0_DW7', '0x029C', 'DPIO2') +('TX1_CH0_DW8', '0x02A0', 'DPIO2') +('TX1_CH0_DW9', '0x02A4', 'DPIO2') +('TX1_CH0_DW10', '0x02A8', 'DPIO2') +('TX1_CH0_DW11', '0x02AC', 'DPIO2') +('TX1_CH0_DW12', '0x02B0', 'DPIO2') +('TX1_CH0_DW13', '0x02B4', 'DPIO2') +('TX1_CH0_DW14', '0x02B8', 'DPIO2') +('TX1_CH0_DW15', '0x02BC', 'DPIO2') +('TX1_CH0_DW16', '0x02C0', 'DPIO2') +('TX1_CH0_DW17', '0x02C4', 'DPIO2') +('TX1_CH0_DW18', '0x02C8', 'DPIO2') +('TX1_CH0_DW19', '0x02CC', 'DPIO2') +('TX1_CH0_DW20', '0x02D0', 'DPIO2') +('PCS23_CH0_DW0', '0x0400', 'DPIO2') +('PCS23_CH0_DW1', '0x0404', 'DPIO2') +('PCS23_CH0_DW2', '0x0408', 'DPIO2') +('PCS23_CH0_DW3', '0x040C', 'DPIO2') +('PCS23_CH0_DW4', '0x0410', 'DPIO2') +('PCS23_CH0_DW5', '0x0414', 'DPIO2') +('PCS23_CH0_DW6', '0x0418', 'DPIO2') +('PCS23_CH0_DW7', '0x041C', 'DPIO2') +('PCS23_CH0_DW8', '0x0420', 'DPIO2') +('PCS23_CH0_DW9', '0x0424', 'DPIO2') +('PCS23_CH0_DW10', '0x0428', 'DPIO2') +('PCS23_CH0_DW11', '0x042C', 'DPIO2') +('PCS23_CH0_DW12', '0x0430', 'DPIO2') +('PCS23_CH0_DW13', '0x0434', 'DPIO2') +('PCS23_CH0_DW14', '0x0438', 'DPIO2') +('PCS23_CH0_DW15', '0x043C', 'DPIO2') +('PCS23_CH0_DW16', '0x0440', 'DPIO2') +('PCS23_CH0_DW17', '0x0444', 'DPIO2') +('PCS23_CH0_DW18', '0x0448', 'DPIO2') +('PCS23_CH0_DW19', '0x044C', 'DPIO2') +('PCS23_CH0_DW20', '0x0450', 'DPIO2') +('PCS23_CH0_DW21', '0x0454', 'DPIO2') +('PCS23_CH0_DW22', '0x0458', 'DPIO2') +('PCS23_CH0_DW23', '0x045C', 'DPIO2') +('PCS23_CH0_DW24', '0x0460', 'DPIO2') +('PCS23_CH0_DW25', '0x0464', 'DPIO2') +('TX2_CH0_DW0', '0x0480', 'DPIO2') +('TX2_CH0_DW1', '0x0484', 'DPIO2') +('TX2_CH0_DW2', '0x0488', 'DPIO2') +('TX2_CH0_DW3', '0x048C', 'DPIO2') +('TX2_CH0_DW4', '0x0490', 'DPIO2') +('TX2_CH0_DW5', '0x0494', 'DPIO2') +('TX2_CH0_DW6', '0x0498', 'DPIO2') +('TX2_CH0_DW7', '0x049C', 'DPIO2') +('TX2_CH0_DW8', '0x04A0', 'DPIO2') +('TX2_CH0_DW9', '0x04A4', 'DPIO2') +('TX2_CH0_DW10', '0x04A8', 'DPIO2') +('TX2_CH0_DW11', '0x04AC', 'DPIO2') +('TX2_CH0_DW12', '0x04B0', 'DPIO2') +('TX2_CH0_DW13', '0x04B4', 'DPIO2') +('TX2_CH0_DW14', '0x04B8', 'DPIO2') +('TX2_CH0_DW15', '0x04BC', 'DPIO2') +('TX2_CH0_DW16', '0x04C0', 'DPIO2') +('TX2_CH0_DW17', '0x04C4', 'DPIO2') +('TX2_CH0_DW18', '0x04C8', 'DPIO2') +('TX2_CH0_DW19', '0x04CC', 'DPIO2') +('TX2_CH0_DW20', '0x04D0', 'DPIO2') +('TX3_CH0_DW0', '0x0680', 'DPIO2') +('TX3_CH0_DW1', '0x0684', 'DPIO2') +('TX3_CH0_DW2', '0x0688', 'DPIO2') +('TX3_CH0_DW3', '0x068C', 'DPIO2') +('TX3_CH0_DW4', '0x0690', 'DPIO2') +('TX3_CH0_DW5', '0x0694', 'DPIO2') +('TX3_CH0_DW6', '0x0698', 'DPIO2') +('TX3_CH0_DW7', '0x069C', 'DPIO2') +('TX3_CH0_DW8', '0x06A0', 'DPIO2') +('TX3_CH0_DW9', '0x06A4', 'DPIO2') +('TX3_CH0_DW10', '0x06A8', 'DPIO2') +('TX3_CH0_DW11', '0x06AC', 'DPIO2') +('TX3_CH0_DW12', '0x06B0', 'DPIO2') +('TX3_CH0_DW13', '0x06B4', 'DPIO2') +('TX3_CH0_DW14', '0x06B8', 'DPIO2') +('TX3_CH0_DW15', '0x06BC', 'DPIO2') +('TX3_CH0_DW16', '0x06C0', 'DPIO2') +('TX3_CH0_DW17', '0x06C4', 'DPIO2') +('TX3_CH0_DW18', '0x06C8', 'DPIO2') +('TX3_CH0_DW19', '0x06CC', 'DPIO2') +('TX3_CH0_DW20', '0x06D0', 'DPIO2') +('PCS01_CH1_DW0', '0x2600', 'DPIO2') +('PCS01_CH1_DW1', '0x2604', 'DPIO2') +('PCS01_CH1_DW2', '0x2608', 'DPIO2') +('PCS01_CH1_DW3', '0x260C', 'DPIO2') +('PCS01_CH1_DW4', '0x2610', 'DPIO2') +('PCS01_CH1_DW5', '0x2614', 'DPIO2') +('PCS01_CH1_DW6', '0x2618', 'DPIO2') +('PCS01_CH1_DW7', '0x261C', 'DPIO2') +('PCS01_CH1_DW8', '0x2620', 'DPIO2') +('PCS01_CH1_DW9', '0x2624', 'DPIO2') +('PCS01_CH1_DW10', '0x2628', 'DPIO2') +('PCS01_CH1_DW11', '0x262C', 'DPIO2') +('PCS01_CH1_DW12', '0x2630', 'DPIO2') +('PCS01_CH1_DW13', '0x2634', 'DPIO2') +('PCS01_CH1_DW14', '0x2638', 'DPIO2') +('PCS01_CH1_DW15', '0x263C', 'DPIO2') +('PCS01_CH1_DW16', '0x2640', 'DPIO2') +('PCS01_CH1_DW17', '0x2644', 'DPIO2') +('PCS01_CH1_DW18', '0x2648', 'DPIO2') +('PCS01_CH1_DW19', '0x264C', 'DPIO2') +('PCS01_CH1_DW20', '0x2650', 'DPIO2') +('PCS01_CH1_DW21', '0x2654', 'DPIO2') +('PCS01_CH1_DW22', '0x2658', 'DPIO2') +('PCS01_CH1_DW23', '0x265C', 'DPIO2') +('PCS01_CH1_DW24', '0x2660', 'DPIO2') +('PCS01_CH1_DW25', '0x2664', 'DPIO2') +('TX0_CH1_DW0', '0x2480', 'DPIO2') +('TX0_CH1_DW1', '0x2484', 'DPIO2') +('TX0_CH1_DW2', '0x2488', 'DPIO2') +('TX0_CH1_DW3', '0x248C', 'DPIO2') +('TX0_CH1_DW4', '0x2490', 'DPIO2') +('TX0_CH1_DW5', '0x2494', 'DPIO2') +('TX0_CH1_DW6', '0x2498', 'DPIO2') +('TX0_CH1_DW7', '0x249C', 'DPIO2') +('TX0_CH1_DW8', '0x24A0', 'DPIO2') +('TX0_CH1_DW9', '0x24A4', 'DPIO2') +('TX0_CH1_DW10', '0x24A8', 'DPIO2') +('TX0_CH1_DW11', '0x24AC', 'DPIO2') +('TX0_CH1_DW12', '0x24B0', 'DPIO2') +('TX0_CH1_DW13', '0x24B4', 'DPIO2') +('TX0_CH1_DW14', '0x24B8', 'DPIO2') +('TX0_CH1_DW15', '0x24BC', 'DPIO2') +('TX0_CH1_DW16', '0x24C0', 'DPIO2') +('TX0_CH1_DW17', '0x24C4', 'DPIO2') +('TX0_CH1_DW18', '0x24C8', 'DPIO2') +('TX0_CH1_DW19', '0x24CC', 'DPIO2') +('TX0_CH1_DW20', '0x24D0', 'DPIO2') +('TX1_CH1_DW0', '0x2680', 'DPIO2') +('TX1_CH1_DW1', '0x2684', 'DPIO2') +('TX1_CH1_DW2', '0x2688', 'DPIO2') +('TX1_CH1_DW3', '0x268C', 'DPIO2') +('TX1_CH1_DW4', '0x2690', 'DPIO2') +('TX1_CH1_DW5', '0x2694', 'DPIO2') +('TX1_CH1_DW6', '0x2698', 'DPIO2') +('TX1_CH1_DW7', '0x269C', 'DPIO2') +('TX1_CH1_DW8', '0x26A0', 'DPIO2') +('TX1_CH1_DW9', '0x26A4', 'DPIO2') +('TX1_CH1_DW10', '0x26A8', 'DPIO2') +('TX1_CH1_DW11', '0x26AC', 'DPIO2') +('TX1_CH1_DW12', '0x26B0', 'DPIO2') +('TX1_CH1_DW13', '0x26B4', 'DPIO2') +('TX1_CH1_DW14', '0x26B8', 'DPIO2') +('TX1_CH1_DW15', '0x26BC', 'DPIO2') +('TX1_CH1_DW16', '0x26C0', 'DPIO2') +('TX1_CH1_DW17', '0x26C4', 'DPIO2') +('TX1_CH1_DW18', '0x26C8', 'DPIO2') +('TX1_CH1_DW19', '0x26CC', 'DPIO2') +('TX1_CH1_DW20', '0x26D0', 'DPIO2') +('PCS23_CH1_DW0', '0x2800', 'DPIO2') +('PCS23_CH1_DW1', '0x2804', 'DPIO2') +('PCS23_CH1_DW2', '0x2808', 'DPIO2') +('PCS23_CH1_DW3', '0x280C', 'DPIO2') +('PCS23_CH1_DW4', '0x2810', 'DPIO2') +('PCS23_CH1_DW5', '0x2814', 'DPIO2') +('PCS23_CH1_DW6', '0x2818', 'DPIO2') +('PCS23_CH1_DW7', '0x281C', 'DPIO2') +('PCS23_CH1_DW8', '0x2820', 'DPIO2') +('PCS23_CH1_DW9', '0x2824', 'DPIO2') +('PCS23_CH1_DW10', '0x2828', 'DPIO2') +('PCS23_CH1_DW11', '0x282C', 'DPIO2') +('PCS23_CH1_DW12', '0x2830', 'DPIO2') +('PCS23_CH1_DW13', '0x2834', 'DPIO2') +('PCS23_CH1_DW14', '0x2838', 'DPIO2') +('PCS23_CH1_DW15', '0x283C', 'DPIO2') +('PCS23_CH1_DW16', '0x2840', 'DPIO2') +('PCS23_CH1_DW17', '0x2844', 'DPIO2') +('PCS23_CH1_DW18', '0x2848', 'DPIO2') +('PCS23_CH1_DW19', '0x284C', 'DPIO2') +('PCS23_CH1_DW20', '0x2850', 'DPIO2') +('PCS23_CH1_DW21', '0x2854', 'DPIO2') +('PCS23_CH1_DW22', '0x2858', 'DPIO2') +('PCS23_CH1_DW23', '0x285C', 'DPIO2') +('PCS23_CH1_DW24', '0x2860', 'DPIO2') +('PCS23_CH1_DW25', '0x2864', 'DPIO2') +('TX2_CH1_DW0', '0x2880', 'DPIO2') +('TX2_CH1_DW1', '0x2884', 'DPIO2') +('TX2_CH1_DW2', '0x2888', 'DPIO2') +('TX2_CH1_DW3', '0x288C', 'DPIO2') +('TX2_CH1_DW4', '0x2890', 'DPIO2') +('TX2_CH1_DW5', '0x2894', 'DPIO2') +('TX2_CH1_DW6', '0x2898', 'DPIO2') +('TX2_CH1_DW7', '0x289C', 'DPIO2') +('TX2_CH1_DW8', '0x28A0', 'DPIO2') +('TX2_CH1_DW9', '0x28A4', 'DPIO2') +('TX2_CH1_DW10', '0x28A8', 'DPIO2') +('TX2_CH1_DW11', '0x28AC', 'DPIO2') +('TX2_CH1_DW12', '0x28B0', 'DPIO2') +('TX2_CH1_DW13', '0x28B4', 'DPIO2') +('TX2_CH1_DW14', '0x28B8', 'DPIO2') +('TX2_CH1_DW15', '0x28BC', 'DPIO2') +('TX2_CH1_DW16', '0x28C0', 'DPIO2') +('TX2_CH1_DW17', '0x28C4', 'DPIO2') +('TX2_CH1_DW18', '0x28C8', 'DPIO2') +('TX2_CH1_DW19', '0x28CC', 'DPIO2') +('TX2_CH1_DW20', '0x28D0', 'DPIO2') +('TX3_CH1_DW0', '0x2A80', 'DPIO2') +('TX3_CH1_DW1', '0x2A84', 'DPIO2') +('TX3_CH1_DW2', '0x2A88', 'DPIO2') +('TX3_CH1_DW3', '0x2A8C', 'DPIO2') +('TX3_CH1_DW4', '0x2A90', 'DPIO2') +('TX3_CH1_DW5', '0x2A94', 'DPIO2') +('TX3_CH1_DW6', '0x2A98', 'DPIO2') +('TX3_CH1_DW7', '0x2A9C', 'DPIO2') +('TX3_CH1_DW8', '0x2AA0', 'DPIO2') +('TX3_CH1_DW9', '0x2AA4', 'DPIO2') +('TX3_CH1_DW10', '0x2AA8', 'DPIO2') +('TX3_CH1_DW11', '0x2AAC', 'DPIO2') +('TX3_CH1_DW12', '0x2AB0', 'DPIO2') +('TX3_CH1_DW13', '0x2AB4', 'DPIO2') +('TX3_CH1_DW14', '0x2AB8', 'DPIO2') +('TX3_CH1_DW15', '0x2ABC', 'DPIO2') +('TX3_CH1_DW16', '0x2AC0', 'DPIO2') +('TX3_CH1_DW17', '0x2AC4', 'DPIO2') +('TX3_CH1_DW18', '0x2AC8', 'DPIO2') +('TX3_CH1_DW19', '0x2ACC', 'DPIO2') +('TX3_CH1_DW20', '0x2AD0', 'DPIO2')