From: Max Filippov Date: Sat, 14 Jan 2012 09:29:29 +0000 (+0400) Subject: target-xtensa: fetch 3rd opcode byte only when needed X-Git-Tag: TizenStudio_2.0_p2.3.2~208^2~4425^2~9 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a044ec2a066a6002f83aba5ee937db17e7493fa8;p=sdk%2Femulator%2Fqemu.git target-xtensa: fetch 3rd opcode byte only when needed According to ISA, 3.5.4, third opcode byte should not be fetched for 2-byte instructions. Signed-off-by: Max Filippov --- diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index c81450d..6a0177f 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -749,7 +749,7 @@ static void disas_xtensa_insn(DisasContext *dc) uint8_t b0 = ldub_code(dc->pc); uint8_t b1 = ldub_code(dc->pc + 1); - uint8_t b2 = ldub_code(dc->pc + 2); + uint8_t b2 = 0; static const uint32_t B4CONST[] = { 0xffffffff, 1, 2, 3, 4, 5, 6, 7, 8, 10, 12, 16, 32, 64, 128, 256 @@ -764,6 +764,7 @@ static void disas_xtensa_insn(DisasContext *dc) HAS_OPTION(XTENSA_OPTION_CODE_DENSITY); } else { dc->next_pc = dc->pc + 3; + b2 = ldub_code(dc->pc + 2); } switch (OP0) {