From: Brian Paul <brianp@vmware.com>
Date: Sat, 16 Jul 2022 02:36:31 +0000 (-0600)
Subject: llvmpipe: further bump LP_MAX_TGSI_SHADER_IMAGES to 64
X-Git-Tag: upstream/22.3.5~2647
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9fbb77445c0def196bcf4db583d8ab633e6cf684;p=platform%2Fupstream%2Fmesa.git

llvmpipe: further bump LP_MAX_TGSI_SHADER_IMAGES to 64

I previously bumped this to 32, but we need at least 64 to pass
a few other VMware tests (e.g. dx11-slots-uav-write-vs-gs-all-64).

Also update/generalize a comment.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>
---

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
index 7c1d66a..b0b854a 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
@@ -37,10 +37,7 @@
 #include "util/u_cpu_detect.h"
 
 /*
- * TGSI translation limits.
- *
- * Some are slightly above SM 3.0 requirements to give some wiggle room to
- * the gallium frontends.
+ * llvmpipe shader limits
  */
 
 #define LP_MAX_TGSI_TEMPS 4096
@@ -59,7 +56,7 @@
 
 #define LP_MAX_TGSI_SHADER_BUFFER_SIZE (1 << 27)
 
-#define LP_MAX_TGSI_SHADER_IMAGES 32
+#define LP_MAX_TGSI_SHADER_IMAGES 64
 
 /*
  * For quick access we cache registers in statically