From: Jordan Justen Date: Fri, 15 Apr 2016 02:43:45 +0000 (-0700) Subject: i965: Add brw_store_register_mem32 X-Git-Tag: upstream/17.1.0~10245 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9f581f8f2407472be262bea8c82acde6ce29f2fb;p=platform%2Fupstream%2Fmesa.git i965: Add brw_store_register_mem32 Signed-off-by: Jordan Justen Reviewed-by: Kenneth Graunke --- diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 948b082..efe7730 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1448,6 +1448,8 @@ void brw_load_register_mem64(struct brw_context *brw, drm_intel_bo *bo, uint32_t read_domains, uint32_t write_domain, uint32_t offset); +void brw_store_register_mem32(struct brw_context *brw, + drm_intel_bo *bo, uint32_t reg, uint32_t offset); void brw_store_register_mem64(struct brw_context *brw, drm_intel_bo *bo, uint32_t reg, uint32_t offset); diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index cd5d301..03a31b6 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -539,6 +539,32 @@ brw_load_register_mem64(struct brw_context *brw, } /* + * Write an arbitrary 32-bit register to a buffer via MI_STORE_REGISTER_MEM. + */ +void +brw_store_register_mem32(struct brw_context *brw, + drm_intel_bo *bo, uint32_t reg, uint32_t offset) +{ + assert(brw->gen >= 6); + + if (brw->gen >= 8) { + BEGIN_BATCH(4); + OUT_BATCH(MI_STORE_REGISTER_MEM | (4 - 2)); + OUT_BATCH(reg); + OUT_RELOC64(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + offset); + ADVANCE_BATCH(); + } else { + BEGIN_BATCH(3); + OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2)); + OUT_BATCH(reg); + OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + offset); + ADVANCE_BATCH(); + } +} + +/* * Write an arbitrary 64-bit register to a buffer via MI_STORE_REGISTER_MEM. */ void