From: Corinna Vinschen <corinna@vinschen.de>
Date: Wed, 6 Oct 2004 08:57:38 +0000 (+0000)
Subject: 	* sh-tdep.c (sh_pseudo_register_read): Add PSEUDO_BANK_REGNUM handling.
X-Git-Tag: gdb_6_3-20041019-branchpoint~158
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9bed62d7af4f64fa3fd1f320d05da3d45bb4ea0a;p=external%2Fbinutils.git

	* sh-tdep.c (sh_pseudo_register_read): Add PSEUDO_BANK_REGNUM handling.
	(sh_pseudo_register_write): Ditto.
---

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index e94e4ae..18148ea 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,10 @@
 2004-10-06  Corinna Vinschen  <vinschen@redhat.com>
 
+	* sh-tdep.c (sh_pseudo_register_read): Add PSEUDO_BANK_REGNUM handling. 
+	(sh_pseudo_register_write): Ditto.
+
+2004-10-06  Corinna Vinschen  <vinschen@redhat.com>
+
 	* sh-tdep.c (IS_MACL_STS): New define.
 	(IS_MOVI20): Ditto.
 	(IS_MACL_LDS): Ditto.
diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c
index 80a6be9..bfed703 100644
--- a/gdb/sh-tdep.c
+++ b/gdb/sh-tdep.c
@@ -1866,6 +1866,9 @@ sh_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
   int base_regnum, portion;
   char temp_buffer[MAX_REGISTER_SIZE];
 
+  if (reg_nr == PSEUDO_BANK_REGNUM)
+    regcache_raw_read (regcache, BANK_REGNUM, buffer);
+  else
   if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
     {
       base_regnum = dr_reg_base_num (reg_nr);
@@ -1902,7 +1905,19 @@ sh_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
   int base_regnum, portion;
   char temp_buffer[MAX_REGISTER_SIZE];
 
-  if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
+  if (reg_nr == PSEUDO_BANK_REGNUM)
+    {
+      /* When the bank register is written to, the whole register bank
+         is switched and all values in the bank registers must be read
+	 from the target/sim again. We're just invalidating the regcache
+	 so that a re-read happens next time it's necessary.  */
+      int bregnum;
+
+      regcache_raw_write (regcache, BANK_REGNUM, buffer);
+      for (bregnum = R0_BANK0_REGNUM; bregnum < MACLB_REGNUM; ++bregnum)
+        set_register_cached (bregnum, 0);
+    }
+  else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
     {
       base_regnum = dr_reg_base_num (reg_nr);