From: changhuang.liang Date: Wed, 19 Oct 2022 03:08:00 +0000 (+0800) Subject: dts: starfive: VIN delete noc bus clock X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9bba1d88b214e738e29aa99983ac1535ded14f60;p=platform%2Fkernel%2Flinux-starfive.git dts: starfive: VIN delete noc bus clock VIN delete noc bus clock. Signed-off-by: changhuang.liang --- diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 99db7b0..fa591d0 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -900,15 +900,14 @@ <&clkisp JH7110_U0_M31DPHY_REFCLK_IN>, <&clkisp JH7110_U0_M31DPHY_TXCLKESC_LAN0>, <&clkgen JH7110_ISP_TOP_CLK_ISPCORE_2X>, - <&clkgen JH7110_ISP_TOP_CLK_ISP_AXI>, - <&clkgen JH7110_NOC_BUS_CLK_ISP_AXI>; + <&clkgen JH7110_ISP_TOP_CLK_ISP_AXI>; clock-names = "clk_apb_func", "clk_pclk", "clk_sys_clk", "clk_wrapper_clk_c", "clk_dvp_inv", "clk_axiwr", "clk_mipi_rx0_pxl", "clk_pixel_clk_if0", "clk_pixel_clk_if1", "clk_pixel_clk_if2", "clk_pixel_clk_if3", "clk_m31dphy_cfgclk_in", "clk_m31dphy_refclk_in", "clk_m31dphy_txclkesc_lan0", - "clk_ispcore_2x", "clk_isp_axi", "clk_noc_bus_clk_isp_axi"; + "clk_ispcore_2x", "clk_isp_axi"; resets = <&rstgen RSTN_U0_ISPV2_TOP_WRAPPER_P>, <&rstgen RSTN_U0_ISPV2_TOP_WRAPPER_C>, <&rstgen RSTN_U0_VIN_N_PCLK>, @@ -1103,7 +1102,7 @@ compatible = "img-gpu"; reg = <0x0 0x18000000 0x0 0x100000>, <0x0 0x130C000 0x0 0x10000>; - clocks = <&clkgen JH7110_GPU_CORE>, + clocks = <&clkgen JH7110_GPU_CORE>, <&clkgen JH7110_GPU_CLK_APB>, <&clkgen JH7110_GPU_RTC_TOGGLE>, <&clkgen JH7110_GPU_CORE_CLK>,