From: Richard Zhu <hongxing.zhu@nxp.com>
Date: Mon, 21 Feb 2022 06:33:56 +0000 (+0800)
Subject: ARM: dts: imx6qp-sabresd: Enable PCIe support
X-Git-Tag: v6.6.17~7940^2~35^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9baabac707a57c035a47b101e7a7af01340058d6;p=platform%2Fkernel%2Flinux-rpi.git

ARM: dts: imx6qp-sabresd: Enable PCIe support

In the i.MX6QP sabresd board(sch-28857) design, one external oscillator
is powered up by vgen3 and used as the PCIe reference clock source by
the endpoint device.

If RC uses this oscillator as reference clock too, PLL6(ENET PLL) would
has to be in bypass mode, and ENET clocks would be messed up.

To keep things simple, let RC use the internal PLL as reference clock
and set vgen3 always on to enable the external oscillator for endpoint
device on i.MX6QP sabresd board.

NOTE: This reference clock setup is used to pass the GEN2 TX compliance
tests, and isn't recommended as a setup in the end-user design.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
---

diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index 480e731..f69eec1 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -50,8 +50,12 @@
 	};
 };
 
+&vgen3_reg {
+	regulator-always-on;
+};
+
 &pcie {
-	status = "disabled";
+	status = "okay";
 };
 
 &sata {