From: Ahmed Bougacha <ahmed.bougacha@gmail.com>
Date: Wed, 27 Apr 2016 01:51:38 +0000 (+0000)
Subject: [X86] Set AddPristinesAndCSRs to FixupBW LivePhysRegs. NFC.
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9a0c9adade7a1d111ebeb4598c03b4c438f06e4d;p=platform%2Fupstream%2Fllvm.git

[X86] Set AddPristinesAndCSRs to FixupBW LivePhysRegs. NFC.

We run after PEI, so we need to AddPristinesAndCSRs.
In practice, that makes no difference here, because we only ask about
liveness of super-registers of defined GR8/GR16 registers, so they
can't be pristine. Still, it's the correct thing to do.

Thanks to Quentin for noticing!

Follow-up to r267495.

llvm-svn: 267658
---

diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
index 5203769..30ce4b6 100644
--- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp
+++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
@@ -244,7 +244,8 @@ void FixupBWInstPass::processBasicBlock(MachineFunction &MF,
   // Start computing liveness for this block. We iterate from the end to be able
   // to update this for each instruction.
   LiveRegs.clear();
-  LiveRegs.addLiveOuts(&MBB);
+  // We run after PEI, so we need to AddPristinesAndCSRs.
+  LiveRegs.addLiveOuts(&MBB, /*AddPristinesAndCSRs=*/true);
 
   for (auto I = MBB.rbegin(); I != MBB.rend(); ++I) {
     MachineInstr *NewMI = nullptr;