From: Caesar Wang <wxt@rock-chips.com>
Date: Fri, 15 Jan 2016 13:49:52 +0000 (+0800)
Subject: ARM: dts: rockchip: enable the high speed on sdio for kylin board
X-Git-Tag: v4.6-rc1~74^2~29^2~24
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=99dc9fdc3105116b46273577e9641d7304b3046e;p=platform%2Fkernel%2Flinux-exynos.git

ARM: dts: rockchip: enable the high speed on sdio for kylin board

We want to the higher speed for wifi module working.

Bootup kernel log:
...
mmc_host mmc0: Bus speed (slot 0) = 37125000Hz (slot req 37500000Hz,
actual 37125000HZ div = 0)

or run 'cat /sys/kernel/debug/clk/clk_summary |grep phase -C 1' to check
Otherwise, the mmc0 will run 400khz defalult value to work.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index c748d2c..905e187 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -299,6 +299,7 @@
 
 	broken-cd;
 	bus-width = <4>;
+	cap-sd-highspeed;
 	cap-sdio-irq;
 	default-sample-phase = <90>;
 	keep-power-in-suspend;
@@ -306,6 +307,10 @@
 	num-slots = <1>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
 };
 
 &uart0 {