From: Jonas Paulsson Date: Fri, 16 Feb 2018 09:51:01 +0000 (+0000) Subject: [ARM] Return true in enableMultipleCopyHints(). X-Git-Tag: llvmorg-7.0.0-rc1~12678 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=995ba6e42ccc5a7c179f1fd9714148eeb8b89cc1;p=platform%2Fupstream%2Fllvm.git [ARM] Return true in enableMultipleCopyHints(). Enable multiple COPY hints to eliminate more COPYs during register allocation. Note that this is something all targets should do, see https://reviews.llvm.org/D38128. Review: Eli Friedman llvm-svn: 325327 --- diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h index 5801e6b..0d1719c 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -154,6 +154,7 @@ public: void updateRegAllocHint(unsigned Reg, unsigned NewReg, MachineFunction &MF) const override; + bool enableMultipleCopyHints() const override { return true; } bool hasBasePointer(const MachineFunction &MF) const; diff --git a/llvm/test/CodeGen/ARM/longMAC.ll b/llvm/test/CodeGen/ARM/longMAC.ll index 9ecda8b..565e265 100644 --- a/llvm/test/CodeGen/ARM/longMAC.ll +++ b/llvm/test/CodeGen/ARM/longMAC.ll @@ -337,20 +337,20 @@ define i64 @MACLongTest14(i32 %a, i32 %b, i64 %c) { @global_b = external global i16, align 2 ;CHECK-LABEL: MACLongTest15 ;CHECK-T2-DSP-NOT: {{asr|lsr}} -;CHECK-T2-DSP: smlaltb r2, r3, r0, r1 +;CHECK-T2-DSP: mov r1, r3 +;CHECK-T2-DSP: smlaltb r2, r1, r0, r3 ;CHECK-T2-DSP-NEXT: mov r0, r2 -;CHECK-T2-DSP-NEXT: mov r1, r3 ;CHECK-V5TE-NOT: {{asr|lsr}} -;CHECK-V5TE: smlaltb r2, r3, r0, r1 +;CHECK-V5TE: mov r1, r3 +;CHECK-V5TE: smlaltb r2, r1, r0, r3 ;CHECK-V5TE-NEXT: mov r0, r2 -;CHECK-V5TE-NEXT: mov r1, r3 ;CHECK-V7-LE-NOT: {{asr|lsr}} -;CHECK-V7-LE: smlaltb r2, r3, r0, r1 +;CHECK-V7-LE: mov r1, r3 +;CHECK-V7-LE: smlaltb r2, r1, r0, r3 ;CHECK-V7-LE-NEXT: mov r0, r2 -;CHECK-V7-LE-NEXT: mov r1, r3 -;CHECK-V7-THUMB-BE: smlaltb r3, r2, r0, r1 +;CHECK-V7-THUMB-BE: mov r1, r3 +;CHECK-V7-THUMB-BE: smlaltb r1, r2, r0, r3 ;CHECK-V7-THUMB-BE-NEXT: mov r0, r2 -;CHECK-V7-THUMB-BE-NEXT: mov r1, r3 ;CHECK-LE-NOT: smlaltb ;CHECK-BE-NOT: smlaltb ;CHECK-V6M-THUMB-NOT: smlaltb @@ -368,19 +368,19 @@ entry: ;CHECK-LABEL: MACLongTest16 ;CHECK-T2-DSP-NOT: {{asr|lsr}} -;CHECK-T2-DSP: smlalbt r2, r3, r1, r0 +;CHECK-T2-DSP: mov r1, r3 +;CHECK-T2-DSP: smlalbt r2, r1, r3, r0 ;CHECK-T2-DSP-NEXT: mov r0, r2 -;CHECK-T2-DSP-NEXT: mov r1, r3 ;CHECK-V5TE-NOT: {{asr|lsr}} -;CHECK-V5TE: smlalbt r2, r3, r1, r0 +;CHECK-V5TE: mov r1, r3 +;CHECK-V5TE: smlalbt r2, r1, r3, r0 ;CHECK-V5TE-NEXT: mov r0, r2 -;CHECK-V5TE-NEXT: mov r1, r3 -;CHECK-V7-LE: smlalbt r2, r3, r1, r0 +;CHECK-V7-LE: mov r1, r3 +;CHECK-V7-LE: smlalbt r2, r1, r3, r0 ;CHECK-V7-LE-NEXT: mov r0, r2 -;CHECK-V7-LE-NEXT: mov r1, r3 -;CHECK-V7-THUMB-BE: smlalbt r3, r2, r1, r0 +;CHECK-V7-THUMB-BE: mov r1, r3 +;CHECK-V7-THUMB-BE: smlalbt r1, r2, r3, r0 ;CHECK-V7-THUMB-BE-NEXT: mov r0, r2 -;CHECK-V7-THUMB-BE-NEXT: mov r1, r3 ;CHECK-LE-NOT: smlalbt ;CHECK-BE-NOT: smlalbt ;CHECK-V6M-THUMB-NOT: smlalbt diff --git a/llvm/test/CodeGen/ARM/select_xform.ll b/llvm/test/CodeGen/ARM/select_xform.ll index 09e8ed4..f19abd4 100644 --- a/llvm/test/CodeGen/ARM/select_xform.ll +++ b/llvm/test/CodeGen/ARM/select_xform.ll @@ -4,13 +4,13 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; ARM-LABEL: t1: -; ARM: suble r1, r1, #-2147483647 ; ARM: mov r0, r1 +; ARM: suble r0, r0, #-2147483647 ; T2-LABEL: t1: -; T2: mvn r0, #-2147483648 -; T2: addle r1, r0 ; T2: mov r0, r1 +; T2: mvn r1, #-2147483648 +; T2: addle r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 %tmp3 = add i32 %tmp2, %b @@ -19,12 +19,12 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { ; ARM-LABEL: t2: -; ARM: suble r1, r1, #10 ; ARM: mov r0, r1 +; ARM: suble r0, r0, #10 ; T2-LABEL: t2: -; T2: suble r1, #10 ; T2: mov r0, r1 +; T2: suble r0, #10 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 10 %tmp3 = sub i32 %b, %tmp2 diff --git a/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll b/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll index fc4f11e..de53d91 100644 --- a/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll +++ b/llvm/test/CodeGen/ARM/struct_byval_arm_t1_t2.ll @@ -122,17 +122,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_A_8: ;T1POST-LABEL: test_A_8: define void @test_A_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.A, align 8 call void @use_A(%struct.A* byval align 8 %a) @@ -144,19 +144,19 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_A_16: ;T1POST-LABEL: test_A_16: define void @test_A_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.A, align 16 call void @use_A(%struct.A* byval align 16 %a) @@ -239,21 +239,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_B_8: ;T1POST-LABEL: test_B_8: define void @test_B_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.B, align 8 call void @use_B(%struct.B* byval align 8 %a) @@ -265,21 +265,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_B_16: ;T1POST-LABEL: test_B_16: define void @test_B_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.B, align 16 call void @use_B(%struct.B* byval align 16 %a) @@ -363,22 +363,22 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_C_8: ;T1POST-LABEL: test_C_8: define void @test_C_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #1 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.C, align 8 call void @use_C(%struct.C* byval align 8 %a) @@ -390,22 +390,22 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_C_16: ;T1POST-LABEL: test_C_16: define void @test_C_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #1 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.C, align 16 call void @use_C(%struct.C* byval align 16 %a) @@ -492,21 +492,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_D_8: ;T1POST-LABEL: test_D_8: define void @test_D_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.D, align 8 call void @use_D(%struct.D* byval align 8 %a) @@ -518,21 +518,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_D_16: ;T1POST-LABEL: test_D_16: define void @test_D_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.D, align 16 call void @use_D(%struct.D* byval align 16 %a) @@ -627,25 +627,25 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_E_8: ;T1POST-LABEL: test_E_8: define void @test_E_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.E, align 8 call void @use_E(%struct.E* byval align 8 %a) @@ -657,25 +657,25 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_E_16: ;T1POST-LABEL: test_E_16: define void @test_E_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.E, align 16 call void @use_E(%struct.E* byval align 16 %a) @@ -771,18 +771,18 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_F_8: ;T1POST-LABEL: test_F_8: define void @test_F_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 @@ -790,7 +790,7 @@ declare void @use_N(%struct.N* byval) ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #1 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.F, align 8 call void @use_F(%struct.F* byval align 8 %a) @@ -802,18 +802,18 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_F_16: ;T1POST-LABEL: test_F_16: define void @test_F_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 @@ -821,7 +821,7 @@ declare void @use_N(%struct.N* byval) ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #1 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.F, align 16 call void @use_F(%struct.F* byval align 16 %a) @@ -896,17 +896,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_G_8: ;T1POST-LABEL: test_G_8: define void @test_G_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.G, align 8 call void @use_G(%struct.G* byval align 8 %a) @@ -918,17 +918,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_G_16: ;T1POST-LABEL: test_G_16: define void @test_G_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.G, align 16 call void @use_G(%struct.G* byval align 16 %a) @@ -1003,17 +1003,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_H_8: ;T1POST-LABEL: test_H_8: define void @test_H_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.H, align 8 call void @use_H(%struct.H* byval align 8 %a) @@ -1025,17 +1025,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_H_16: ;T1POST-LABEL: test_H_16: define void @test_H_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.H, align 16 call void @use_H(%struct.H* byval align 16 %a) @@ -1110,17 +1110,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_I_8: ;T1POST-LABEL: test_I_8: define void @test_I_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.I, align 8 call void @use_I(%struct.I* byval align 8 %a) @@ -1132,17 +1132,17 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_I_16: ;T1POST-LABEL: test_I_16: define void @test_I_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.I, align 16 call void @use_I(%struct.I* byval align 16 %a) @@ -1229,21 +1229,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_J_8: ;T1POST-LABEL: test_J_8: define void @test_J_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.J, align 8 call void @use_J(%struct.J* byval align 8 %a) @@ -1255,21 +1255,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_J_16: ;T1POST-LABEL: test_J_16: define void @test_J_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.J, align 16 call void @use_J(%struct.J* byval align 16 %a) @@ -1356,21 +1356,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_K_8: ;T1POST-LABEL: test_K_8: define void @test_K_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.K, align 8 call void @use_K(%struct.K* byval align 8 %a) @@ -1382,21 +1382,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_K_16: ;T1POST-LABEL: test_K_16: define void @test_K_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.K, align 16 call void @use_K(%struct.K* byval align 16 %a) @@ -1483,21 +1483,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_L_8: ;T1POST-LABEL: test_L_8: define void @test_L_8() { -;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.L, align 8 call void @use_L(%struct.L* byval align 8 %a) @@ -1509,21 +1509,21 @@ declare void @use_N(%struct.N* byval) ;THUMB1-LABEL: test_L_16: ;T1POST-LABEL: test_L_16: define void @test_L_16() { -;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;ARM: bne -;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB2: bne ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: bne -;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: adds [[BASE]], #4 ;THUMB1: bne -;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! +;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [{{.*}}]! entry: %a = alloca %struct.L, align 16 call void @use_L(%struct.L* byval align 16 %a) diff --git a/llvm/test/CodeGen/ARM/swifterror.ll b/llvm/test/CodeGen/ARM/swifterror.ll index 220c4ad..8d1729d 100644 --- a/llvm/test/CodeGen/ARM/swifterror.ll +++ b/llvm/test/CodeGen/ARM/swifterror.ll @@ -39,11 +39,11 @@ define float @caller(i8* %error_ref) { ; CHECK-APPLE-DAG: mov [[ID:r[0-9]+]], r0 ; CHECK-APPLE-DAG: mov r8, #0 ; CHECK-APPLE: bl {{.*}}foo +; CHECK-APPLE: mov r0, r8 ; CHECK-APPLE: cmp r8, #0 ; Access part of the error object and save it to error_ref -; CHECK-APPLE: ldrbeq [[CODE:r[0-9]+]], [r8, #8] +; CHECK-APPLE: ldrbeq [[CODE:r[0-9]+]], [r0, #8] ; CHECK-APPLE: strbeq [[CODE]], [{{.*}}[[ID]]] -; CHECK-APPLE: mov r0, r8 ; CHECK-APPLE: bl {{.*}}free ; CHECK-O0-LABEL: caller: @@ -138,7 +138,7 @@ define float @foo_if(%swift_error** swifterror %error_ptr_ref, i32 %cc) { ; CHECK-APPLE: eq ; CHECK-APPLE: mov r0, #16 ; CHECK-APPLE: malloc -; CHECK-APPLE: mov [[ID:r[0-9]+]], #1 +; CHECK-APPLE-DAG: mov [[ID:r[0-9]+]], #1 ; CHECK-APPLE-DAG: mov r8, r{{.*}} ; CHECK-APPLE-DAG: strb [[ID]], [r{{.*}}, #8] @@ -177,14 +177,12 @@ define float @foo_loop(%swift_error** swifterror %error_ptr_ref, i32 %cc, float ; CHECK-APPLE-LABEL: foo_loop: ; CHECK-APPLE: mov [[CODE:r[0-9]+]], r0 ; swifterror is kept in a register -; CHECK-APPLE: mov [[ID:r[0-9]+]], r8 ; CHECK-APPLE: cmp [[CODE]], #0 ; CHECK-APPLE: beq ; CHECK-APPLE: mov r0, #16 ; CHECK-APPLE: malloc ; CHECK-APPLE: strb r{{.*}}, [r0, #8] ; CHECK-APPLE: ble -; CHECK-APPLE: mov r8, [[ID]] ; CHECK-O0-LABEL: foo_loop: ; CHECK-O0: mov r{{.*}}, r8 @@ -266,11 +264,11 @@ define float @caller3(i8* %error_ref) { ; CHECK-APPLE: mov [[ID:r[0-9]+]], r0 ; CHECK-APPLE: mov r8, #0 ; CHECK-APPLE: bl {{.*}}foo_sret +; CHECK-APPLE: mov r0, r8 ; CHECK-APPLE: cmp r8, #0 ; Access part of the error object and save it to error_ref -; CHECK-APPLE: ldrbeq [[CODE:r[0-9]+]], [r8, #8] +; CHECK-APPLE: ldrbeq [[CODE:r[0-9]+]], [r0, #8] ; CHECK-APPLE: strbeq [[CODE]], [{{.*}}[[ID]]] -; CHECK-APPLE: mov r0, r8 ; CHECK-APPLE: bl {{.*}}free ; CHECK-O0-LABEL: caller3: @@ -314,10 +312,9 @@ define float @foo_vararg(%swift_error** swifterror %error_ptr_ref, ...) { ; CHECK-APPLE-LABEL: foo_vararg: ; CHECK-APPLE: mov r0, #16 ; CHECK-APPLE: malloc -; CHECK-APPLE: mov [[REG:r[0-9]+]], r0 +; CHECK-APPLE: mov r8, r0 ; CHECK-APPLE: mov [[ID:r[0-9]+]], #1 -; CHECK-APPLE-DAG: strb [[ID]], [{{.*}}[[REG]], #8] -; CHECK-APPLE-DAG: mov r8, [[REG]] +; CHECK-APPLE-DAG: strb [[ID]], [r8, #8] entry: %call = call i8* @malloc(i64 16) @@ -348,11 +345,11 @@ define float @caller4(i8* %error_ref) { ; CHECK-APPLE: mov [[ID:r[0-9]+]], r0 ; CHECK-APPLE: mov r8, #0 ; CHECK-APPLE: bl {{.*}}foo_vararg +; CHECK-APPLE: mov r0, r8 ; CHECK-APPLE: cmp r8, #0 ; Access part of the error object and save it to error_ref -; CHECK-APPLE: ldrbeq [[CODE:r[0-9]+]], [r8, #8] +; CHECK-APPLE: ldrbeq [[CODE:r[0-9]+]], [r0, #8] ; CHECK-APPLE: strbeq [[CODE]], [{{.*}}[[ID]]] -; CHECK-APPLE: mov r0, r8 ; CHECK-APPLE: bl {{.*}}free entry: %error_ptr_ref = alloca swifterror %swift_error* diff --git a/llvm/test/CodeGen/Thumb/long.ll b/llvm/test/CodeGen/Thumb/long.ll index 7fc46ff..fbf4b08 100644 --- a/llvm/test/CodeGen/Thumb/long.ll +++ b/llvm/test/CodeGen/Thumb/long.ll @@ -60,10 +60,10 @@ entry: %tmp1 = add i64 %y, 10 ret i64 %tmp1 ; CHECK-LABEL: f6a: +; CHECK: movs r0, r2 ; CHECK: movs r1, #0 -; CHECK: adds r2, #10 +; CHECK: adds r0, #10 ; CHECK: adcs r1, r3 -; CHECK: movs r0, r2 } define i64 @f6b(i64 %x, i64 %y) { @@ -102,11 +102,11 @@ entry: %tmp1 = sub i64 %y, 10 ret i64 %tmp1 ; CHECK-LABEL: f9a: -; CHECK: movs r0, #0 -; CHECK: subs r2, #10 -; CHECK: sbcs r3, r0 -; CHECK: movs r0, r2 ; CHECK: movs r1, r3 +; CHECK: movs r0, r2 +; CHECK: movs r2, #0 +; CHECK: subs r0, #10 +; CHECK: sbcs r1, r2 } define i64 @f9b(i64 %x, i64 %y) { ; ADDC with big negative imm => SUBS reg @@ -187,14 +187,14 @@ entry: %tmp2 = add i64 %tmp1, -1000 ret i64 %tmp2 ; CHECK-LABEL: f11: +; CHECK: movs r1, r3 ; CHECK: movs r0, #125 ; CHECK: lsls r0, r0, #3 -; CHECK: movs r1, #0 +; CHECK: movs r3, #0 ; CHECK: subs r2, r2, r0 -; CHECK: sbcs r3, r1 +; CHECK: sbcs r1, r3 ; CHECK: subs r0, r2, r0 -; CHECK: sbcs r3, r1 -; CHECK: movs r1, r3 +; CHECK: sbcs r1, r3 } ; "sub 2147483648" has to be lowered into "add -2147483648" diff --git a/llvm/test/CodeGen/Thumb2/aapcs.ll b/llvm/test/CodeGen/Thumb2/aapcs.ll index 299562f..179c35c 100644 --- a/llvm/test/CodeGen/Thumb2/aapcs.ll +++ b/llvm/test/CodeGen/Thumb2/aapcs.ll @@ -14,8 +14,8 @@ entry: define double @double_in_reg(double %a, double %b) { entry: ; CHECK-LABEL: double_in_reg: -; SOFT: mov r0, r2 ; SOFT: mov r1, r3 +; SOFT: mov r0, r2 ; SP: vmov.f32 s0, s2 ; SP: vmov.f32 s1, s3 ; DP: vmov.f64 d0, d1 diff --git a/llvm/test/CodeGen/Thumb2/thumb2-select_xform.ll b/llvm/test/CodeGen/Thumb2/thumb2-select_xform.ll index 20f0e5e..b667b53 100644 --- a/llvm/test/CodeGen/Thumb2/thumb2-select_xform.ll +++ b/llvm/test/CodeGen/Thumb2/thumb2-select_xform.ll @@ -2,11 +2,11 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t1 -; CHECK: mvn r0, #-2147483648 +; CHECK: mov r0, r1 +; CHECK: mvn r1, #-2147483648 ; CHECK: cmp r2, #10 ; CHECK: it le -; CHECK: addle r1, r0 -; CHECK: mov r0, r1 +; CHECK: addle r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 %tmp3 = add i32 %tmp2, %b @@ -15,10 +15,10 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t2 +; CHECK: mov r0, r1 ; CHECK: cmp r2, #10 ; CHECK: it le -; CHECK: addle.w r1, r1, #-2147483648 -; CHECK: mov r0, r1 +; CHECK: addle.w r0, r0, #-2147483648 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483648 @@ -28,10 +28,10 @@ define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind { define i32 @t3(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { ; CHECK: t3 +; CHECK: mov r0, r1 ; CHECK: cmp r2, #10 ; CHECK: it le -; CHECK: suble r1, #10 -; CHECK: mov r0, r1 +; CHECK: suble r0, #10 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 10 %tmp3 = sub i32 %b, %tmp2