From: Richard Henderson Date: Mon, 2 Aug 1999 19:37:58 +0000 (-0700) Subject: alpha.c (override_options): Move ev6 alpha_tp frobbing out of -mcpu parsing code. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=981a828ea13437f11a9b4e0dd0fce40d5fe04e99;p=platform%2Fupstream%2Fgcc.git alpha.c (override_options): Move ev6 alpha_tp frobbing out of -mcpu parsing code. * alpha.c (override_options): Move ev6 alpha_tp frobbing out of -mcpu parsing code. (print_operand): Notice alpha_fptm not alpha_tp for sw completion. * alpha.md (all fp insns): Likewise. From-SVN: r28404 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e828757..cb738f0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +1999-08-02 Richard Henderson + + * alpha.c (override_options): Move ev6 alpha_tp frobbing out of + -mcpu parsing code. + (print_operand): Notice alpha_fptm not alpha_tp for sw completion. + * alpha.md (all fp insns): Likewise. + 1999-08-02 Nick Clifton * config/v850/v850.h (STRICT_ALIGNMENT): Only define if not diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 9f07b21..3402713 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -231,11 +231,6 @@ override_options () alpha_cpu = PROCESSOR_EV6; target_flags |= MASK_BWX | MASK_MAX | MASK_FIX; target_flags &= ~ (MASK_CIX); - - /* Except for EV6 pass 1 (not released), we always have - precise arithmetic traps. Which means we can do - software completion without minding trap shadows. */ - alpha_tp = ALPHA_TP_PROG; } else error ("bad value `%s' for -mcpu switch", alpha_cpu_string); @@ -250,6 +245,14 @@ override_options () alpha_tp = ALPHA_TP_INSN; } + if (alpha_cpu == PROCESSOR_EV6) + { + /* Except for EV6 pass 1 (not released), we always have precise + arithmetic traps. Which means we can do software completion + without minding trap shadows. */ + alpha_tp = ALPHA_TP_PROG; + } + if (TARGET_FLOAT_VAX) { if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN) @@ -2682,7 +2685,7 @@ print_operand (file, x, code) case '\'': /* Generates trap-mode suffix for instructions that accept the su suffix only (cmpt et al). */ - if (alpha_tp == ALPHA_TP_INSN) + if (alpha_fptm >= ALPHA_FPTM_SU) fputs ("su", file); break; diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 9740d69..4cb2b5b 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -1836,7 +1836,7 @@ [(set (match_operand:SF 0 "register_operand" "=&f") (plus:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG") (match_operand:SF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "add%,%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1854,7 +1854,7 @@ [(set (match_operand:DF 0 "register_operand" "=&f") (plus:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG") (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "add%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1873,7 +1873,7 @@ (plus:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "add%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1884,7 +1884,7 @@ (match_operand:SF 1 "reg_or_fp0_operand" "%fG")) (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "add%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1933,7 +1933,7 @@ (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")) 0)) (clobber (match_scratch:DI 2 "=&f")) (clobber (match_scratch:SI 3 "=&f"))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "#" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1942,7 +1942,7 @@ [(set (match_operand:SI 0 "memory_operand" "=m") (subreg:SI (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")) 0)) (clobber (match_scratch:DI 2 "=f"))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "#" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1950,7 +1950,7 @@ (define_insn "" [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") (fix:DI (match_operand:DF 1 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-q%(c %R1,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -1995,7 +1995,7 @@ (match_operand:SF 1 "reg_or_fp0_operand" "fG"))) 0)) (clobber (match_scratch:DI 2 "=&f")) (clobber (match_scratch:SI 3 "=&f"))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "#" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2005,7 +2005,7 @@ (subreg:SI (fix:DI (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))) 0)) (clobber (match_scratch:DI 2 "=f"))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "#" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2014,7 +2014,7 @@ [(set (match_operand:DI 0 "reg_no_subreg_operand" "=&f") (fix:DI (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-q%(c %R1,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2031,7 +2031,7 @@ (define_insn "" [(set (match_operand:SF 0 "register_operand" "=&f") (float:SF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvtq%,%+%& %1,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2047,7 +2047,7 @@ (define_insn "" [(set (match_operand:DF 0 "register_operand" "=&f") (float:DF (match_operand:DI 1 "reg_no_subreg_operand" "f")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvtq%-%+%& %1,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2066,7 +2066,7 @@ "TARGET_FP" " { - if (alpha_tp == ALPHA_TP_INSN) + if (alpha_fptm >= ALPHA_FPTM_SU) emit_insn (gen_extendsfdf2_tp (operands[0], force_reg (SFmode, operands[1]))); else @@ -2078,7 +2078,7 @@ (define_insn "extendsfdf2_tp" [(set (match_operand:DF 0 "register_operand" "=&f") (float_extend:DF (match_operand:SF 1 "register_operand" "f")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvtsts %1,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2086,7 +2086,7 @@ (define_insn "extendsfdf2_no_tp" [(set (match_operand:DF 0 "register_operand" "=f,f,m") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m,f")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "@ fmov %1,%0 ld%, %0,%1 @@ -2097,7 +2097,7 @@ (define_insn "" [(set (match_operand:SF 0 "register_operand" "=&f") (float_truncate:SF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cvt%-%,%)%& %R1,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2114,7 +2114,7 @@ [(set (match_operand:SF 0 "register_operand" "=&f") (div:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG") (match_operand:SF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "div%,%)%& %R1,%R2,%0" [(set_attr "type" "fdiv") (set_attr "opsize" "si") @@ -2134,7 +2134,7 @@ [(set (match_operand:DF 0 "register_operand" "=&f") (div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "div%-%)%& %R1,%R2,%0" [(set_attr "type" "fdiv") (set_attr "trap" "yes")]) @@ -2152,7 +2152,7 @@ [(set (match_operand:DF 0 "register_operand" "=f") (div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "div%-%)%& %R1,%R2,%0" [(set_attr "type" "fdiv") (set_attr "trap" "yes")]) @@ -2162,7 +2162,7 @@ (div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "div%-%)%& %R1,%R2,%0" [(set_attr "type" "fdiv") (set_attr "trap" "yes")]) @@ -2171,7 +2171,7 @@ [(set (match_operand:DF 0 "register_operand" "=f") (div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "div%-%)%& %R1,%R2,%0" [(set_attr "type" "fdiv") (set_attr "trap" "yes")]) @@ -2180,7 +2180,7 @@ [(set (match_operand:SF 0 "register_operand" "=&f") (mult:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG") (match_operand:SF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "mul%,%)%& %R1,%R2,%0" [(set_attr "type" "fmul") (set_attr "trap" "yes")]) @@ -2198,7 +2198,7 @@ [(set (match_operand:DF 0 "register_operand" "=&f") (mult:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG") (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "mul%-%)%& %R1,%R2,%0" [(set_attr "type" "fmul") (set_attr "trap" "yes")]) @@ -2217,7 +2217,7 @@ (mult:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "mul%-%)%& %R1,%R2,%0" [(set_attr "type" "fmul") (set_attr "trap" "yes")]) @@ -2228,7 +2228,7 @@ (match_operand:SF 1 "reg_or_fp0_operand" "%fG")) (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "mul%-%)%& %R1,%R2,%0" [(set_attr "type" "fmul") (set_attr "trap" "yes")]) @@ -2237,7 +2237,7 @@ [(set (match_operand:SF 0 "register_operand" "=&f") (minus:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG") (match_operand:SF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "sub%,%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2255,7 +2255,7 @@ [(set (match_operand:DF 0 "register_operand" "=&f") (minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "sub%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2274,7 +2274,7 @@ (minus:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (match_operand:DF 2 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "sub%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2284,7 +2284,7 @@ (minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG") (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "sub%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2295,7 +2295,7 @@ (match_operand:SF 1 "reg_or_fp0_operand" "fG")) (float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "sub%-%)%& %R1,%R2,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2303,7 +2303,7 @@ (define_insn "" [(set (match_operand:SF 0 "register_operand" "=&f") (sqrt:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && TARGET_FIX && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && TARGET_FIX && alpha_fptm >= ALPHA_FPTM_SU" "sqrt%,%)%& %R1,%0" [(set_attr "type" "fsqrt") (set_attr "opsize" "si") @@ -2321,7 +2321,7 @@ (define_insn "" [(set (match_operand:DF 0 "register_operand" "=&f") (sqrt:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))] - "TARGET_FP && TARGET_FIX && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && TARGET_FIX && alpha_fptm >= ALPHA_FPTM_SU" "sqrt%-%)%& %R1,%0" [(set_attr "type" "fsqrt") (set_attr "trap" "yes")]) @@ -2749,7 +2749,7 @@ (match_operator:DF 1 "alpha_comparison_operator" [(match_operand:DF 2 "reg_or_fp0_operand" "fG") (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2759,7 +2759,7 @@ (match_operator:DF 1 "alpha_comparison_operator" [(match_operand:DF 2 "reg_or_fp0_operand" "fG") (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2770,7 +2770,7 @@ [(float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG")) (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2781,7 +2781,7 @@ [(float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG")) (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2792,7 +2792,7 @@ [(match_operand:DF 2 "reg_or_fp0_operand" "fG") (float_extend:DF (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2803,7 +2803,7 @@ [(match_operand:DF 2 "reg_or_fp0_operand" "fG") (float_extend:DF (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2815,7 +2815,7 @@ (match_operand:SF 2 "reg_or_fp0_operand" "fG")) (float_extend:DF (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] - "TARGET_FP && alpha_tp == ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm >= ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")]) @@ -2827,7 +2827,7 @@ (match_operand:SF 2 "reg_or_fp0_operand" "fG")) (float_extend:DF (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))] - "TARGET_FP && alpha_tp != ALPHA_TP_INSN" + "TARGET_FP && alpha_fptm < ALPHA_FPTM_SU" "cmp%-%C1%' %R2,%R3,%0" [(set_attr "type" "fadd") (set_attr "trap" "yes")])