From: Edgar E. Iglesias Date: Mon, 26 Oct 2015 13:01:59 +0000 (+0100) Subject: target-arm: lpae: Rename granule_sz to stride X-Git-Tag: TizenStudio_2.0_p2.3.2~120^2~1^2~107^2~8 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=973a5434825c076995218868b5b3047e5de400c6;p=sdk%2Femulator%2Fqemu.git target-arm: lpae: Rename granule_sz to stride Rename granule_sz to stride to better match the reference manuals. No functional change. Reviewed-by: Peter Maydell Signed-off-by: Edgar E. Iglesias Message-id: 1445864527-14520-7-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell --- diff --git a/target-arm/helper.c b/target-arm/helper.c index 982d830..2af126f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6488,7 +6488,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, uint32_t tableattrs; target_ulong page_size; uint32_t attrs; - int32_t granule_sz = 9; + int32_t stride = 9; int32_t va_size = 32; int inputsize; int32_t tbi = 0; @@ -6597,10 +6597,10 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, tg = extract32(tcr->raw_tcr, 14, 2); if (tg == 1) { /* 64KB pages */ - granule_sz = 13; + stride = 13; } if (tg == 2) { /* 16KB pages */ - granule_sz = 11; + stride = 11; } } else { /* We should only be here if TTBR1 is valid */ @@ -6612,15 +6612,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, tg = extract32(tcr->raw_tcr, 30, 2); if (tg == 3) { /* 64KB pages */ - granule_sz = 13; + stride = 13; } if (tg == 1) { /* 16KB pages */ - granule_sz = 11; + stride = 11; } } /* Here we should have set up all the parameters for the translation: - * va_size, inputsize, ttbr, epd, granule_sz, tbi + * va_size, inputsize, ttbr, epd, stride, tbi */ if (epd) { @@ -6632,16 +6632,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, /* The starting level depends on the virtual address size (which can be * up to 48 bits) and the translation granule size. It indicates the number - * of strides (granule_sz bits at a time) needed to consume the bits + * of strides (stride bits at a time) needed to consume the bits * of the input address. In the pseudocode this is: * level = 4 - RoundUp((inputsize - grainsize) / stride) * where their 'inputsize' is our 'inputsize', 'grainsize' is - * our 'granule_sz + 3' and 'stride' is our 'granule_sz'. + * our 'stride + 3' and 'stride' is our 'stride'. * Applying the usual "rounded up m/n is (m+n-1)/n" and simplifying: - * = 4 - (inputsize - granule_sz - 3 + granule_sz - 1) / granule_sz - * = 4 - (inputsize - 4) / granule_sz; + * = 4 - (inputsize - stride - 3 + stride - 1) / stride + * = 4 - (inputsize - 4) / stride; */ - level = 4 - (inputsize - 4) / granule_sz; + level = 4 - (inputsize - 4) / stride; /* Clear the vaddr bits which aren't part of the within-region address, * so that we don't have to special case things when calculating the @@ -6651,11 +6651,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, address &= (1ULL << inputsize) - 1; } - descmask = (1ULL << (granule_sz + 3)) - 1; + descmask = (1ULL << (stride + 3)) - 1; /* Now we can extract the actual base address from the TTBR */ descaddr = extract64(ttbr, 0, 48); - descaddr &= ~((1ULL << (inputsize - (granule_sz * (4 - level)))) - 1); + descaddr &= ~((1ULL << (inputsize - (stride * (4 - level)))) - 1); /* Secure accesses start with the page table in secure memory and * can be downgraded to non-secure at any step. Non-secure accesses @@ -6667,7 +6667,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, uint64_t descriptor; bool nstable; - descaddr |= (address >> (granule_sz * (4 - level))) & descmask; + descaddr |= (address >> (stride * (4 - level))) & descmask; descaddr &= ~7ULL; nstable = extract32(tableattrs, 4, 1); descriptor = arm_ldq_ptw(cs, descaddr, !nstable); @@ -6692,7 +6692,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * These are basically the same thing, although the number * of bits we pull in from the vaddr varies. */ - page_size = (1ULL << ((granule_sz * (4 - level)) + 3)); + page_size = (1ULL << ((stride * (4 - level)) + 3)); descaddr |= (address & (page_size - 1)); /* Extract attributes from the descriptor and merge with table attrs */ attrs = extract64(descriptor, 2, 10)