From: Sarthak Garg Date: Fri, 22 May 2020 09:32:24 +0000 (+0530) Subject: dt-bindings: mmc: Add information for DLL register properties X-Git-Tag: v5.10.7~2504^2~33 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=97306b631d838667204bd6eaa59e72df1aabbd68;p=platform%2Fkernel%2Flinux-rpi.git dt-bindings: mmc: Add information for DLL register properties Add information regarding DLL register properties for getting board specific configurations. These DLL register settings may vary from board to board. Signed-off-by: Sarthak Garg Link: https://lore.kernel.org/r/1590139950-7288-3-git-send-email-sartgarg@codeaurora.org Signed-off-by: Ulf Hansson --- diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 481f692f..b8e1d2b 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -47,6 +47,13 @@ Required properties: "cal" - reference clock for RCLK delay calibration (optional) "sleep" - sleep clock for RCLK delay calibration (optional) +- qcom,ddr-config: Certain chipsets and platforms require particular settings + for the DDR_CONFIG register. Use this field to specify the register + value as per the Hardware Programming Guide. + +- qcom,dll-config: Chipset and Platform specific value. Use this field to + specify the DLL_CONFIG register value as per Hardware Programming Guide. + Example: sdhc_1: sdhci@f9824900 { @@ -64,6 +71,9 @@ Example: clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>; clock-names = "core", "iface"; + + qcom,dll-config = <0x000f642c>; + qcom,ddr-config = <0x80040868>; }; sdhc_2: sdhci@f98a4900 { @@ -81,4 +91,7 @@ Example: clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; clock-names = "core", "iface"; + + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; };