From: Amit Cohen <amitc@mellanox.com>
Date: Tue, 14 Jul 2020 14:20:55 +0000 (+0300)
Subject: mlxsw: reg: add mirroring_pid_base to MOGCR register
X-Git-Tag: v5.10.7~1943^2~254^2~11
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=95c68833fa1db2a05496f8c2bc0171a14210b047;p=platform%2Fkernel%2Flinux-rpi.git

mlxsw: reg: add mirroring_pid_base to MOGCR register

Allow setting mirroring_pid_base using MOGCR register.

Signed-off-by: Amit Cohen <amitc@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index e460d9d..6af44ae 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -9521,6 +9521,14 @@ MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1);
  */
 MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1);
 
+/* reg_mogcr_mirroring_pid_base
+ * Base policer id for mirroring policers.
+ * Must have an even value (e.g. 1000, not 1001).
+ * Reserved when SwitchX/-2, Switch-IB/2, Spectrum-1 and Quantum.
+ * Access: RW
+ */
+MLXSW_ITEM32(reg, mogcr, mirroring_pid_base, 0x0C, 0, 14);
+
 /* MPAGR - Monitoring Port Analyzer Global Register
  * ------------------------------------------------
  * This register is used for global port analyzer configurations.