From: Stefan Roese Date: Tue, 21 Aug 2007 14:33:33 +0000 (+0200) Subject: Merge with /home/stefan/git/u-boot/u-boot-ppc4xx X-Git-Tag: v2008.10-rc1~874^2~40 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=93f798346033a1f6d22090b47abad4be88243b04;hp=-c;p=platform%2Fkernel%2Fu-boot.git Merge with /home/stefan/git/u-boot/u-boot-ppc4xx --- 93f798346033a1f6d22090b47abad4be88243b04 diff --combined include/asm-ppc/global_data.h index a35013d,1f1583a..4676e2c --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@@ -71,20 -71,24 +71,24 @@@ typedef struct global_data u32 lclk_clk; u32 ddr_clk; u32 pci_clk; + #if defined(CONFIG_MPC8360) + u32 ddr_sec_clk; + #endif /* CONFIG_MPC8360 */ + #endif #if defined(CONFIG_QE) u32 qe_clk; u32 brg_clk; uint mp_alloc_base; uint mp_alloc_top; #endif /* CONFIG_QE */ - #if defined (CONFIG_MPC8360) - u32 ddr_sec_clk; - #endif /* CONFIG_MPC8360 */ - #endif #if defined(CONFIG_MPC5xxx) unsigned long ipb_clk; unsigned long pci_clk; #endif + #if defined(CONFIG_MPC512X) + u32 ipb_clk; + u32 csb_clk; + #endif /* CONFIG_MPC512X */ #if defined(CONFIG_MPC8220) unsigned long bExtUart; unsigned long inp_clk; @@@ -129,7 -133,7 +133,7 @@@ unsigned long do_mdm_init; unsigned long be_quiet; #endif -#ifdef CONFIG_LWMON +#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) unsigned long kbd_status; #endif void **jt; /* jump table */ diff --combined include/configs/lwmon5.h index 14a200d,7116c49..cf8ff45 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@@ -34,9 -34,7 +34,8 @@@ #define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ - #define CONFIG_ADD_RAM_INFO 1 /* Print additional info */ /*----------------------------------------------------------------------- * Base addresses -- Note these are effective addresses where the @@@ -138,10 -136,25 +137,25 @@@ #define CONFIG_DDR_DATA_EYE 1 /* use DDR2 optimization */ #if 0 /* test-only: disable ECC for now */ #define CONFIG_DDR_ECC 1 /* enable ECC */ + #define CFG_POST_ECC_ON CFG_POST_ECC + #else + #define CFG_POST_ECC_ON 0 + #endif /* POST support */ - #define CONFIG_POST (CFG_POST_ECC) - #endif + #define CONFIG_POST (CFG_POST_MEMORY | \ + CFG_POST_ECC_ON | \ + CFG_POST_CPU | \ + CFG_POST_UART | \ + CFG_POST_I2C | \ + CFG_POST_CACHE | \ + CFG_POST_FPU | \ + CFG_POST_ETHER | \ + CFG_POST_SPR) + + #define CFG_POST_CACHE_ADDR 0x10000000 /* free virtual address */ + #define CONFIG_LOGBUFFER + #define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ /*----------------------------------------------------------------------- * I2C @@@ -160,16 -173,10 +174,16 @@@ #define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */ #define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */ +#define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */ -#define CONFIG_PREBOOT "echo;" \ - "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ - "echo" +#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */ +#if 0 +#define CONFIG_AUTOBOOT_KEYED /* Enable "password" protection */ +#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n" +#define CONFIG_AUTOBOOT_DELAY_STR " " /* "password" */ +#endif + +#define CONFIG_PREBOOT "setenv bootdelay 15" #undef CONFIG_BOOTARGS @@@ -177,6 -184,7 +191,7 @@@ "hostname=lwmon5\0" \ "netdev=eth0\0" \ "unlock=yes\0" \ + "logversion=2\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ @@@ -217,7 -225,6 +232,7 @@@ #define CONFIG_PHY_ADDR 3 /* PHY address, See schematics */ #define CONFIG_PHY_RESET 1 /* reset phy upon startup */ +#define CONFIG_PHY_RESET_DELAY 300 #define CONFIG_HAS_ETH0 #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ @@@ -234,9 -241,6 +249,6 @@@ /* Comment this out to enable USB 1.1 device */ #define USB_2_0_DEVICE - #define CMD_USB CFG_CMD_USB - #else - #define CMD_USB 0 /* no USB on 440GRx */ #endif /* CONFIG_440EPX */ /* Partitions */ @@@ -244,36 -248,49 +256,49 @@@ #define CONFIG_DOS_PARTITION #define CONFIG_ISO_PARTITION - #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_DATE | \ - CFG_CMD_DHCP | \ - CFG_CMD_DIAG | \ - CFG_CMD_EEPROM | \ - CFG_CMD_ELF | \ - CFG_CMD_FAT | \ - CFG_CMD_I2C | \ - CFG_CMD_IRQ | \ - CFG_CMD_MII | \ - CFG_CMD_NET | \ - CFG_CMD_NFS | \ - CFG_CMD_PCI | \ - CFG_CMD_PING | \ - CFG_CMD_REGINFO | \ - CFG_CMD_SDRAM | \ - CMD_USB) + /* + * BOOTP options + */ + #define CONFIG_BOOTP_BOOTFILESIZE + #define CONFIG_BOOTP_BOOTPATH + #define CONFIG_BOOTP_GATEWAY + #define CONFIG_BOOTP_HOSTNAME - #define CONFIG_SUPPORT_VFAT + /* + * Command line configuration. + */ + #include + + #define CONFIG_CMD_ASKENV + #define CONFIG_CMD_DATE + #define CONFIG_CMD_DHCP + #define CONFIG_CMD_DIAG + #define CONFIG_CMD_EEPROM + #define CONFIG_CMD_ELF + #define CONFIG_CMD_FAT + #define CONFIG_CMD_I2C + #define CONFIG_CMD_IRQ + #define CONFIG_CMD_LOG + #define CONFIG_CMD_MII + #define CONFIG_CMD_NET + #define CONFIG_CMD_NFS + #define CONFIG_CMD_PCI + #define CONFIG_CMD_PING + #define CONFIG_CMD_REGINFO + #define CONFIG_CMD_SDRAM - /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ - #include + #ifdef CONFIG_440EPX + #define CONFIG_CMD_USB + #endif /*----------------------------------------------------------------------- * Miscellaneous configurable options *----------------------------------------------------------------------*/ + #define CONFIG_SUPPORT_VFAT + #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ - #if (CONFIG_COMMANDS & CFG_CMD_KGDB) + #if defined(CONFIG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ @@@ -458,7 -475,7 +483,7 @@@ *----------------------------------------------------------------------*/ #define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */ #define CFG_CACHELINE_SIZE 32 /* ... */ - #if (CONFIG_COMMANDS & CFG_CMD_KGDB) + #if defined(CONFIG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif @@@ -470,7 -487,7 +495,7 @@@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ - #if (CONFIG_COMMANDS & CFG_CMD_KGDB) + #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif