From: Alan Baker Date: Mon, 25 Nov 2019 18:03:36 +0000 (-0500) Subject: Fix SPIR-V assembly tests with bad cfgs X-Git-Tag: upstream/1.3.5~1682 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=93df316eda2325aa2d82647e3ed474d87bff5d48;p=platform%2Fupstream%2FVK-GL-CTS.git Fix SPIR-V assembly tests with bad cfgs * Update SPIR-V assembly tests to not declare a continue target as a merge block Component: Vulkan VK-GL-CTS Issue: 2122 Affects: dEQP-VK.spirv_assembly.instruction.graphics.switch_block_order.out_of_order* dEQP-VK.spirv_assembly.instruction.graphics.opphi.out_of_order* dEQP-VK.spirv_assembly.instruction.graphics.loop.multi_block_loop_construct* dEQP-VK.spirv_assembly.instruction.graphics.loop.multi_block_continue_construct* dEQP-VK.spirv_assembly.instruction.graphics.loop.continue* dEQP-VK.spirv_assembly.instruction.graphics.loop.break* dEQP-VK.spirv_assembly.instruction.graphics.loop.return* Change-Id: I370331414aae27b53ed79b448b72581e2352c3d7 --- diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp index 2bdbc3f..60cee96 100644 --- a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp +++ b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp @@ -7560,7 +7560,7 @@ tcu::TestCaseGroup* createSwitchBlockOrderTests(tcu::TestContext& testCtx) "%loop = OpLabel\n" "%ival = OpLoad %i32 %iptr\n" "%lt_4 = OpSLessThan %bool %ival %c_i32_4\n" - " OpLoopMerge %exit %switch_exit None\n" + " OpLoopMerge %exit %cont None\n" " OpBranchConditional %lt_4 %switch_entry %exit\n" // Merge block for loop. @@ -7597,6 +7597,8 @@ tcu::TestCaseGroup* createSwitchBlockOrderTests(tcu::TestContext& testCtx) "%switch_exit = OpLabel\n" "%ival_next = OpIAdd %i32 %ival %c_i32_1\n" " OpStore %iptr %ival_next\n" + " OpBranch %cont\n" + "%cont = OpLabel\n" " OpBranch %loop\n" "%case1 = OpLabel\n" @@ -8044,7 +8046,7 @@ tcu::TestCaseGroup* createOpPhiTests(tcu::TestContext& testCtx) "%loop = OpLabel\n" "%ival = OpLoad %i32 %iptr\n" "%lt_4 = OpSLessThan %bool %ival %c_i32_4\n" - " OpLoopMerge %exit %phi None\n" + " OpLoopMerge %exit %cont None\n" " OpBranchConditional %lt_4 %entry %exit\n" "%entry = OpLabel\n" @@ -8067,6 +8069,8 @@ tcu::TestCaseGroup* createOpPhiTests(tcu::TestContext& testCtx) "%phi = OpLabel\n" "%operand = OpPhi %f32 %c_f32_p4 %case2 %c_f32_p5 %case1 %c_f32_p2 %case0 %c_f32_0 %case3\n" // not in the order of blocks + " OpBranch %cont\n" + "%cont = OpLabel\n" "%add = OpFAdd %f32 %val %operand\n" " OpStore %loc %add\n" "%ival_next = OpIAdd %i32 %ival %c_i32_1\n" @@ -9107,9 +9111,9 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) ";adds and subtracts 1.0 to %val in alternate iterations\n" "%loop = OpLabel\n" - "%count = OpPhi %i32 %c_i32_4 %entry %count__ %gather\n" - "%delta = OpPhi %f32 %c_f32_1 %entry %delta_next %gather\n" - "%val1 = OpPhi %f32 %val0 %entry %val %gather\n" + "%count = OpPhi %i32 %c_i32_4 %entry %count__ %cont\n" + "%delta = OpPhi %f32 %c_f32_1 %entry %delta_next %cont\n" + "%val1 = OpPhi %f32 %val0 %entry %val %cont\n" // There are several possibilities for the Continue Target below. Each // will be specialized into a separate test case. "OpLoopMerge %exit ${continue_target} None\n" @@ -9131,6 +9135,9 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) "%delta_next = OpPhi %f32 %c_f32_n1 %even %c_f32_1 %odd\n" "%val = OpFAdd %f32 %val1 %delta\n" "%count__ = OpISub %i32 %count %c_i32_1\n" + "OpBranch %cont\n" + + "%cont = OpLabel\n" "%again = OpSGreaterThan %bool %count__ %c_i32_0\n" "OpBranchConditional %again %loop %exit\n" @@ -9148,7 +9155,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) createTestsForAllStages("multi_block_continue_construct", defaultColors, defaultColors, fragments, testGroup.get()); // The Continue Target is at the end of the loop. - continue_target["continue_target"] = "%gather"; + continue_target["continue_target"] = "%cont"; fragments["testfun"] = multiBlock.specialize(continue_target); createTestsForAllStages("multi_block_loop_construct", defaultColors, defaultColors, fragments, testGroup.get()); @@ -9171,7 +9178,6 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) "%if = OpLabel\n" ";skip if %count==2\n" "%eq2 = OpIEqual %bool %count %c_i32_2\n" - "OpSelectionMerge %continue DontFlatten\n" "OpBranchConditional %eq2 %continue %body\n" "%body = OpLabel\n" @@ -9216,7 +9222,6 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) "%if = OpLabel\n" ";end loop if %count==%two\n" "%above2 = OpSGreaterThan %bool %count %two\n" - "OpSelectionMerge %continue DontFlatten\n" "OpBranchConditional %above2 %body %exit\n" "%body = OpLabel\n" @@ -9261,7 +9266,7 @@ tcu::TestCaseGroup* createLoopTests(tcu::TestContext& testCtx) "%if = OpLabel\n" ";return if %count==%two\n" "%above2 = OpSGreaterThan %bool %count %two\n" - "OpSelectionMerge %continue DontFlatten\n" + "OpSelectionMerge %body DontFlatten\n" "OpBranchConditional %above2 %body %early_exit\n" "%early_exit = OpLabel\n"