From: Palmer Dabbelt <palmer@rivosinc.com>
Date: Thu, 25 Aug 2022 23:06:49 +0000 (-0700)
Subject: Merge tag 'dt-fixes-for-palmer-6.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel... 
X-Git-Tag: v6.6.17~6595^2~8
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=92e55a865bc7b3f89bb8c684f6846651868ee7d7;p=platform%2Fkernel%2Flinux-rpi.git

Merge tag 'dt-fixes-for-palmer-6.0-rc3' of git://git./linux/kernel/git/conor/linux.git into fixes

Microchip RISC-V devicetree fixes for 6.0-rc3

Two sets of fixes this time around:
- A fix for the interrupt ordering of the l2-cache controller. If the
  driver is enabled, it would spam the console /constantly/, rendering
  the system useless.
- General cleanup for some bogus properties in the dt, part of my quest
  for zero dtbs_check warnings.

On that note, the interrupt ordering adds a dtbs_check warning - but I
considered that fixing the potentially useless system was more of a
priority.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'dt-fixes-for-palmer-6.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git:
  riscv: dts: microchip: mpfs: remove pci axi address translation property
  riscv: dts: microchip: mpfs: remove bogus card-detect-delay
  riscv: dts: microchip: mpfs: remove ti,fifo-depth property
  riscv: dts: microchip: mpfs: fix incorrect pcie child node name
  riscv: dts: microchip: correct L2 cache interrupts
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92e55a865bc7b3f89bb8c684f6846651868ee7d7