From: Stefan Roese Date: Fri, 16 Oct 2009 08:01:09 +0000 (+0200) Subject: ppc4xx: Update flash size in reg property of the NOR flash node X-Git-Tag: v2009.11-rc1~13^2^2~5 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=92b8964bed0d1b779d9e26be4e16755b5c635415;p=kernel%2Fu-boot.git ppc4xx: Update flash size in reg property of the NOR flash node Till now only the ranges in the ebc node are updated with the values currently configured in the PPC4xx EBC controller. With this patch now the NOR flash size is updated in the device tree blob as well. This is done by scanning the compatible nodes "cfi-flash" and "jedec-flash" for the correct chip select number. This size fixup is enabled for all AMCC eval board right now. Other 4xx boards may want to enable it as well, if this problem with multiple NOR FLASH sizes exists. Signed-off-by: Stefan Roese Cc: Wolfgang Denk --- diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index b310832..15a184b 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -59,11 +59,17 @@ void __ft_board_setup(void *blob, bd_t *bd) *p++ = 0; *p++ = bxcr & EBC_BXCR_BAS_MASK; *p++ = EBC_BXCR_BANK_SIZE(bxcr); + +#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE + /* Try to update reg property in nor flash node too */ + fdt_fixup_nor_flash_size(blob, i, + EBC_BXCR_BANK_SIZE(bxcr)); +#endif } } /* Some 405 PPC's have EBC as direct PLB child in the dts */ - if (fdt_path_offset(blob, "/plb/opb/ebc") < 0) + if (fdt_path_offset(blob, ebc_path) < 0) strcpy(ebc_path, "/plb/ebc"); rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges, (p - ranges) * sizeof(u32), 1); diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 51128a3..8cd97b8 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -156,6 +156,8 @@ */ #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP +/* Update size in "reg" property of NOR FLASH device tree nodes */ +#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE /* * Booting and default environment