From: Nanley Chery Date: Mon, 8 Nov 2021 16:41:20 +0000 (-0500) Subject: anv,iris: Flush HDC before color fast clears X-Git-Tag: upstream/22.3.5~14098 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=912acbf963e4f054f9e57df72f3390d4fd9fcab3;p=platform%2Fupstream%2Fmesa.git anv,iris: Flush HDC before color fast clears Needed for XeHP (see Bspec 47704). Reviewed-by: Lionel Landwerlin Reviewed-by: Rohan Garg Part-of: --- diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c index 4a7f295..c7f2f32 100644 --- a/src/gallium/drivers/iris/iris_clear.c +++ b/src/gallium/drivers/iris/iris_clear.c @@ -261,6 +261,8 @@ fast_clear_color(struct iris_context *ice, PIPE_CONTROL_TILE_CACHE_FLUSH | (devinfo->verx10 == 120 ? PIPE_CONTROL_DEPTH_STALL : 0) | + (devinfo->verx10 == 125 ? + PIPE_CONTROL_FLUSH_HDC : 0) | PIPE_CONTROL_PSS_STALL_SYNC); iris_batch_sync_region_start(batch); diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 1cc2f79..b4d3c50 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -1880,6 +1880,8 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, ANV_PIPE_TILE_CACHE_FLUSH_BIT | (devinfo->verx10 == 120 ? ANV_PIPE_DEPTH_STALL_BIT : 0) | + (devinfo->verx10 == 125 ? + ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0) | ANV_PIPE_PSS_STALL_SYNC_BIT | ANV_PIPE_END_OF_PIPE_SYNC_BIT, "before fast clear mcs"); @@ -1974,6 +1976,8 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer, ANV_PIPE_TILE_CACHE_FLUSH_BIT | (devinfo->verx10 == 120 ? ANV_PIPE_DEPTH_STALL_BIT : 0) | + (devinfo->verx10 == 125 ? + ANV_PIPE_HDC_PIPELINE_FLUSH_BIT : 0) | ANV_PIPE_PSS_STALL_SYNC_BIT | ANV_PIPE_END_OF_PIPE_SYNC_BIT, "before fast clear ccs");