From: ciceron Date: Tue, 2 Mar 2004 21:55:35 +0000 (+0000) Subject: * config/m68hc11/m68hc11.md ("*pushdi_internal"): New insn and split X-Git-Tag: upstream/4.9.2~72588 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=90a35510070af6c33fdba022d43f9941da9293d1;p=platform%2Fupstream%2Flinaro-gcc.git * config/m68hc11/m68hc11.md ("*pushdi_internal"): New insn and split to separate push from moves. ("*pushdf_internal"): Likewise. ("*pushsf_internal"): Likewise. ("*pushsi_internal"): Likewise. ("movdi_internal"): Use define_insn_and_split; non push operand. ("movdf_internal"): Likewise. ("movsf_internal"): Likewise. ("movsi_internal"): Likewise. ("*movhi_68hc12", "*addhi3_68hc12"): Fix and tune constraints ("*addhi3", "*subhi3", "*andhi3_mem", "*iorhi3_mem"): Likewise. ("*ashlsi3_const1", "*lshrsi3_const1"): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@78785 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 63039b7..534f1fb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,20 @@ 2004-03-02 Stephane Carrez + * config/m68hc11/m68hc11.md ("*pushdi_internal"): New insn and split + to separate push from moves. + ("*pushdf_internal"): Likewise. + ("*pushsf_internal"): Likewise. + ("*pushsi_internal"): Likewise. + ("movdi_internal"): Use define_insn_and_split; non push operand. + ("movdf_internal"): Likewise. + ("movsf_internal"): Likewise. + ("movsi_internal"): Likewise. + ("*movhi_68hc12", "*addhi3_68hc12"): Fix and tune constraints + ("*addhi3", "*subhi3", "*andhi3_mem", "*iorhi3_mem"): Likewise. + ("*ashlsi3_const1", "*lshrsi3_const1"): Likewise. + +2004-03-02 Stephane Carrez + * config/m68hc11/m68hc11.md ("tstqi_z_used"): Use define_insn_and_split. ("cmphi_z_used", "cmpqi_z_used"): Likewise. ("movstrictsi", "movstricthi", "movstrictqi"): Likewise. diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md index 02782a6..4140733 100644 --- a/gcc/config/m68hc11/m68hc11.md +++ b/gcc/config/m68hc11/m68hc11.md @@ -627,17 +627,26 @@ } ") -(define_insn "movdi_internal" - [(set (match_operand:DI 0 "nonimmediate_operand" "=ou,U,!u,U,m,m,!u") +;; Separate push from normal moves to avoid reloading problems +;; The 'clr' is not able to push on 68HC11 so we really need a scratch. +;; We can also accept more scratch registers. +(define_insn_and_split "*pushdi_internal" + [(set (match_operand:DI 0 "push_operand" "=<,<,<,<") + (match_operand:DI 1 "general_operand" "i,U,m,!u")) + (clobber (match_scratch:HI 2 "=&dA,&d,&d,&dA"))] + "" + "#" + "reload_completed" + [(const_int 0)] + "m68hc11_split_move (operands[0], operands[1], operands[2]); + DONE;") + +(define_insn_and_split "movdi_internal" + [(set (match_operand:DI 0 "non_push_operand" "=m!u,U,!u,U,m,m,!u") (match_operand:DI 1 "general_operand" "K,iU,iU,!u,mi,!u,!mu")) (clobber (match_scratch:HI 2 "=X,&d,&d,&d,&d,&d,&d"))] "" - "#") - -(define_split - [(set (match_operand:DI 0 "nonimmediate_operand" "") - (match_operand:DI 1 "general_operand" "")) - (clobber (match_scratch:HI 2 ""))] + "#" "reload_completed" [(const_int 0)] "m68hc11_split_move (operands[0], operands[1], operands[2]); @@ -663,17 +672,24 @@ } ") -(define_insn "movdf_internal" - [(set (match_operand:DF 0 "nonimmediate_operand" "=ou,U,!u,U,m,m,!u") +;; See pushdi_internal +(define_insn_and_split "*pushdf_internal" + [(set (match_operand:DF 0 "push_operand" "=<,<,<,<") + (match_operand:DF 1 "general_operand" "i,U,m,!u")) + (clobber (match_scratch:HI 2 "=&dA,&d,&d,&dA"))] + "" + "#" + "reload_completed" + [(const_int 0)] + "m68hc11_split_move (operands[0], operands[1], operands[2]); + DONE;") + +(define_insn_and_split "movdf_internal" + [(set (match_operand:DF 0 "non_push_operand" "=mu,U,!u,U,m,m,!u") (match_operand:DF 1 "general_operand" "G,iU,iU,!u,mi,!u,!mu")) (clobber (match_scratch:HI 2 "=X,&d,&d,&d,&d,&d,&d"))] "" - "#") - -(define_split - [(set (match_operand:DF 0 "nonimmediate_operand" "") - (match_operand:DF 1 "general_operand" "")) - (clobber (match_scratch:HI 2 ""))] + "#" "reload_completed" [(const_int 0)] "m68hc11_split_move (operands[0], operands[1], operands[2]); @@ -708,17 +724,23 @@ } ") -(define_insn "movsi_internal" - [(set (match_operand:SI 0 "nonimmediate_operand" "=ou,mu,?D,m,?D,?u,?u,!u,D") - (match_operand:SI 1 "general_operand" "K,imu,im,?D,!u,?D,mi,!u,!D")) - (clobber (match_scratch:HI 2 "=X,&d,X,X,X,X,&d,&d,X"))] +(define_insn_and_split "*pushsi_internal" + [(set (match_operand:SI 0 "push_operand" "=<,<,<,<,<") + (match_operand:SI 1 "general_operand" "!D,i,U,m,!u")) + (clobber (match_scratch:HI 2 "=X,&dA,&d,&d,&dA"))] "" - "#") + "#" + "reload_completed" + [(const_int 0)] + "m68hc11_split_move (operands[0], operands[1], operands[2]); + DONE;") -(define_split - [(set (match_operand:SI 0 "nonimmediate_operand" "") - (match_operand:SI 1 "general_operand" "")) - (clobber (match_scratch:HI 2 ""))] +(define_insn_and_split "movsi_internal" + [(set (match_operand:SI 0 "nonimmediate_operand" "=mu,mu,?D,m,?D,?u,?u,!u,D") + (match_operand:SI 1 "general_operand" "K,imu,im,?D,!u,?D,mi,!u,!D")) + (clobber (match_scratch:HI 2 "=X,&d,X,X,X,X,&d,&d,X"))] + "" + "#" "reload_completed" [(const_int 0)] "m68hc11_split_move (operands[0], operands[1], operands[2]); @@ -744,17 +766,23 @@ } ") -(define_insn "movsf_internal" - [(set (match_operand:SF 0 "nonimmediate_operand" "=o!u,m,D,m,D,!u,!u,!u,D") +(define_insn_and_split "*pushsf_internal" + [(set (match_operand:SF 0 "push_operand" "=<,<,<,<,<") + (match_operand:SF 1 "general_operand" "!D,i,U,m,!u")) + (clobber (match_scratch:HI 2 "=X,&dA,&d,&d,&dA"))] + "" + "#" + "reload_completed" + [(const_int 0)] + "m68hc11_split_move (operands[0], operands[1], operands[2]); + DONE;") + +(define_insn_and_split "movsf_internal" + [(set (match_operand:SF 0 "nonimmediate_operand" "=m!u,m,D,m,D,!u,!u,!u,D") (match_operand:SF 1 "general_operand" "G,im,im,D,!u,D,mi,!u,!D")) (clobber (match_scratch:HI 2 "=X,&d,X,X,X,X,&d,&d,X"))] "" - "#") - -(define_split - [(set (match_operand:SF 0 "nonimmediate_operand" "") - (match_operand:SF 1 "general_operand" "")) - (clobber (match_scratch:HI 2 ""))] + "#" "reload_completed" [(const_int 0)] "m68hc11_split_move (operands[0], operands[1], operands[2]); @@ -864,8 +892,8 @@ clr\\t%b0\\n\\tclr\\t%h0") (define_insn "*movhi_68hc12" - [(set (match_operand:HI 0 "nonimmediate_operand" "=U,dAw,U,U,m,!u") - (match_operand:HI 1 "general_operand" "U,rim,dAwi,!u,dAw,riU"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=U,dAw,dAw,U,U,m,!u") + (match_operand:HI 1 "general_operand" "U,dAwim,!u,dAwi,!u,dAw,riU"))] "TARGET_M6812" "* { @@ -1205,7 +1233,7 @@ [(set (match_operand:DI 0 "nonimmediate_operand" "=m,m,!u,!u") (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "m,Du,m,Du"))) - (clobber (match_scratch:HI 2 "=d,d,d,d"))] + (clobber (match_scratch:HI 2 "=d,d,&d,d"))] "" "#") @@ -2066,8 +2094,8 @@ }") (define_insn "*addhi3_68hc12" - [(set (match_operand:HI 0 "register_operand" "=xyd,d,xy*z*w,xy*z*w,xy*z") - (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,xy*zw,0") + [(set (match_operand:HI 0 "register_operand" "=d*A,d,xy*A*w,xy*A*w,xy*A") + (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,xy*Aw,0") (match_operand:HI 2 "general_operand" "i,m*A*wu,id,id,!mu*A")))] "TARGET_M6812" "* @@ -2255,9 +2283,9 @@ }") (define_insn "*addhi3" - [(set (match_operand:HI 0 "hard_reg_operand" "=A,dA,d,!A,d*A,!d*A") - (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0,0") - (match_operand:HI 2 "general_operand" "N,I,i,I,mi*A*d,!u*d*w")))] + [(set (match_operand:HI 0 "hard_reg_operand" "=A,dA,d,!A,d*A,d,!d*A") + (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0,0,0") + (match_operand:HI 2 "general_operand" "N,I,i,I,mi*A*d,*u,!u*d*w")))] "TARGET_M6811" "* { @@ -2683,9 +2711,9 @@ (define_insn "*subhi3" - [(set (match_operand:HI 0 "register_operand" "=d,*A,d*A") - (minus:HI (match_operand:HI 1 "register_operand" "0,0,0") - (match_operand:HI 2 "general_operand" "im*A*d,im*d*A,!u")))] + [(set (match_operand:HI 0 "register_operand" "=d,*A,d,*A") + (minus:HI (match_operand:HI 1 "register_operand" "0,0,0,0") + (match_operand:HI 2 "general_operand" "im*A*d,im*d*A,u,!u")))] "" "* { @@ -3062,10 +3090,10 @@ "") (define_insn "*andhi3_mem" - [(set (match_operand:HI 0 "memory_operand" "=Q,R") + [(set (match_operand:HI 0 "memory_operand" "=R,Q") (and:HI (match_dup 0) (match_operand:HI 1 "immediate_operand" "i,i"))) - (clobber (match_scratch:HI 2 "=xy,X"))] + (clobber (match_scratch:HI 2 "=X,xy"))] "TARGET_RELAX && !TARGET_M6812" "* { @@ -3085,7 +3113,7 @@ /* When destination is a global variable, generate a .relax instruction and load the address in the clobber register. That load can be eliminated by the linker if the address is in page0. */ - if (which_alternative == 0) + if (which_alternative == 1) { rtx ops[3]; @@ -3220,10 +3248,10 @@ "") (define_insn "*andqi3_mem" - [(set (match_operand:QI 0 "memory_operand" "=Q,R") + [(set (match_operand:QI 0 "memory_operand" "=R,Q") (and:QI (match_dup 0) (match_operand:QI 1 "const_int_operand" "i,i"))) - (clobber (match_scratch:HI 2 "=xy,X"))] + (clobber (match_scratch:HI 2 "=X,xy"))] "TARGET_RELAX && !TARGET_M6812" "* { @@ -3241,7 +3269,7 @@ /* When destination is a global variable, generate a .relax instruction and load the address in the clobber register. That load can be eliminated by the linker if the address is in page0. */ - if (which_alternative == 0) + if (which_alternative == 1) { rtx ops[3]; @@ -3346,10 +3374,10 @@ "") (define_insn "*iorhi3_mem" - [(set (match_operand:HI 0 "memory_operand" "=Q,R") + [(set (match_operand:HI 0 "memory_operand" "=R,Q") (ior:HI (match_dup 0) (match_operand:HI 1 "const_int_operand" ""))) - (clobber (match_scratch:HI 2 "=xy,X"))] + (clobber (match_scratch:HI 2 "=X,xy"))] "TARGET_RELAX && !TARGET_M6812" "* { @@ -3361,7 +3389,7 @@ return \"\"; } CC_STATUS_INIT; - if (which_alternative == 0) + if (which_alternative == 1) { rtx ops[3]; @@ -3449,10 +3477,10 @@ "") (define_insn "*iorqi3_mem" - [(set (match_operand:QI 0 "memory_operand" "=Q,R") + [(set (match_operand:QI 0 "memory_operand" "=R,Q") (ior:QI (match_dup 0) (match_operand:QI 1 "const_int_operand" ""))) - (clobber (match_scratch:HI 2 "=xy,X"))] + (clobber (match_scratch:HI 2 "=X,xy"))] "TARGET_RELAX && !TARGET_M6812" "* { @@ -3463,7 +3491,7 @@ cc_status = cc_prev_status; return \"\"; } - if (which_alternative == 0) + if (which_alternative == 1) { rtx ops[3]; @@ -4587,10 +4615,10 @@ "") (define_insn "*ashlsi3_const1" - [(set (match_operand:SI 0 "non_push_operand" "=D,D,m,!*u,?*um") - (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,*um,0,0,*um") + [(set (match_operand:SI 0 "non_push_operand" "=D,D,D,m,*u") + (ashift:SI (match_operand:SI 1 "nonimmediate_operand" "0,m,*u,m,*u") (const_int 1))) - (clobber (match_scratch:HI 2 "=X,X,&d,&d,&d"))] + (clobber (match_scratch:HI 2 "=X,X,X,&d,&d"))] "" "* { @@ -5339,10 +5367,10 @@ #") (define_insn "*lshrsi3_const1" - [(set (match_operand:SI 0 "non_push_operand" "=D,m,*u") - (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "D*um,*um,*um") + [(set (match_operand:SI 0 "non_push_operand" "=D,D,D,m,*u") + (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0,m,*u,m,*u") (const_int 1))) - (clobber (match_scratch:HI 2 "=X,&d,&d"))] + (clobber (match_scratch:HI 2 "=X,X,X,&d,&d"))] "" "* {