From: Simon Pilgrim Date: Sun, 12 Mar 2023 15:55:58 +0000 (+0000) Subject: [DAG] Remove redundant isZExtFree(SDValue,VT) overrides. NFC. X-Git-Tag: upstream/17.0.6~15119 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=9041682d2c71f7f8b35077a2fd49b3f86ba4798c;p=platform%2Fupstream%2Fllvm.git [DAG] Remove redundant isZExtFree(SDValue,VT) overrides. NFC. These implementations both match the TargetLoweringBase.isZExtFree implementation --- diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 6c9cbcd..a20ad40 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -912,10 +912,6 @@ bool AMDGPUTargetLowering::isZExtFree(EVT Src, EVT Dest) const { return Src == MVT::i32 && Dest == MVT::i64; } -bool AMDGPUTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { - return isZExtFree(Val.getValueType(), VT2); -} - bool AMDGPUTargetLowering::isNarrowingProfitable(EVT SrcVT, EVT DestVT) const { // There aren't really 64-bit registers, but pairs of 32-bit ones and only a // limited number of native 64-bit operations. Shrinking an operation to fit diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h index aeeb69a..1e90255 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h @@ -173,7 +173,6 @@ public: bool isZExtFree(Type *Src, Type *Dest) const override; bool isZExtFree(EVT Src, EVT Dest) const override; - bool isZExtFree(SDValue Val, EVT VT2) const override; SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOperations, bool ForCodeSize, diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp index 27fafa1..c0b4a49 100644 --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -1412,10 +1412,6 @@ bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { return false && VT1 == MVT::i8 && VT2 == MVT::i16; } -bool MSP430TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { - return isZExtFree(Val.getValueType(), VT2); -} - //===----------------------------------------------------------------------===// // Other Lowering Code //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.h b/llvm/lib/Target/MSP430/MSP430ISelLowering.h index f23042a..17ee457 100644 --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.h +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.h @@ -126,7 +126,6 @@ namespace llvm { /// out to 16 bits. bool isZExtFree(Type *Ty1, Type *Ty2) const override; bool isZExtFree(EVT VT1, EVT VT2) const override; - bool isZExtFree(SDValue Val, EVT VT2) const override; bool isLegalICmpImmediate(int64_t) const override; bool shouldAvoidTransformToShift(EVT VT, unsigned Amount) const override;