From: Samuel Pitoiset Date: Wed, 24 May 2023 12:51:46 +0000 (+0200) Subject: radv: do not force VRS 1x1 when smooth lines are enabled X-Git-Tag: upstream/23.3.3~7047 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8f88cf3b42d3978ce8f83c8d6df684d7d5795613;p=platform%2Fupstream%2Fmesa.git radv: do not force VRS 1x1 when smooth lines are enabled Otherwise this will break VRS with GPL. Signed-off-by: Samuel Pitoiset Part-of: --- diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index bab029a..3527d67 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2312,7 +2312,8 @@ radv_should_force_vrs1x1(struct radv_cmd_buffer *cmd_buffer) const struct radv_shader *ps = cmd_buffer->state.shaders[MESA_SHADER_FRAGMENT]; return pdevice->rad_info.gfx_level >= GFX10_3 && - (cmd_buffer->state.ms.sample_shading_enable || (ps && ps->info.ps.reads_sample_mask_in)); + (cmd_buffer->state.ms.sample_shading_enable || (ps && ps->info.ps.reads_sample_mask_in && + !ps->info.ps.needs_poly_line_smooth)); } static void