From: Dmitry Preobrazhensky <dmitri.preobrazhenski@gmail.com>
Date: Mon, 7 Nov 2022 12:52:55 +0000 (+0300)
Subject: [AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands
X-Git-Tag: upstream/17.0.6~28348
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8f68952183822b63b11f61e5a3c3ade8af33a63a;p=platform%2Fupstream%2Fllvm.git

[AMDGPU][MC][GFX11][NFC] Correct VINTERP src operands

Differential Revision: https://reviews.llvm.org/D137238
---

diff --git a/llvm/lib/Target/AMDGPU/VINTERPInstructions.td b/llvm/lib/Target/AMDGPU/VINTERPInstructions.td
index c63fbbc..71de202 100644
--- a/llvm/lib/Target/AMDGPU/VINTERPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VINTERPInstructions.td
@@ -63,6 +63,10 @@ def VOP3_VINTERP_F32 : VOPProfile<[f32, f32, f32, f32]> {
   let HasOpSel = 0;
   let HasModifiers = 1;
 
+  let Src0Mod = FPVRegInputMods;
+  let Src1Mod = FPVRegInputMods;
+  let Src2Mod = FPVRegInputMods;
+
   let Outs64 = (outs VGPR_32:$vdst);
   let Ins64 = (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
                    Src1Mod:$src1_modifiers, VRegSrc_32:$src1,
@@ -77,6 +81,10 @@ class VOP3_VINTERP_F16 <list<ValueType> ArgVT> : VOPProfile<ArgVT> {
   let HasOpSel = 1;
   let HasModifiers = 1;
 
+  let Src0Mod = FPVRegInputMods;
+  let Src1Mod = FPVRegInputMods;
+  let Src2Mod = FPVRegInputMods;
+
   let Outs64 = (outs VGPR_32:$vdst);
   let Ins64 = (ins Src0Mod:$src0_modifiers, VRegSrc_32:$src0,
                    Src1Mod:$src1_modifiers, VRegSrc_32:$src1,
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
new file mode 100644
index 0000000..415f734
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vinterp_err.s
@@ -0,0 +1,42 @@
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 %s 2>&1 | FileCheck %s -check-prefix=GFX11-ERR --implicit-check-not=error: --strict-whitespace
+
+//===----------------------------------------------------------------------===//
+// VINTERP src operands must be VGPRs.
+// Check that other operand kinds are rejected by assembler.
+//===----------------------------------------------------------------------===//
+
+v_interp_p10_f32 v0, s1, v2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p10_f32 v0, v1, s2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p10_f32 v0, v1, v2, s3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p2_f32 v0, 1, v2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p2_f32 v0, v1, 2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p2_f32 v0, v1, v2, 3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p10_f16_f32 v0, s1, v2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p10_f16_f32 v0, v1, s2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p10_f16_f32 v0, v1, v2, s3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p2_f16_f32 v0, 1, v2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p2_f16_f32 v0, v1, 2, v3
+// GFX11-ERR: error: invalid operand for instruction
+
+v_interp_p2_f16_f32 v0, v1, v2, 3
+// GFX11-ERR: error: invalid operand for instruction