From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 9 Sep 2019 15:20:49 +0000 (+0000)
Subject: AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8e3bc9b572224023eb8536fe934167524ef68ecd;p=platform%2Fupstream%2Fllvm.git

AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic

llvm-svn: 371407
---

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index c1d5036..5e5c9d7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -1534,6 +1534,12 @@ bool AMDGPULegalizerInfo::legalizeIntrinsic(MachineInstr &MI,
     return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::LOCAL_ADDRESS);
   case Intrinsic::amdgcn_is_private:
     return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::PRIVATE_ADDRESS);
+  case Intrinsic::amdgcn_wavefrontsize: {
+    B.setInstr(MI);
+    B.buildConstant(MI.getOperand(0), ST.getWavefrontSize());
+    MI.eraseFromParent();
+    return true;
+  }
   default:
     return true;
   }
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir
new file mode 100644
index 0000000..53eef78
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir
@@ -0,0 +1,18 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE64 %s
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE32 %s
+
+---
+name: test_wavefrontsize
+body: |
+  bb.0:
+
+    ; WAVE64-LABEL: name: test_wavefrontsize
+    ; WAVE64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
+    ; WAVE64: $vgpr0 = COPY [[C]](s32)
+    ; WAVE32-LABEL: name: test_wavefrontsize
+    ; WAVE32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
+    ; WAVE32: $vgpr0 = COPY [[C]](s32)
+    %0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wavefrontsize)
+    $vgpr0 = COPY %0
+...