From: Sai Krishna Potthuri Date: Fri, 24 Sep 2021 10:07:09 +0000 (+0530) Subject: dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI X-Git-Tag: v6.1-rc5~2406^2~28 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8db76cfae1004f5476d9c35670f0a0f084c6b73f;p=platform%2Fkernel%2Flinux-starfive.git dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI Add new compatible to support Cadence Octal SPI(OSPI) controller on Xilinx Versal SoCs, also add power-domains property to the properties list and marked as required for Xilinx Versal OSPI compatible. Signed-off-by: Sai Krishna Potthuri Link: https://lore.kernel.org/r/1632478031-12242-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com Signed-off-by: Mark Brown --- diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 0e7087c..ca155ab 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -11,6 +11,14 @@ maintainers: allOf: - $ref: spi-controller.yaml# + - if: + properties: + compatible: + contains: + const: xlnx,versal-ospi-1.0 + then: + required: + - power-domains properties: compatible: @@ -20,6 +28,7 @@ properties: - ti,k2g-qspi - ti,am654-ospi - intel,lgm-qspi + - xlnx,versal-ospi-1.0 - const: cdns,qspi-nor - const: cdns,qspi-nor @@ -65,6 +74,9 @@ properties: data rather than the QSPI clock. Make sure that QSPI return clock is populated on the board before using this property. + power-domains: + maxItems: 1 + resets: maxItems: 2