From: Peter Senna Tschudin <peter.senna@gmail.com>
Date: Sat, 15 Mar 2014 23:30:52 +0000 (+0100)
Subject: ATHEROS-ALX: Use dma_set_mask_and_coherent and fix a bug
X-Git-Tag: v3.14-rc8~3^2~20
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8d7f1fbf083e19688619e6ca25c95434a2c30537;p=profile%2Fivi%2Fkernel-x86-ivi.git

ATHEROS-ALX: Use dma_set_mask_and_coherent and fix a bug

1. For the 64 bits dma mask use dma_set_mask_and_coherent instead of
   dma_set_mask and dma_set_coherent_mask.

2. For the 32 bits dma mask dma_set_coherent_mask is only called if
   dma_set_mask fails, which is unusual. Assuming this as a bug, fixes
   it by replacing calls to dma_set_mask and dma_set_coherent_mask by a
   call to dma_set_mask_and_coherent.

Signed-off-by: Peter Senna Tschudin <peter.senna@gmail.com>
Tested-by: Jonas Hahnfeld <hahnjo@hahnjo.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/drivers/net/ethernet/atheros/alx/main.c b/drivers/net/ethernet/atheros/alx/main.c
index 2e45f6e..380d249 100644
--- a/drivers/net/ethernet/atheros/alx/main.c
+++ b/drivers/net/ethernet/atheros/alx/main.c
@@ -1248,19 +1248,13 @@ static int alx_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	 * shared register for the high 32 bits, so only a single, aligned,
 	 * 4 GB physical address range can be used for descriptors.
 	 */
-	if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
-	    !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+	if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
 		dev_dbg(&pdev->dev, "DMA to 64-BIT addresses\n");
 	} else {
-		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
+		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 		if (err) {
-			err = dma_set_coherent_mask(&pdev->dev,
-						    DMA_BIT_MASK(32));
-			if (err) {
-				dev_err(&pdev->dev,
-					"No usable DMA config, aborting\n");
-				goto out_pci_disable;
-			}
+			dev_err(&pdev->dev, "No usable DMA config, aborting\n");
+			goto out_pci_disable;
 		}
 	}