From: Stephen Boyd Date: Tue, 2 Nov 2021 18:27:02 +0000 (-0700) Subject: Merge branches 'clk-imx', 'clk-ux500' and 'clk-debugfs' into clk-next X-Git-Tag: v6.6.17~8810^2~18 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8d741ecd46a939e57df0bc1cc7857ba5807d2123;p=platform%2Fkernel%2Flinux-rpi.git Merge branches 'clk-imx', 'clk-ux500' and 'clk-debugfs' into clk-next * clk-imx: (21 commits) clk: imx: Make CLK_IMX8ULP select MXC_CLK clk: imx: imx6ul: Fix csi clk gate register clk: imx: imx6ul: Move csi_sel mux to correct base register clk: imx: Fix the build break when clk-imx8ulp build as module clk: imx: Add the pcc reset controller support on imx8ulp clk: imx: Add clock driver for imx8ulp clk: imx: Update the pfdv2 for 8ulp specific support clk: imx: disable the pfd when set pfdv2 clock rate clk: imx: Add 'CLK_SET_RATE_NO_REPARENT' for composite-7ulp clk: imx: disable i.mx7ulp composite clock during initialization clk: imx: Update the compsite driver to support imx8ulp clk: imx: Update the pllv4 to support imx8ulp dt-bindings: clock: Add imx8ulp clock support clk: imx: Rework imx_clk_hw_pll14xx wrapper clk: imx: Rework all imx_clk_hw_composite wrappers clk: imx: Rework all clk_hw_register_divider wrappers clk: imx: Rework all clk_hw_register_mux wrappers clk: imx: Rework all clk_hw_register_gate2 wrappers clk: imx: Rework all clk_hw_register_gate wrappers clk: imx: Make mux/mux2 clk based helpers use clk_hw based ones ... * clk-ux500: clk: ux500: Add driver for the reset portions of PRCC dt-bindings: clock: u8500: Rewrite in YAML and extend * clk-debugfs: clk: use clk_core_get_rate_recalc() in clk_rate_get() --- 8d741ecd46a939e57df0bc1cc7857ba5807d2123