From: Mohan Kumar Date: Mon, 5 Sep 2022 17:24:20 +0000 (+0530) Subject: ALSA: hda/tegra: Align BDL entry to 4KB boundary X-Git-Tag: v6.6.17~6351^2~41 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8d44e6044a0e885acdd01813768a0b27906d64fd;p=platform%2Fkernel%2Flinux-rpi.git ALSA: hda/tegra: Align BDL entry to 4KB boundary AZA HW may send a burst read/write request crossing 4K memory boundary. The 4KB boundary is not guaranteed by Tegra HDA HW. Make SW change to include the flag AZX_DCAPS_4K_BDLE_BOUNDARY to align BDLE to 4K boundary. Signed-off-by: Mohan Kumar Link: https://lore.kernel.org/r/20220905172420.3801-1-mkumard@nvidia.com Signed-off-by: Takashi Iwai --- diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c index 7debb2c..976a112 100644 --- a/sound/pci/hda/hda_tegra.c +++ b/sound/pci/hda/hda_tegra.c @@ -474,7 +474,8 @@ MODULE_DEVICE_TABLE(of, hda_tegra_match); static int hda_tegra_probe(struct platform_device *pdev) { const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR | - AZX_DCAPS_PM_RUNTIME; + AZX_DCAPS_PM_RUNTIME | + AZX_DCAPS_4K_BDLE_BOUNDARY; struct snd_card *card; struct azx *chip; struct hda_tegra *hda;