From: Robert Marko <robimarko@gmail.com>
Date: Fri, 13 Jan 2023 16:44:41 +0000 (+0100)
Subject: arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY
X-Git-Tag: v6.1.21~1398
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8c9554012be6ebcd9b50e5d024029991e5902c89;p=platform%2Fkernel%2Flinux-starfive.git

arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY

[ Upstream commit 100d9c94ccf15b02742c326cd04f422ab729153b ]

Serdes register space sizes are incorrect, update them to match the
actual sizes from downstream QCA 5.4 kernel.

Fixes: 942bcd33ed45 ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-1-robimarko@gmail.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index cde06bf..09ba99f 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -242,9 +242,9 @@
 			status = "disabled";
 
 			pcie_phy1: phy@8e200 {
-				reg = <0x8e200 0x16c>,
+				reg = <0x8e200 0x130>,
 				      <0x8e400 0x200>,
-				      <0x8e800 0x4f4>;
+				      <0x8e800 0x1f8>;
 				#phy-cells = <0>;
 				#clock-cells = <0>;
 				clocks = <&gcc GCC_PCIE1_PIPE_CLK>;