From: Bas Nieuwenhuizen Date: Sun, 21 Jan 2018 21:03:02 +0000 (+0100) Subject: radv: Init variant entry with memset. X-Git-Tag: upstream/18.1.0~2483 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8b98929074f77156d8e1a10bc42b8eda0f9ce4ec;p=platform%2Fupstream%2Fmesa.git radv: Init variant entry with memset. This gets memcpy'd and written driectly, and due to alignment, this resulted in uninitialized gaps. This makes those gaps go away. CC: Reviewed-by: Dave Airlie --- diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index a6508ae..db48895 100644 --- a/src/amd/vulkan/radv_pipeline_cache.c +++ b/src/amd/vulkan/radv_pipeline_cache.c @@ -380,6 +380,7 @@ radv_pipeline_cache_insert_shaders(struct radv_device *device, char* p = entry->code; struct cache_entry_variant_info info; + memset(&info, 0, sizeof(info)); for (int i = 0; i < MESA_SHADER_STAGES; ++i) { if (!variants[i])