From: Michael Walle <michael@walle.cc>
Date: Mon, 2 May 2022 22:41:15 +0000 (+0200)
Subject: ARM: dts: lan966x: swap dma channels for crypto node
X-Git-Tag: v6.1-rc5~1174^2~13^2~16
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8b4092fd0c1a0aaa985413c43b027f87dd457207;p=platform%2Fkernel%2Flinux-starfive.git

ARM: dts: lan966x: swap dma channels for crypto node

The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order
of the channels. Swap them to pass devicetree validation.

Fixes: 290deaa10c50 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291")
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-2-michael@walle.cc
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
---

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 7d28696..5e9cbc8 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -114,9 +114,9 @@
 			compatible = "atmel,at91sam9g46-aes";
 			reg = <0xe004c000 0x100>;
 			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
-			dmas = <&dma0 AT91_XDMAC_DT_PERID(13)>,
-			       <&dma0 AT91_XDMAC_DT_PERID(12)>;
-			dma-names = "rx", "tx";
+			dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
+			       <&dma0 AT91_XDMAC_DT_PERID(13)>;
+			dma-names = "tx", "rx";
 			clocks = <&nic_clk>;
 			clock-names = "aes_clk";
 		};