From: Nanley Chery Date: Wed, 15 Apr 2015 21:15:10 +0000 (-0700) Subject: i965/surface_formats: add support for 2D ASTC surface formats X-Git-Tag: upstream/17.1.0~16537 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8b1f008e9acf94645a28c27fa261f6450a3edb84;p=platform%2Fupstream%2Fmesa.git i965/surface_formats: add support for 2D ASTC surface formats Define two-thirds of the 2D Intel ASTC surface formats (LDR-only). This allows a 1-to-1 mapping from the mesa format to the Intel format. ASTC textures will default to being processed in LDR mode. If there is hardware support for HDR/Full mode and the texture is not sRGB, add the format bit necessary to process it in HDR/Full mode. v2: remove extra newlines. v3: follow existing coding style in translate_tex_format(). v4: expound on the GEN9_SURFACE_ASTC_HDR_FORMAT_BIT comment. update SF table - ASTC is actually supported in Gen8. v5: conform the ASTC MESA_FORMAT enums to the existing naming convention. Reviewed-by: Anuj Phogat Signed-off-by: Nanley Chery --- diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 82a3635..cb5c82a 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -504,6 +504,38 @@ #define BRW_SURFACEFORMAT_R8G8B8_UINT 0x1C8 #define BRW_SURFACEFORMAT_R8G8B8_SINT 0x1C9 #define BRW_SURFACEFORMAT_RAW 0x1FF + +#define GEN9_SURFACE_ASTC_HDR_FORMAT_BIT 0x100 + +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_4x4_U8sRGB 0x200 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_5x4_U8sRGB 0x208 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_5x5_U8sRGB 0x209 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_6x5_U8sRGB 0x211 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_6x6_U8sRGB 0x212 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_8x5_U8sRGB 0x221 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_8x6_U8sRGB 0x222 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_8x8_U8sRGB 0x224 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x5_U8sRGB 0x231 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x6_U8sRGB 0x232 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x8_U8sRGB 0x234 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x10_U8sRGB 0x236 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_U8sRGB 0x23E +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_U8sRGB 0x23F +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_4x4_FLT16 0x240 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_5x4_FLT16 0x248 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_5x5_FLT16 0x249 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_6x5_FLT16 0x251 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_6x6_FLT16 0x252 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_8x5_FLT16 0x261 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_8x6_FLT16 0x262 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_8x8_FLT16 0x264 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x5_FLT16 0x271 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x6_FLT16 0x272 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x8_FLT16 0x274 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_10x10_FLT16 0x276 +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_FLT16 0x27E +#define BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_FLT16 0x27F + #define BRW_SURFACE_FORMAT_SHIFT 18 #define BRW_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index a33fd88..97fff60 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -307,6 +307,34 @@ const struct surface_format_info surface_formats[] = { SF( x, x, x, x, x, x, x, x, x, ETC2_EAC_SRGB8_A8) SF( x, x, x, x, x, x, x, x, x, R8G8B8_UINT) SF( x, x, x, x, x, x, x, x, x, R8G8B8_SINT) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_4x4_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_5x4_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_5x5_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_6x5_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_6x6_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_8x5_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_8x6_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_8x8_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x5_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x6_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x8_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x10_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_12x10_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_12x12_FLT16) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_4x4_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_5x4_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_5x5_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_6x5_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_6x6_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_8x5_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_8x6_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_8x8_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x5_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x6_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x8_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_10x10_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_12x10_U8sRGB) + SF(80, 80, x, x, x, x, x, x, x, ASTC_LDR_2D_12x12_U8sRGB) }; #undef x #undef Y @@ -503,6 +531,35 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT] = BRW_SURFACEFORMAT_BC6H_SF16, [MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT] = BRW_SURFACEFORMAT_BC6H_UF16, + [MESA_FORMAT_RGBA_ASTC_4x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_4x4_FLT16, + [MESA_FORMAT_RGBA_ASTC_5x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x4_FLT16, + [MESA_FORMAT_RGBA_ASTC_5x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x5_FLT16, + [MESA_FORMAT_RGBA_ASTC_6x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x5_FLT16, + [MESA_FORMAT_RGBA_ASTC_6x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x6_FLT16, + [MESA_FORMAT_RGBA_ASTC_8x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x5_FLT16, + [MESA_FORMAT_RGBA_ASTC_8x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x6_FLT16, + [MESA_FORMAT_RGBA_ASTC_8x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x8_FLT16, + [MESA_FORMAT_RGBA_ASTC_10x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x5_FLT16, + [MESA_FORMAT_RGBA_ASTC_10x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x6_FLT16, + [MESA_FORMAT_RGBA_ASTC_10x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x8_FLT16, + [MESA_FORMAT_RGBA_ASTC_10x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x10_FLT16, + [MESA_FORMAT_RGBA_ASTC_12x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_FLT16, + [MESA_FORMAT_RGBA_ASTC_12x12] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_FLT16, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_4x4_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x4_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_5x5_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x5_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_6x6_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x5_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x6_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_8x8_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x5_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x6_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x8_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_10x10_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x10_U8sRGB, + [MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12] = BRW_SURFACEFORMAT_ASTC_LDR_2D_12x12_U8sRGB, + [MESA_FORMAT_A_SNORM8] = 0, [MESA_FORMAT_L_SNORM8] = 0, [MESA_FORMAT_L8A8_SNORM] = 0, @@ -768,6 +825,36 @@ translate_tex_format(struct brw_context *brw, } return brw_format_for_mesa_format(mesa_format); + case MESA_FORMAT_RGBA_ASTC_4x4: + case MESA_FORMAT_RGBA_ASTC_5x4: + case MESA_FORMAT_RGBA_ASTC_5x5: + case MESA_FORMAT_RGBA_ASTC_6x5: + case MESA_FORMAT_RGBA_ASTC_6x6: + case MESA_FORMAT_RGBA_ASTC_8x5: + case MESA_FORMAT_RGBA_ASTC_8x6: + case MESA_FORMAT_RGBA_ASTC_8x8: + case MESA_FORMAT_RGBA_ASTC_10x5: + case MESA_FORMAT_RGBA_ASTC_10x6: + case MESA_FORMAT_RGBA_ASTC_10x8: + case MESA_FORMAT_RGBA_ASTC_10x10: + case MESA_FORMAT_RGBA_ASTC_12x10: + case MESA_FORMAT_RGBA_ASTC_12x12: { + GLuint brw_fmt = brw_format_for_mesa_format(mesa_format); + + /** + * On Gen9+, it is possible to process these formats using the LDR + * Profile or the Full Profile mode of the hardware. Because, it isn't + * possible to determine if an HDR or LDR texture is being rendered, we + * can't determine which mode to enable in the hardware. Therefore, to + * handle all cases, always default to Full profile unless we are + * processing sRGBs, which are incompatible with this mode. + */ + if (brw->gen >= 9) + brw_fmt |= GEN9_SURFACE_ASTC_HDR_FORMAT_BIT; + + return brw_fmt; + } + default: assert(brw_format_for_mesa_format(mesa_format) != 0); return brw_format_for_mesa_format(mesa_format);