From: Michal Simek <michal.simek@xilinx.com>
Date: Wed, 24 Sep 2014 13:16:01 +0000 (+0200)
Subject: ARM: zynq: DT: Add missing address for L2 pl310
X-Git-Tag: v4.9.8~5337^2~19^2~4
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8abef06b63e639b910d202319be9e8151ac3a1ed;p=platform%2Fkernel%2Flinux-rpi3.git

ARM: zynq: DT: Add missing address for L2 pl310

By in sync with others node and add also baseaddr
to the node name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 1836a60..772381f 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -136,7 +136,7 @@
 			      <0xF8F00100 0x100>;
 		};
 
-		L2: cache-controller {
+		L2: cache-controller@f8f02000 {
 			compatible = "arm,pl310-cache";
 			reg = <0xF8F02000 0x1000>;
 			arm,data-latency = <3 2 2>;