From: Jay Foad <jay.foad@amd.com>
Date: Tue, 12 Apr 2022 15:19:11 +0000 (+0100)
Subject: [AMDGPU] Use default member initializers in Subtarget classes
X-Git-Tag: upstream/15.0.7~10691
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=8a53b25ed55e88d576f712c306dce5ae7dbe1033;p=platform%2Fupstream%2Fllvm.git

[AMDGPU] Use default member initializers in Subtarget classes

Use default member initializers in AMDGPUSubtarget and subclasses. This
is to guard against adding a new feature boolean in AMDGPUSubtarget.h
but forgetting to initialize it to false in AMDGPUSubtarget.cpp.

This was mostly autogenerated by:
clang-tidy -checks=-*,cppcoreguidelines-prefer-member-initializer,modernize-use-default-member-init -header-filter=Subtarget -fix lib/Target/AMDGPU/*Subtarget.cpp

Differential Revision: https://reviews.llvm.org/D123613
---

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 4810a6c..7c4113b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -154,26 +154,7 @@ GCNSubtarget::initializeSubtargetDependencies(const Triple &TT,
   return *this;
 }
 
-AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT) :
-  TargetTriple(TT),
-  GCN3Encoding(false),
-  Has16BitInsts(false),
-  HasMadMixInsts(false),
-  HasMadMacF32Insts(false),
-  HasDsSrc2Insts(false),
-  HasSDWA(false),
-  HasVOP3PInsts(false),
-  HasMulI24(true),
-  HasMulU24(true),
-  HasSMulHi(false),
-  HasInv2PiInlineImm(false),
-  HasFminFmaxLegacy(true),
-  EnablePromoteAlloca(false),
-  HasTrigReducedRange(false),
-  MaxWavesPerEU(10),
-  LocalMemorySize(0),
-  WavefrontSizeLog2(0)
-  { }
+AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT) : TargetTriple(TT) {}
 
 GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
                            const GCNTargetMachine &TM)
@@ -182,124 +163,7 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
     AMDGPUSubtarget(TT),
     TargetTriple(TT),
     TargetID(*this),
-    Gen(INVALID),
     InstrItins(getInstrItineraryForCPU(GPU)),
-    LDSBankCount(0),
-    MaxPrivateElementSize(0),
-
-    FastFMAF32(false),
-    FastDenormalF32(false),
-    HalfRate64Ops(false),
-    FullRate64Ops(false),
-
-    FlatForGlobal(false),
-    AutoWaitcntBeforeBarrier(false),
-    BackOffBarrier(false),
-    UnalignedScratchAccess(false),
-    UnalignedAccessMode(false),
-
-    HasApertureRegs(false),
-    SupportsXNACK(false),
-    EnableXNACK(false),
-    EnableTgSplit(false),
-    EnableCuMode(false),
-    TrapHandler(false),
-
-    EnableLoadStoreOpt(false),
-    EnableUnsafeDSOffsetFolding(false),
-    EnableSIScheduler(false),
-    EnableDS128(false),
-    EnablePRTStrictNull(false),
-    DumpCode(false),
-
-    FP64(false),
-    CIInsts(false),
-    GFX8Insts(false),
-    GFX9Insts(false),
-    GFX90AInsts(false),
-    GFX940Insts(false),
-    GFX10Insts(false),
-    GFX10_3Insts(false),
-    GFX7GFX8GFX9Insts(false),
-    SGPRInitBug(false),
-    NegativeScratchOffsetBug(false),
-    NegativeUnalignedScratchOffsetBug(false),
-    HasSMemRealTime(false),
-    HasIntClamp(false),
-    HasFmaMixInsts(false),
-    HasMovrel(false),
-    HasVGPRIndexMode(false),
-    HasScalarStores(false),
-    HasScalarAtomics(false),
-    HasSDWAOmod(false),
-    HasSDWAScalar(false),
-    HasSDWASdst(false),
-    HasSDWAMac(false),
-    HasSDWAOutModsVOPC(false),
-    HasDPP(false),
-    HasDPP8(false),
-    Has64BitDPP(false),
-    HasPackedFP32Ops(false),
-    HasImageInsts(false),
-    HasExtendedImageInsts(false),
-    HasR128A16(false),
-    HasGFX10A16(false),
-    HasG16(false),
-    HasNSAEncoding(false),
-    NSAMaxSize(0),
-    GFX10_AEncoding(false),
-    GFX10_BEncoding(false),
-    HasDLInsts(false),
-    HasDot1Insts(false),
-    HasDot2Insts(false),
-    HasDot3Insts(false),
-    HasDot4Insts(false),
-    HasDot5Insts(false),
-    HasDot6Insts(false),
-    HasDot7Insts(false),
-    HasMAIInsts(false),
-    HasPkFmacF16Inst(false),
-    HasAtomicFaddInsts(false),
-    SupportsSRAMECC(false),
-    EnableSRAMECC(false),
-    HasNoSdstCMPX(false),
-    HasVscnt(false),
-    HasGetWaveIdInst(false),
-    HasSMemTimeInst(false),
-    HasShaderCyclesRegister(false),
-    HasVOP3Literal(false),
-    HasNoDataDepHazard(false),
-    FlatAddressSpace(false),
-    FlatInstOffsets(false),
-    FlatGlobalInsts(false),
-    FlatScratchInsts(false),
-    ScalarFlatScratchInsts(false),
-    HasArchitectedFlatScratch(false),
-    EnableFlatScratch(false),
-    AddNoCarryInsts(false),
-    HasUnpackedD16VMem(false),
-    LDSMisalignedBug(false),
-    HasMFMAInlineLiteralBug(false),
-    UnalignedBufferAccess(false),
-    UnalignedDSAccess(false),
-    HasPackedTID(false),
-
-    ScalarizeGlobal(false),
-
-    HasVcmpxPermlaneHazard(false),
-    HasVMEMtoScalarWriteHazard(false),
-    HasSMEMtoVectorWriteHazard(false),
-    HasInstFwdPrefetchBug(false),
-    HasVcmpxExecWARHazard(false),
-    HasLdsBranchVmemWARHazard(false),
-    HasNSAtoVMEMBug(false),
-    HasNSAClauseBug(false),
-    HasOffset3fBug(false),
-    HasFlatSegmentOffsetBug(false),
-    HasImageStoreD16Bug(false),
-    HasImageGather4D16Bug(false),
-
-    FeatureDisable(false),
     InstrInfo(initializeSubtargetDependencies(TT, GPU, FS)),
     TLInfo(TM, *this),
     FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index c5d31ed..09c3aab 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -45,23 +45,23 @@ private:
   Triple TargetTriple;
 
 protected:
-  bool GCN3Encoding;
-  bool Has16BitInsts;
-  bool HasMadMixInsts;
-  bool HasMadMacF32Insts;
-  bool HasDsSrc2Insts;
-  bool HasSDWA;
-  bool HasVOP3PInsts;
-  bool HasMulI24;
-  bool HasMulU24;
-  bool HasSMulHi;
-  bool HasInv2PiInlineImm;
-  bool HasFminFmaxLegacy;
-  bool EnablePromoteAlloca;
-  bool HasTrigReducedRange;
-  unsigned MaxWavesPerEU;
-  unsigned LocalMemorySize;
-  char WavefrontSizeLog2;
+  bool GCN3Encoding = false;
+  bool Has16BitInsts = false;
+  bool HasMadMixInsts = false;
+  bool HasMadMacF32Insts = false;
+  bool HasDsSrc2Insts = false;
+  bool HasSDWA = false;
+  bool HasVOP3PInsts = false;
+  bool HasMulI24 = true;
+  bool HasMulU24 = true;
+  bool HasSMulHi = false;
+  bool HasInv2PiInlineImm = false;
+  bool HasFminFmaxLegacy = true;
+  bool EnablePromoteAlloca = false;
+  bool HasTrigReducedRange = false;
+  unsigned MaxWavesPerEU = 10;
+  unsigned LocalMemorySize = 0;
+  char WavefrontSizeLog2 = 0;
 
 public:
   AMDGPUSubtarget(const Triple &TT);
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 6f86bba..633c199 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -58,137 +58,137 @@ protected:
   // Basic subtarget description.
   Triple TargetTriple;
   AMDGPU::IsaInfo::AMDGPUTargetID TargetID;
-  unsigned Gen;
+  unsigned Gen = INVALID;
   InstrItineraryData InstrItins;
-  int LDSBankCount;
-  unsigned MaxPrivateElementSize;
+  int LDSBankCount = 0;
+  unsigned MaxPrivateElementSize = 0;
 
   // Possibly statically set by tablegen, but may want to be overridden.
-  bool FastFMAF32;
-  bool FastDenormalF32;
-  bool HalfRate64Ops;
-  bool FullRate64Ops;
+  bool FastFMAF32 = false;
+  bool FastDenormalF32 = false;
+  bool HalfRate64Ops = false;
+  bool FullRate64Ops = false;
 
   // Dynamically set bits that enable features.
-  bool FlatForGlobal;
-  bool AutoWaitcntBeforeBarrier;
-  bool BackOffBarrier;
-  bool UnalignedScratchAccess;
-  bool UnalignedAccessMode;
-  bool HasApertureRegs;
-  bool SupportsXNACK;
+  bool FlatForGlobal = false;
+  bool AutoWaitcntBeforeBarrier = false;
+  bool BackOffBarrier = false;
+  bool UnalignedScratchAccess = false;
+  bool UnalignedAccessMode = false;
+  bool HasApertureRegs = false;
+  bool SupportsXNACK = false;
 
   // This should not be used directly. 'TargetID' tracks the dynamic settings
   // for XNACK.
-  bool EnableXNACK;
+  bool EnableXNACK = false;
 
-  bool EnableTgSplit;
-  bool EnableCuMode;
-  bool TrapHandler;
+  bool EnableTgSplit = false;
+  bool EnableCuMode = false;
+  bool TrapHandler = false;
 
   // Used as options.
-  bool EnableLoadStoreOpt;
-  bool EnableUnsafeDSOffsetFolding;
-  bool EnableSIScheduler;
-  bool EnableDS128;
-  bool EnablePRTStrictNull;
-  bool DumpCode;
+  bool EnableLoadStoreOpt = false;
+  bool EnableUnsafeDSOffsetFolding = false;
+  bool EnableSIScheduler = false;
+  bool EnableDS128 = false;
+  bool EnablePRTStrictNull = false;
+  bool DumpCode = false;
 
   // Subtarget statically properties set by tablegen
-  bool FP64;
+  bool FP64 = false;
   bool FMA;
   bool MIMG_R128;
-  bool CIInsts;
-  bool GFX8Insts;
-  bool GFX9Insts;
-  bool GFX90AInsts;
-  bool GFX940Insts;
-  bool GFX10Insts;
-  bool GFX10_3Insts;
-  bool GFX7GFX8GFX9Insts;
-  bool SGPRInitBug;
-  bool NegativeScratchOffsetBug;
-  bool NegativeUnalignedScratchOffsetBug;
-  bool HasSMemRealTime;
-  bool HasIntClamp;
-  bool HasFmaMixInsts;
-  bool HasMovrel;
-  bool HasVGPRIndexMode;
-  bool HasScalarStores;
-  bool HasScalarAtomics;
-  bool HasSDWAOmod;
-  bool HasSDWAScalar;
-  bool HasSDWASdst;
-  bool HasSDWAMac;
-  bool HasSDWAOutModsVOPC;
-  bool HasDPP;
-  bool HasDPP8;
-  bool Has64BitDPP;
-  bool HasPackedFP32Ops;
-  bool HasImageInsts;
-  bool HasExtendedImageInsts;
-  bool HasR128A16;
-  bool HasGFX10A16;
-  bool HasG16;
-  bool HasNSAEncoding;
-  unsigned NSAMaxSize;
-  bool GFX10_AEncoding;
-  bool GFX10_BEncoding;
-  bool HasDLInsts;
-  bool HasDot1Insts;
-  bool HasDot2Insts;
-  bool HasDot3Insts;
-  bool HasDot4Insts;
-  bool HasDot5Insts;
-  bool HasDot6Insts;
-  bool HasDot7Insts;
-  bool HasMAIInsts;
-  bool HasPkFmacF16Inst;
-  bool HasAtomicFaddInsts;
-  bool SupportsSRAMECC;
+  bool CIInsts = false;
+  bool GFX8Insts = false;
+  bool GFX9Insts = false;
+  bool GFX90AInsts = false;
+  bool GFX940Insts = false;
+  bool GFX10Insts = false;
+  bool GFX10_3Insts = false;
+  bool GFX7GFX8GFX9Insts = false;
+  bool SGPRInitBug = false;
+  bool NegativeScratchOffsetBug = false;
+  bool NegativeUnalignedScratchOffsetBug = false;
+  bool HasSMemRealTime = false;
+  bool HasIntClamp = false;
+  bool HasFmaMixInsts = false;
+  bool HasMovrel = false;
+  bool HasVGPRIndexMode = false;
+  bool HasScalarStores = false;
+  bool HasScalarAtomics = false;
+  bool HasSDWAOmod = false;
+  bool HasSDWAScalar = false;
+  bool HasSDWASdst = false;
+  bool HasSDWAMac = false;
+  bool HasSDWAOutModsVOPC = false;
+  bool HasDPP = false;
+  bool HasDPP8 = false;
+  bool Has64BitDPP = false;
+  bool HasPackedFP32Ops = false;
+  bool HasImageInsts = false;
+  bool HasExtendedImageInsts = false;
+  bool HasR128A16 = false;
+  bool HasGFX10A16 = false;
+  bool HasG16 = false;
+  bool HasNSAEncoding = false;
+  unsigned NSAMaxSize = 0;
+  bool GFX10_AEncoding = false;
+  bool GFX10_BEncoding = false;
+  bool HasDLInsts = false;
+  bool HasDot1Insts = false;
+  bool HasDot2Insts = false;
+  bool HasDot3Insts = false;
+  bool HasDot4Insts = false;
+  bool HasDot5Insts = false;
+  bool HasDot6Insts = false;
+  bool HasDot7Insts = false;
+  bool HasMAIInsts = false;
+  bool HasPkFmacF16Inst = false;
+  bool HasAtomicFaddInsts = false;
+  bool SupportsSRAMECC = false;
 
   // This should not be used directly. 'TargetID' tracks the dynamic settings
   // for SRAMECC.
-  bool EnableSRAMECC;
-
-  bool HasNoSdstCMPX;
-  bool HasVscnt;
-  bool HasGetWaveIdInst;
-  bool HasSMemTimeInst;
-  bool HasShaderCyclesRegister;
-  bool HasVOP3Literal;
-  bool HasNoDataDepHazard;
-  bool FlatAddressSpace;
-  bool FlatInstOffsets;
-  bool FlatGlobalInsts;
-  bool FlatScratchInsts;
-  bool ScalarFlatScratchInsts;
-  bool HasArchitectedFlatScratch;
-  bool EnableFlatScratch;
-  bool AddNoCarryInsts;
-  bool HasUnpackedD16VMem;
-  bool LDSMisalignedBug;
-  bool HasMFMAInlineLiteralBug;
-  bool UnalignedBufferAccess;
-  bool UnalignedDSAccess;
-  bool HasPackedTID;
-  bool ScalarizeGlobal;
-
-  bool HasVcmpxPermlaneHazard;
-  bool HasVMEMtoScalarWriteHazard;
-  bool HasSMEMtoVectorWriteHazard;
-  bool HasInstFwdPrefetchBug;
-  bool HasVcmpxExecWARHazard;
-  bool HasLdsBranchVmemWARHazard;
-  bool HasNSAtoVMEMBug;
-  bool HasNSAClauseBug;
-  bool HasOffset3fBug;
-  bool HasFlatSegmentOffsetBug;
-  bool HasImageStoreD16Bug;
-  bool HasImageGather4D16Bug;
+  bool EnableSRAMECC = false;
+
+  bool HasNoSdstCMPX = false;
+  bool HasVscnt = false;
+  bool HasGetWaveIdInst = false;
+  bool HasSMemTimeInst = false;
+  bool HasShaderCyclesRegister = false;
+  bool HasVOP3Literal = false;
+  bool HasNoDataDepHazard = false;
+  bool FlatAddressSpace = false;
+  bool FlatInstOffsets = false;
+  bool FlatGlobalInsts = false;
+  bool FlatScratchInsts = false;
+  bool ScalarFlatScratchInsts = false;
+  bool HasArchitectedFlatScratch = false;
+  bool EnableFlatScratch = false;
+  bool AddNoCarryInsts = false;
+  bool HasUnpackedD16VMem = false;
+  bool LDSMisalignedBug = false;
+  bool HasMFMAInlineLiteralBug = false;
+  bool UnalignedBufferAccess = false;
+  bool UnalignedDSAccess = false;
+  bool HasPackedTID = false;
+  bool ScalarizeGlobal = false;
+
+  bool HasVcmpxPermlaneHazard = false;
+  bool HasVMEMtoScalarWriteHazard = false;
+  bool HasSMEMtoVectorWriteHazard = false;
+  bool HasInstFwdPrefetchBug = false;
+  bool HasVcmpxExecWARHazard = false;
+  bool HasLdsBranchVmemWARHazard = false;
+  bool HasNSAtoVMEMBug = false;
+  bool HasNSAClauseBug = false;
+  bool HasOffset3fBug = false;
+  bool HasFlatSegmentOffsetBug = false;
+  bool HasImageStoreD16Bug = false;
+  bool HasImageGather4D16Bug = false;
 
   // Dummy feature to use for assembler in tablegen.
-  bool FeatureDisable;
+  bool FeatureDisable = false;
 
   SelectionDAGTargetInfo TSInfo;
 private:
diff --git a/llvm/lib/Target/AMDGPU/R600Subtarget.cpp b/llvm/lib/Target/AMDGPU/R600Subtarget.cpp
index 20c1ce7..d8f0610 100644
--- a/llvm/lib/Target/AMDGPU/R600Subtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/R600Subtarget.cpp
@@ -27,8 +27,6 @@ R600Subtarget::R600Subtarget(const Triple &TT, StringRef GPU, StringRef FS,
     : R600GenSubtargetInfo(TT, GPU, /*TuneCPU*/ GPU, FS), AMDGPUSubtarget(TT),
       InstrInfo(*this),
       FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0),
-      FMA(false), CaymanISA(false), CFALUBug(false), HasVertexCache(false),
-      R600ALUInst(false), FP64(false), TexVTXClauseSize(0), Gen(R600),
       TLInfo(TM, initializeSubtargetDependencies(TT, GPU, FS)),
       InstrItins(getInstrItineraryForCPU(GPU)) {}
 
diff --git a/llvm/lib/Target/AMDGPU/R600Subtarget.h b/llvm/lib/Target/AMDGPU/R600Subtarget.h
index 92d559b..c3d002f 100644
--- a/llvm/lib/Target/AMDGPU/R600Subtarget.h
+++ b/llvm/lib/Target/AMDGPU/R600Subtarget.h
@@ -31,14 +31,14 @@ class R600Subtarget final : public R600GenSubtargetInfo,
 private:
   R600InstrInfo InstrInfo;
   R600FrameLowering FrameLowering;
-  bool FMA;
-  bool CaymanISA;
-  bool CFALUBug;
-  bool HasVertexCache;
-  bool R600ALUInst;
-  bool FP64;
-  short TexVTXClauseSize;
-  Generation Gen;
+  bool FMA = false;
+  bool CaymanISA = false;
+  bool CFALUBug = false;
+  bool HasVertexCache = false;
+  bool R600ALUInst = false;
+  bool FP64 = false;
+  short TexVTXClauseSize = 0;
+  Generation Gen = R600;
   R600TargetLowering TLInfo;
   InstrItineraryData InstrItins;
   SelectionDAGTargetInfo TSInfo;